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Article

Model Predictive Direct Power Control for Nonredundant Fault Tolerant Grid-Connected Bidirectional Voltage Source Converter

1
Department of Electrical Engineering, Zhengzhou University of Light Industry, Zhengzhou 450002, China
2
Department of Electrical Engineering and Computer Science, University of Tennessee, Knoxville, TN 37996, USA
3
Department of Electrical Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
*
Author to whom correspondence should be addressed.
Energies 2017, 10(8), 1133; https://doi.org/10.3390/en10081133
Submission received: 7 July 2017 / Revised: 27 July 2017 / Accepted: 28 July 2017 / Published: 2 August 2017
(This article belongs to the Section I: Energy Fundamentals and Conversion)

Abstract

:
This paper proposes a model predictive direct power control scheme for nonredundant fault tolerant grid-connected bidirectional voltage source converter (BVSC) with balanced dc-link split capacitor voltage and high reliability. Based on the operation analysis of fault-tolerant BVSC with phase leg faults, a power predictive model of three-phase four-switch fault-tolerant topology in αβ coordinates is established, and the space voltage vectors with unbalanced dc-link split capacitor voltage are analyzed. According to the power predictive model and cost function, the optimal space voltage vector is selected to achieve a flexible, smooth transition between inverter and rectifier mode with direct power control. Pulse width modulation and phase locked loop are not required in the proposed method. The constraint of dc-link voltage constraint is designed for the cost function to achieve a central point of dc-link voltage offset suppression, which can reduce the risk of electrolytic capacitor failure for over-voltage operation. With the proposed control method, the converter can work continuously in both inverter mode and rectifier mode, even if phase leg faults occur. The simulation and experimental results show good steady-state and dynamic performance of the proposed control scheme to enhance the reliability of bidirectional power conversion.

1. Introduction

The bidirectional voltage source converter (BVSC) can integrate various ac/dc loads, distributed storages, distributed generation, and ac grid with high efficiency and flexible power regulation. Due to the increasing development of switching devices and renewable energy power generation, there will be more applications of bidirectional alternating current (ac)/direct current (dc) conversion, such as electric vehicles, which can store power in the night and generate power to the grid in the daytime. The growth of BVSC has been promoted by the environment pollution issues caused by the traditional fossil energy resources such as oil and coal. This has received great attention in developing countries [1,2]. For the high performance of the bidirectional power conversion between the ac and dc sides, the reliability of the BVSC in different working conditions, such as under unbalanced power grid, paralleled applications, or islanding mode, has been studied to ensure safe and continuous operation [3,4,5]. However, much research shows that switching devices in power converters, such as an insulated gate bipolar transistor (IGBT) or a metal-oxide field-effect transistor (MOSFET), are prone to have faults caused by the surges and spikes in the conditions of high voltage and high switching frequency transition, which are a major challenge to the reliability of the power converter. On the other hand, most power converters are not designed to be redundant. Once there is a switching device fault, the power conversion will be interrupted. Therefore, the study of nonredundant fault-tolerant bidirectional power conversion is urgent and significant to enhance the reliability of the BVSC [6,7,8,9].
The three-phase four-switch (TPFS) topology was first presented for its cost-effective design, and it became a fault-tolerant topology for the switching devices open or short circuits faults of the conventional three-phase six-switch converter (TPSS) for bidirectional power conversion [10,11,12,13,14,15]. As a promising fault-tolerant topology for the widely used TPSS plan, the control scheme study of TPFS topology has drawn great attention. The TPFS converter is applied in motor drive applications as a low cost fault-tolerant topology. A control strategy–based single current sensor is proposed for the fault-tolerant brushless dc motor to lower cost and improve performance [10]. A compensation scheme with different forward voltage drop values is proposed for the direct torque control of the TPFS converter to correct the stator flux imbalance and reduce the total harmonic distortion [11]. The voltage unbalance of the dc-link split capacitors is another problem for the reliable operation of a fault-tolerant converter. The spatial repetitive controller is proposed to eliminate the dc-link central point voltage fluctuation of the TPFS converter in microgrids application [12]. The double Fourier integral analysis is used to investigate the phase-leg switched voltage spectrum of TPFS converter. The dc-link central point voltage fluctuation can be neutralized by injecting certain terms to the modulating waveforms [13]. A predictive torque control for TPFS inverter-fed induction motor with dc-link voltage offset suppression is proposed to balance the phase current [14]. The TPFS inverter based on the topology of the single-ended primary-inductance converter is proposed to provide the higher output voltage, which enhances the utilization of the dc voltage [15]. The above control method of TPFS converter is based on the space voltage vector modulation method, which needs the coordinating transformation, the complex calculation of the vector sector, and the duty ratio. Furthermore, the bidirectional power conversion of the fault-tolerant operation is not considered.
Model predictive control (MPC) has the advantages of simplicity and flexibility, and the cost function can be designed with different control objectives. Compared to classical control methods, MPC has a fast, dynamic response, good adaptability, and robustness without using the phase locked loop control and pulse width modulation (PWM) [16,17,18,19,20]. MPC has been used in a grid-connected inverter system under normal conditions without faults. A model predictive direct power control strategy for a grid-connected inverter in a photovoltaic system is proposed, which achieve flexible power regulation and switching frequency reduction [18]. In addition, coordinate transformation and proportional-integral regulators are not necessary. The switching table and PWM modulation module are not included either. The delay compensation method is proposed to reduce the influence of the calculation delay when there are a large number of voltage vectors [19]. A model predictive power control method is proposed for the PWM rectifier that is able to operate under both balanced and unbalanced grid voltages [20]. Neither complicated sequence extraction of grid voltage/current nor the phase locked loop is needed. However, this does not consider the power switching faults conditions. Although there are many studies on the model predictive control scheme of the power converter, the switching device open or short circuit faults are not considered. Therefore, the control scheme of the fault-tolerant topology needs further study.
This paper proposes a model predictive direct power control method for nonredundant fault tolerant grid-connected BVSC with high reliability. With high-penetration renewable energy and microgrids integration, the proposed method offers a higher reliability for power conversion. The main contributions of this paper are as follows:
  • The fault tolerant grid-connected BVSC model is established. The impacts of the unbalanced dc-link capacitor voltage on the voltage vectors are analyzed in detail.
  • The model predictive direct power control (MPDPC) method is designed considering direct power control and dc-link voltage balance control, which does not need double loop control, PWM modulation, or phase locked loop, and is easy to implement. The dc-link split capacitor voltage balance control is achieved by adding compensation term to the cost function, which reduces the risk of electrolytic capacitor failure for over-voltage operation.
  • With the proposed MPDPC, the fault-tolerant BVSC has good steady-state performance with sinusoidal output current waveforms. When the reference power changes, the fault-tolerant working modes of inverter and rectifier can be switched smoothly with good dynamic performance.
  • When there are phase leg faults with BVSC, the fault-tolerant converter can work continuously without disconnecting the dc side and ac grid, which enhances the reliability of the bidirectional power conversion.

2. Operation Principles of the Nonredundant Fault-Tolerant BVSC

The reliability of the BVSC depends on many elements, such as the hardware design, working conditions, and adopted power devices. As a result of switch open circuits, short circuits, and driver signal faults, it has been estimated that more than 80% of faults are caused by switching device failures [8]. Therefore, fast fuse devices can be connected in series with the switching devices to convert the short circuits to open circuits faults. The topology of nonredundant fault-tolerant BVSC is shown in Figure 1a. The switch devices in the phase leg are IGBTs with antiparallel freewheeling diodes. The phase legs are also connected with the central point of the series capacitor by three bidirectional switches, which can be triode for alternating current (TRIAC) or IGBTs with single-phase diode rectifier. In normal operations, the bidirectional switches are in the open state. When short circuits or open circuits occur in one phase leg (such as phase a), a fast fuse device (F1 or F2) is opened, and the corresponding bidirectional switch Ta is conducted to achieve continuous operation [9]. The reconstructed fault-tolerant BVSC is shown in Figure 1b.
There are four switching devices in fault-tolerant BVSC (see Figure 1b). The relationship between the output voltage vector and switching states of the converter is analyzed. Si (i = b, c) is defined as the switching state for fault-tolerant BVSC converter as,
S i = { 1 0   upper   bridge   of   i   phase   is   on   and   lower   bridge   is   off upper   bridge   of   i   phase   is   off   and   lower   bridge   is   on
The relationship between the output voltage and switching states of fault-tolerant BVSC can be expressed as [14],
{ u a n U d c 1 3 ( S b S c ) + U d c 2 3 ( 2 S b S c ) u b n = U d c 1 3 ( 2 S b S c ) + U d c 2 3 ( 2 S b S c 1 ) u c n = U d c 1 3 ( 2 S c S b ) + U d c 2 3 ( 2 S c S b 1 )
where uan, ubn, ucn, Udc1, Udc2 are output voltages of the converter, and dc voltage of capacitor C1, C2, respectively.
The voltage components uα, uβ of the stationary coordinate system are obtained by Clark coordinate transformation. There are four switching states of (0, 0), (0, 1), (1, 0), (1, 1) in fault-tolerant BVSC. The voltages of TPFS structure in αβ stationary frame with phase a fault are shown in Table 1.
The voltage vectors divide the vector space into four sectors, which are shown in Figure 2. The amplitudes of the four basic voltage vectors are not equal. According to different conditions under Udc1 = Udc2, Udc1 < Udc2, and Udc1 > Udc2, the basic voltage vectors are different, shown in Figure 3.

3. Mathematic Model of Fault Tolerant BVSC

3.1. Power Predictive Model of Fault-Tolerant BVSC

The reconstruction topology of fault-tolerant BVSC with leg fault of phase a is illustrated in Figure 1. It is connected to the grid through the filter inductor Lf and line resistance R. The dc side includes two capacitors: C1 and C2 with equal value C. The bidirectional power conversion of BVSC contains rectifier mode and inverter mode. The state equation of the converter in the αβ two phase stationary coordinates can be expressed as follows:
L f d i α β d t = u α β e α β R i α β
where uαβ, iαβ, eαβ are the αβ components of the converter output voltage, current and grid voltage.
Equation (3) can be discretized and predictive current of tk+1 instant is given as follows:
i α β ( k + 1 ) = T S L f u α β ( k ) e α β ( k ) + ( 1 R T S L f ) i α β ( k )
where uαβ(k), iαβ(k), eαβ(k) are αβ components of the converter output voltage, current, and grid voltage at the tk instant. iαβ(k + 1) are αβ components of predictive current value at tk+1 instant. TS is sampling period.
Based on the instantaneous power theory, the complex power S of the power grid can be expressed as,
S = 3 2 e i * = 3 2 ( e α + j e β ) ( i α j i β ) = P + j Q
where * represents a conjugate. Active power and reactive power of can be obtained by,
[ P ( k ) Q ( k ) ] = 3 2 [ e α e β e β e α ] [ i α ( k ) i β ( k ) ]
Therefore, the predictive power model of the fault-tolerant BVSC at tk+1 sampling instant is,
[ P ( k + 1 ) Q ( k + 1 ) ] = 3 T S 2 L [ e α e β e β e α ] [ u α ( k ) e α R i α ( k ) u β ( k ) e β R i β ( k ) ] + [ P ( k ) Q ( k ) ]

3.2. Central Point of dc-Link Voltage Offset

As shown in Figure 1b, the two capacitors C1 and C2 are in series connected in dc-link, where C1 = C2. Then the current in the faulty phase is equally divided into the two capacitors. The capacitor currents idc1 and idc2 can be obtained by:
{ i d c 1 = i d c 2 = 1 2 i a ;   s w i t c h i n g   f a u l t   w i t h   l e g   a i d c 1 = i d c 2 = 1 2 i b ;   s w i t c h i n g   f a u l t   w i t h   l e g   b i d c 1 = i d c 2 = 1 2 i c ;   s w i t c h i n g   f a u l t   w i t h   l e g   c
The capacitor voltage Udc1 and Udc2 change with currents as follows:
{ [ C d U d c 1 d t C d U d c 2 d t ] = [ i d c i b i c i d c + i b + i c i b i c ] [ 1 S b S c ] ;   s w i t c h i n g   f a u l t   w i t h   l e g   a [ C d U d c 1 d t C d U d c 2 d t ] = [ i a i d c i c i a i d c + i a + i c i c ] [ S b 1 S c ] ;   s w i t c h i n g   f a u l t   w i t h   l e g   b [ C d U d c 1 d t C d U d c 2 d t ] = [ i a i b i d c i a i b i d c + i a + i b ] [ S a S b 1 ] ;   s w i t c h i n g   f a u l t   w i t h   l e g   c
where idc is the dc-link current, shown in Figure 1b.
The offset component of dc-link voltage can be shown as,
{ C d ( U d c 1 U d c 2 ) d t = ( i c + i b ) = i a ;   s w i t c h i n g   f a u l t   w i t h   l e g   a C d ( U d c 1 U d c 2 ) d t = ( i a + i c ) = i b ;   s w i t c h i n g   f a u l t   w i t h   l e g   b C d ( U d c 1 U d c 2 ) d t = ( i a + i b ) = i c ;   s w i t c h i n g   f a u l t   w i t h   l e g   c
The predictive offset component at tk+1 instant is obtained by discretization of (10). In order to keep the central point of dc-link voltage to Udc/2, the offset component ΔUdc should be minimized.
min [ Δ U d c ( k + 1 ) ] = { Δ U d c ( k ) + T S C i a ;   s w i t c h i n g   f a u l t   w i t h   l e g   a Δ U d c ( k ) + T S C i b ;   s w i t c h i n g   f a u l t   w i t h   l e g   b Δ U d c ( k ) + T S C i c ;   s w i t c h i n g   f a u l t   w i t h   l e g   c
Then the offset component constraint of (11) can be added to the cost function to achieve the central point of dc-link voltage offset suppression.

4. Model Predictive Control of Fault Tolerant BVSC

In recent years, MPC has been widely used in power electronics application fields such as motor drives, active filter, power regulation, and distributed generation. The main principle of MPC is shown in Figure 4. The MPC system is designed to make the input variable x be equal to the reference value x*. In each sampling period, the optimal switching states of the power devices are solved online. x(k) is the input value of the kth sampling period and is obtained by discretization of input variables. When the sampling frequency is high, the input variables in a sampling period can be considered as a constant. If the number of switching states Sw is n, the value of variable xpi(k) in the next period can be determined by function xpi(k) = fp{x(k), Swi}, i = 1,2 … n. Based on the working principle of the power converter, the predictive function fp is established. The cost function g need to be designed to select the optimal switching states Sw*(k) for the power converter, where g = fg{x*(k + 1), xpi(k + 1)}, i = 1,2 … n. x*(k + 1) is the reference value of (k + 1)th sampling instant. According to different control objectives, the cost function can be changed to achieve optimal performance. The output switching states of MPC can be applied to power devices directly. Therefore, the pulse width modulation (PMW) is not necessary.
For the selection of the optimal switching vector to realize model predictive control, a cost function g is designed to compare all the predictive power values and select the voltage vector to minimize the cost function. The sum of the absolute error value between the predictive power, reference power, and dc-link voltage offset component is chosen as cost function,
g = | P r e f P ( k + 1 ) | + | Q r e f Q ( k + 1 ) | + λ | Δ U d c ( k + 1 ) |
where Pref, Qref are active power and reactive power reference value. P(k + 1), Q(k + 1) are power predictive values at the tk+1 instant. λ is the weighting coefficient, and ΔUdc(k + 1) is the predictive voltage offset at central point M of the dc-link.
In a digital implementation, there is usually a one-step delay between the selected voltage vector and the applied voltage vector, which has a significant impact on the dynamic and static performance of the system [19]. To compensate this one-step delay in digital control, the cost function considering the tracking error at (k + 2)th instant should be evaluated and minimized to select the best voltage vector, expressed as,
g = | P r e f P ( k + 2 ) | + | Q r e f Q ( k + 2 ) | + λ | Δ U d c ( k + 2 ) |
The first and second terms in the cost function penalize the power ripple. The third term is used to minimize the unbalanced dc-link capacitor voltages.
The predictive power and dc-link voltage offset at (k + 2)th sampling period can be obtained from (k + 1)th sampling instant and shown as,
[ P ( k + 2 ) Q ( k + 2 ) ] = 3 T 2 L [ e α e β e β e α ] [ u α ( k + 1 ) e α R i α ( k + 1 ) u β ( k + 1 ) e β R i β ( k + 1 ) ] + [ P ( k + 1 ) Q ( k + 1 ) ]
{ Δ U d c ( k + 2 ) = Δ U d c ( k ) + T s C i a ( k ) + T s C i a ( k + 1 )   l e g   a   f a u l t Δ U d c ( k + 2 ) = Δ U d c ( k ) + T s C i b ( k ) + T s C i b ( k + 1 )   l e g   b   f a u l t Δ U d c ( k + 2 ) = Δ U d c ( k ) + T s C i c ( k ) + T s C i c ( k + 1 )   l e g   c   f a u l t
The MPDPC structure of fault-tolerant BVSC is shown in Figure 5. The grid voltage and current ea, eb, ec, ia, ib, ic can be acquired by signal sampling circuits. After Clark transformation, eα, eβ, iα, iβ can be obtained. Predictive functions (14) and (15) calculate the power and dc-link offset voltage predictive values P(k + 2), Q(k + 2), ΔUdc(k + 2). The voltage vectors can be evaluated by the cost function (13). Then, the switching states, which minimizes the cost function, are selected and applied at tk+1 instant to achieve direct power control. The flow chart of the MPDPC algorithm is shown in Figure 6, where m, n, j are variable parameters and gj is the calculation result of the cost function.

5. Simulation Results

The traditional BVSC and fault-tolerant BVSC plans are simulated in MATLAB/Simulink (Mathworks, Natick, MA, US). The converters are built using the modules in SimPowerSystems. The comparison between the different topologies is conducted to verify the proposed control strategy of the fault-tolerant BVSC. The system parameters are shown in Table 2.
Assuming the switch open circuits faults occur in phase a, the converter works with unit power factor. The reference active power is Pref = 1000 W, and reactive power is Qref = 0 Var. Figure 7 shows the three-phase grid-connected currents, active power, and reactive power in the inverter mode. It can be seen from Figure 7a that when leg open circuit faults occur, the output current has serious distortion, and the current total harmonic distortion (THD) is 54.14%. Active power fluctuates from 0 to 1000 W, and reactive power changes between 0 and 400 Var, which shows that the BVSC cannot work normally in inverter mode. However, even if the bridge leg has a fault, the fault-tolerant converter can work continuously with the proposed MPDPC. The total harmonic distortion (THD) of grid current is 2.15% with better sinusoidal waveform, shown in Figure 7b. Besides, the output power can track the reference power well and keep stable.
By changing the reference active power, the BVSC is switched from the inverter to rectifier mode. The switch open circuits faults occur in the phase a leg, where the reference active power is −1000 W and reactive power is 0. Figure 8 shows grid-connected currents, output active power, and reactive power in the rectifier mode. The converter current and output power are distorted with traditional BVSC, which cannot ensure normal operation, as shown in Figure 8a. On the contrary, by using the control of the proposed MPDPC for fault-tolerant BVSC, the grid connected currents are sinusoidal with 2.0% THD and the output power keeps constant, as shown in Figure 8b.
In order to verify the dynamic performance of the control strategy, a simulation is carried out as follows. The reference active power changes from 1000 W (inverter mode) to −1000 W (rectifier mode) at 0.06 s, and the simulation results are shown in Figure 9. When the reference power changes, the fault-tolerant BVSC with MPDPC achieves a flexible smooth transition from the inverter to the rectifier mode, and it has good dynamic performance without surge peak transient impact.
In (13), the weighting factor λ can be adjusted to reduce the dc-link voltage offset. To investigate the influence of the weighting factor, comparisons with different λ are conducted to show the effects on the dc-link capacitor voltage balance control performance. When λ = 0, there is voltage unbalance in Udc1 and Udc2. At 0.2 s, λ is changed to 1600 in Figure 10a, and 1000 in Figure 10b. The dc-link voltage unbalanced offsets are reduced due to the cost function (16). In Figure 10a, the dc voltage regulation response with λ = 1600 is faster than that with λ = 1000 in Figure 10b. However, for larger λ value, the power ripple is much larger. As a result, there is a tradeoff for choosing λ value considering both the dynamic performance and power ripple. At 1 s, the fault-tolerant BVSC is switched from the inverter mode to rectifier mode. DC-link capacitor voltage Udc1, Udc2 can also be controlled by using the designed method. The central point voltage of the dc-link split capacitors will be balanced in 0.2 s. The output active and reactive power of the converter change with the reference power with sinusoidal current waveforms, which validate the proposed control scheme.

6. Experimental Verification

A hardware testbed consisting of a TI TMS320F28335 controller board and TPFS converter (shown in Figure 11) was setup to verify the effectiveness of the proposed control scheme. The experimental parameters are shown in Table 2, which are the same as those in the simulation. Experimental results were recorded by DLM4000 series (YOKOGAWA, Tokyo, Japan) mixed signal oscilloscope, FLUKE 435B power quality analyzer (Fluke, Everett, WA, US). Bidirectional dc power source APL (Myway, Kanagawa, Japan) has been used to emulate the dc side. The MX-30 ac programmable power supply (Ametek, Berwyn, IL, US) emulates the ac grid. The experimental tests have been realized on both BVSC and fault-tolerant BVSC in different work modes.
Figure 12 and Figure 13 show the steady-state waveforms of traditional BVSC and proposed MPDPC for the fault-tolerant BVSC in inverter mode with leg faults in phase a. The converter works with the unit power factor. The reference active power is Pref = 1000 W, and reactive power is Qref = 0 Var. The following waveforms include three-phase voltage and current, active power, and reactive power. Figure 14 and Figure 15 show experimental results in rectifier mode, and the reference active power is −1000 W with unit power factor. In Figure 12 and Figure 14, it can be seen from steady-state waveforms that, when there are phase leg faults in traditional BVSC, the grid currents are highly distorted, and output power is unstable.
The power quality analyzer Fluke 435II (Fluke, Everett, WA, USA) was used to measure the current THD and negative current unbalance (NCU). In the inverter mode, the current THD is up to 44.6%, and the negative current unbalance of three-phase currents reach to 99.8%, as shown in Figure 12. In the rectifier mode, the current THD is up to 25.3%, and the negative current unbalance of three-phase currents reaches 99.9%, as shown in Figure 14. The experimental results show that when a leg fault of BVSC occurs, the BVSC cannot realize effective control.
However, Figure 13 and Figure 15 show that the converter can work properly by using the proposed MPDPC for fault-tolerant BVSC, even if the phase leg has a fault. The current THD decreases to 2.4% in the inverter mode and 2.7% in the rectifier mode. The negative current unbalance is reduced to 1.1% in the inverter and 0.9% in the rectifier mode. The dc-link capacitor voltage is controlled and stable. The current THD and negative current unbalance are shown in Table 3.
In order to verify the dynamic performance of the control strategy, the experiment was carried out as follows: the reference active power steps from the 1000 W (inverter mode) to −1000 W (rectifier mode) at 0.05 s. The experimental results are shown in Figure 16. It shows that when the reference active power of the proposed MPDPC changes, the output power is regulated to the new value after about 0.2 ms without the current surge, power fluctuations, and other transient impacts. Three phase currents are sinusoidal, and the flexible seamless switching between inverter and rectifier mode can be realized. The output power of the fault-tolerant converter keeps stable with the reference value.
To verify the effectiveness of dc-link split capacitor voltage balance design, comparisons with different λ in both rectifier mode and inverter mode are carried out to show the dynamic response of the dc-link voltage balance control. In Figure 17, before 0.24 s, the fault-tolerant BVSC works in inverter mode with λ = 0. The dc-link capacitor voltage Udc1, Udc2 are not balanced. In this condition, Udc1 is larger than the rating value. The capacitor C1 works in over-voltage conditions. The power loss and the temperature of the capacitor C1 will increase, and the capacitance value of C1 will decrease. This will reduce the lifetime of the capacitor C1, which is prone to cause the failure of the electrolytic capacitor for over-voltage operation. For long-term operation under over-voltage conditions, the deteriorating performance of the electrolytic capacitor will become the destructive fault. To avoid this problem, the predictive function and cost function with the dc-link split capacitor voltage balance control is designed. At 0.24 s, the weighting factor is set to λ = 1000. The experimental results show that with the additional term in the cost function, the dc-link capacitor voltage is regulated to be balanced. At 0.48 s, the fault-tolerant BVSC is switched from the inverter mode to rectifier mode. During this transition, the dc-link capacitor voltage can be kept balanced with the fast transient process. The experimental results verify that the proposed control scheme can keep dc-link capacitor voltage balanced with good static and dynamic response, which also reduce the risk of the electrolytic capacitor failure caused by the dc-link unbalanced over-voltage.
According to the experimental results, when phase leg faults occur, the proposed MPDPC for fault-tolerant BVSC has better performance compared with the traditional plan, which ensures continuous and reliable operation of the converter with leg faults.

7. Conclusions

In this paper, a model predictive direct power control (MPDPC) method is proposed for nonredundant, fault-tolerant BVSC with phase leg open circuits faults. When the faulty leg has been isolated by the connection switch, the BVSC is reconstructed as a fault-tolerant TPFS topology. Based on the working principle analysis, a power predictive model of fault-tolerant BVSC in αβ coordinates is designed, and space voltage vectors with unbalanced dc-link capacitor voltage are analyzed after topology reconfiguration. The finite states model predictive direct power control method of fault-tolerant BVSC is investigated for continuous operation, even if the BVSC has leg open circuits faults. The cost function considering the elimination of power ripples and dc-link split voltage balance control is used to select the optimal voltage vector, which achieves flexible smooth switching between inverter and rectifier mode with direct power control. With the proposed scheme, the dc voltage offset component can also be minimized to keep the central point of the dc-link voltage offset suppression. The proposed method makes the utilization of the MPC advantageous for combining different control objectives together without using PWM modulation, phase locked loop, or double loop control. The flexible switching between the inverter and the rectifier mode of the fault-tolerant BVSC is achieved by changing the reference active power. Finally, the effectiveness of the proposed control strategy to improve the bidirectional power conversion reliability is verified by both simulation and experiments.

Acknowledgments

This work was supported by the National Science Foundation of China (NSFC) under Grant 51607159, U1604136 and the Science & Technology Innovation Talents in Universities in Henan Province 18HASTIT025, 172102410068, 2015GGJS-180, 18A470020.

Author Contributions

Nan Jin surveyed the backgrounds of the research, proposed the main idea, and contributed to the modeling and controller design. Leilei Guo and Gang Yao contributed to the simulation and experiments. The authors worked collectively on the manuscript preparation.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The fault-tolerant topology of BVSC. (a) Nonredundant fault-tolerant structure; (b) three-phase four-switch (TPFS) structure with leg fault of phase a.
Figure 1. The fault-tolerant topology of BVSC. (a) Nonredundant fault-tolerant structure; (b) three-phase four-switch (TPFS) structure with leg fault of phase a.
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Figure 2. Voltage space vectors. (a) Phase a leg fault; (b) Phase b leg fault; (c) Phase c leg fault.
Figure 2. Voltage space vectors. (a) Phase a leg fault; (b) Phase b leg fault; (c) Phase c leg fault.
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Figure 3. Voltage vectors of the fault-tolerant BVSC with phase a leg fault. (a) Udc1 = Udc2; (b) Udc1 < Udc2; (c) Udc1 > Udc2.
Figure 3. Voltage vectors of the fault-tolerant BVSC with phase a leg fault. (a) Udc1 = Udc2; (b) Udc1 < Udc2; (c) Udc1 > Udc2.
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Figure 4. The basic principle of model predictive control (MPC).
Figure 4. The basic principle of model predictive control (MPC).
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Figure 5. Model predictive direct power control (MPDPC) structure for fault-tolerant BVSC with leg fault of phase a.
Figure 5. Model predictive direct power control (MPDPC) structure for fault-tolerant BVSC with leg fault of phase a.
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Figure 6. Flow diagram of MPDPC for fault-tolerant BVSC.
Figure 6. Flow diagram of MPDPC for fault-tolerant BVSC.
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Figure 7. Simulation results of MPDPC in inverter mode with leg faults of phase a. (a) Traditional BVSC; (b) Proposed MPDPC for fault-tolerant BVSC.
Figure 7. Simulation results of MPDPC in inverter mode with leg faults of phase a. (a) Traditional BVSC; (b) Proposed MPDPC for fault-tolerant BVSC.
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Figure 8. Simulation results in rectifier mode with leg faults of phase a. (a) Traditional BVSC; (b) Proposed MPDPC for fault-tolerant BVSC.
Figure 8. Simulation results in rectifier mode with leg faults of phase a. (a) Traditional BVSC; (b) Proposed MPDPC for fault-tolerant BVSC.
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Figure 9. Simulation results of switching between inverter and rectifier mode with proposed MPDPC for fault-tolerant BVSC.
Figure 9. Simulation results of switching between inverter and rectifier mode with proposed MPDPC for fault-tolerant BVSC.
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Figure 10. Simulation results with dc-link voltage offset suppression with different weighting factor λ. (a) λ = 1600; (b) λ = 1000.
Figure 10. Simulation results with dc-link voltage offset suppression with different weighting factor λ. (a) λ = 1600; (b) λ = 1000.
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Figure 11. Experimental setup of fault-tolerant BVSC.
Figure 11. Experimental setup of fault-tolerant BVSC.
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Figure 12. Experimental results of traditional MPDPC in inverter mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
Figure 12. Experimental results of traditional MPDPC in inverter mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
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Figure 13. Experimental results of proposed MPDPC for fault-tolerant BVSC in inverter mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
Figure 13. Experimental results of proposed MPDPC for fault-tolerant BVSC in inverter mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
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Figure 14. Experimental results of BVSC in rectifier mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
Figure 14. Experimental results of BVSC in rectifier mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
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Figure 15. Experimental results of proposed MPDPC for fault-tolerant BVSC in rectifier mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
Figure 15. Experimental results of proposed MPDPC for fault-tolerant BVSC in rectifier mode with leg faults of phase a (a) negative current unbalance; (b) voltage waveform; (c) harmonics spectrum; (d) current and power waveform.
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Figure 16. Experimental dynamic waveforms of proposed MPDPC with reference active power steps from 1000 W to −1000 W (a) voltage and current of phase A; (b) active power and reactive power of converter.
Figure 16. Experimental dynamic waveforms of proposed MPDPC with reference active power steps from 1000 W to −1000 W (a) voltage and current of phase A; (b) active power and reactive power of converter.
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Figure 17. Experimental dc-link capacitor voltage waveforms of proposed MPDPC with reference active power steps from 1000 W to −1000 W and a different weighting coefficient.
Figure 17. Experimental dc-link capacitor voltage waveforms of proposed MPDPC with reference active power steps from 1000 W to −1000 W and a different weighting coefficient.
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Table 1. Voltage vectors of fault-tolerant bidirectional voltage source converter (BVSC) with phase a fault.
Table 1. Voltage vectors of fault-tolerant bidirectional voltage source converter (BVSC) with phase a fault.
U(Sb, Sc)Switch onuαuβ
U1(0, 0)S4, S62Udc2/30
U2(0, 1)S4, S5(Udc2Udc1)/3 3 ( U d c 1 + U d c 2 ) / 3
U3(1, 0)S3, S6(Udc2Udc1)/3 3 ( U d c 1 + U d c 2 ) / 3
U4(1, 1)S3, S5−2Udc2/30
Table 2. System parameters of fault-tolerant BVSC.
Table 2. System parameters of fault-tolerant BVSC.
SymbolSystem ParametersValue
Udcdc-side voltage400 V
C1, C2Capacitance1000 μF
LFilter inductance10 mH
Rline resistance0.2 Ω
ePower line voltage190 V
fPower line frequency60 Hz
TAC transformerY-Y, 190 V/75 V, 5 kVA
λWeighting factor1000
fsampSampling frequency20 kHz
Table 3. Comparison of current THD and unbalance.
Table 3. Comparison of current THD and unbalance.
Working ModeTHDNCR
BVSC in inverter mode44.6%99.8%
Fault-tolerant BVSC in inverter mode2.4%1.1%
BVSC in rectifier mode25.3%99.9%
Fault-tolerant BVSC in rectifier mode2.7%0.9%

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MDPI and ACS Style

Jin, N.; Guo, L.; Yao, G. Model Predictive Direct Power Control for Nonredundant Fault Tolerant Grid-Connected Bidirectional Voltage Source Converter. Energies 2017, 10, 1133. https://doi.org/10.3390/en10081133

AMA Style

Jin N, Guo L, Yao G. Model Predictive Direct Power Control for Nonredundant Fault Tolerant Grid-Connected Bidirectional Voltage Source Converter. Energies. 2017; 10(8):1133. https://doi.org/10.3390/en10081133

Chicago/Turabian Style

Jin, Nan, Leilei Guo, and Gang Yao. 2017. "Model Predictive Direct Power Control for Nonredundant Fault Tolerant Grid-Connected Bidirectional Voltage Source Converter" Energies 10, no. 8: 1133. https://doi.org/10.3390/en10081133

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