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Article

On the Performance Optimization of Two-Level Three-Phase Grid-Feeding Voltage-Source Inverters

Department of Electrical Engineering, Faculty of Engineering, Jordan University of Science and Technology, Irbid 22110, Jordan
*
Author to whom correspondence should be addressed.
Energies 2018, 11(2), 400; https://doi.org/10.3390/en11020400
Submission received: 11 January 2018 / Revised: 31 January 2018 / Accepted: 5 February 2018 / Published: 9 February 2018

Abstract

:
The performance optimization of the two-level, three-phase, grid-feeding, voltage-source inverter (VSI) is studied in this paper, which adopts an online adaptive switching frequency algorithm (OASF). A new degree of freedom has been added to the employed OASF algorithm for optimal selection of the weighting factor and overall system optimization design. Toward that end, a full mathematical formulation, including the impact of the coupling inductor and the controller response time, is presented. At first, the weighting factor is selected to favor the switching losses, and the controller gains are optimized by minimizing the integral time-weighted absolute error (ITAE) of the output active and reactive power. Different loading and ambient temperature conditions are considered to validate the optimized controller and its fast response through online field programmable gate array (FPGA)-in-the-loop. Then, the weighting factor is optimally selected to reduce the cost of the L-filter and the heat-sink. An optimization problem to minimize the cost design at the worst case of loading condition for grid-feeding VSI is formulated. The results from this optimization problem are the filter inductance, the thermal resistance of the heat-sink, and the optimal switching frequency with the optimal weighting factor. The VSI test-bed using the optimized parameters is used to verify the proposed work experimentally. Adopting the OASF algorithm that employs the optimal weighting factor for grid-feeding VSI, the percentages of the reductions in the slope of the steady state junction temperature profile compared to fixed frequencies of 10 kHz, 14.434 kHz, and 20 kHz are about 6%, 30%, and 18%, respectively.

1. Introduction

Control of distributed generations (DGs) and AC microgrids becomes crucial, especially with the increased integration of renewable energy generators (REGs) with the grid. Moreover, energy storage systems (ESSs) are now an essential part in any utility-scale or even small-scale REGs. In these systems, voltage source inverter (VSI) is a primary element that interfaces between DC and AC sides. Enhancing the reliability and improving the performance of the VSI are respected aims that have a great reflection on the AC microgrid and generally on the electrical power system [1]. These aims can be achieved by introducing flexible ac transmission systems (FACTs) to utility-scale REGs and improving the utilized control schemes [2].
Based on the VSI mode of operation, DGs can be categorized into three general modes: grid forming, grid feeding, and grid supporting [3]. For grid-connected DGs, grid feeding mode is more commonly used. Therefore, it is considered in this paper. Two important goals shape the scope of this work which are the quality of the output current total demand distortion (TDD) that is ruled by standards and the power losses inside the VSI as a representation of inverters’ efficiency. Unfortunately, the above goals are contradictory objectives and giving more weight or priority to one of them will degrade the other one.
Power losses in insulated-gate bipolar transistors (IGBTs) and their associate antiparallel diodes can be classified into two groups: insignificant and significant power losses. The insignificant power losses include (1) blocking losses, (2) driving losses, and (3) the diode turn-on losses [4]. The significant losses consist of (1) the conduction losses related to the desired output (minimizing this part is not attractive), (2) on-off losses in IGBTs, and (3) turn-off diode losses [5]. In this work, the last two terms—switching and recovery losses—are considered as one objective function.
As a crucial player in the control of VSIs, f s w is considered as the main decision variable of the optimization problem [6]. In the literature [7,8,9,10,11], switching frequency was used either to improve the inverter efficiency [7,9] or the quality of the output power [10,11]. The fixed switching frequency for all conditions was considered in [5] at the maximum possible total harmonic distortion (THD), and in [11] the trajectory of the switching frequency was stated for the single phase inverter based on the calculus of variations. An offline trade-off between electromagnetic torque ripple and losses of the salient-pole permanent magnet synchronous motor was used in [7] to minimize the inverter losses. In [10], the switching frequency was selected to minimize the acoustic noise of the three-phase induction motor. The switching frequency is used in [8] to analyze and design the LCL filter in the grid-connected, cascaded, multilevel inverter to improve harmonic attenuation and reduce the damping power loss.
An online adaptive switching frequency (OASF) algorithm that considers the power quality of the output current and the efficiency of the VSI as a combined objective function is presented recently in [12]. Due to its simplicity and online capability, the variable f s w algorithm in [12] is adopted in this study. The employed OASF depends on the weighting factor to achieve a trade-off between the power quality of the output current and the efficiency of the VSI. The selection of the weighting factor and the overall system optimization design have not been covered or discussed in [12]. A new degree of freedom is added to the employed OASF algorithm for the optimal selection of the weighting factor and the overall system optimization design.
This weighting factor is another degree of freedom that can contribute to the improvement of the performance of the grid-feeding VSI. Selecting the weighting factor can be done in two ways: (1) by giving more priority to one of the two objectives (in this paper, the switching losses are prioritized); or (2) by selecting the optimal weighting factor to minimize a certain cost function.
Toward that end, the design process first selects the weighting factor and optimizes the gains of the controllers to have a fast response time by minimizing the integral time-weighted absolute error (ITAE) of the output active and the reactive power. After that, based on the first stage results, the optimized controller gains are used and an optimal weighting factor is selected based on filter and heat-sink cost minimization. A full mathematical formulation, including the impact of the coupling inductor and the controller response time, is presented in this paper. Under all conditions, the output power signal meets all standards and improves the performance of the grid-feeding VSI, which is proven through FPGA-in-the-loop verification and experimentally. Besides that, the presented algorithm not only improves the performance of the VSI under all loading conditions, including the rated conditions, but also improves the system reliability by considering the importance of the acceptable range of the junction temperature of the IGBT and its antiparallel diode.
The main contributions of this paper are (i) to provide a full mathematical formulation and analysis, including the impact of the coupling inductor and the controller response time on the performance optimization of the two-level three-phase grid-feeding voltage-source inverters; and (ii) to provide a method for the optimal selection of the weighting factor and the overall system optimization design so that the budget for the heat sink and the passive filter is minimized while the performance is improved without any violation to any harmonic standards or the junction temperature limits at any loading condition.
The remainder of this paper is organized as follows. The estimation of power losses, the thermal modeling of IGBT power module, and the time-domain current ripple analysis are presented in Section 2. The adopted OASF algorithm with an extra degree of freedom is presented in Section 3. FPGA-in-loop verification is done in Section 4. Optimal selection of the weighting factor and the experimental validation are discussed in Section 5. Finally, the paper is concluded in Section 6. The nomenclatures that are used throughout this paper can be found at the end of this paper.

2. Inverter Power Losses and Output Current TDD

To improve the performance of the system shown in Figure 1, different design and control variables can optimally be selected. Besides the proportional-integral (PI) controller’s gains ( K P P Q ,   K I P Q , K P I ,   K I I ), the value of the inductance of the L-type filter ( L ) and the control variables in PQ-controlled DG systems can be optimized as well. Moreover, optimal selection of switching frequency and optimal design of the heat-sink improve the performance of the grid-feeding inverters under different loading and weather conditions. The improvement can be seen by measuring the TDD and the efficiency of the inverter, in which these two contradictory objectives have an important reflection on the junction temperatures of the IGBT and its associated anti-parallel diode. Both the temperature and the variation of the temperature have a significant impact on the life time of any power-electronic device, and the IGBT power module is not an exception [13]. Efficient optimization of these two objectives is necessary and must rely on an accurate mathematical representation of the power-electronic system under study. Both objectives are mathematically linked together in this section, and the detailed derivations can be found in [12,14,15,16,17,18,19,20].
If a sinusoidal current is flowing through a power-electronic module, PCQ and PCD can be formulated as in Equations (1) and (2).
P C Q = V C E 0   i p k 2 π + R C E i p k 2 8 +   ( V C E 0 i p k 8 + R C E i p k 2 3 π )   m   cos ( θ )
P C D = V f 0   i p k 2 π + R f i p k 2 8   ( V f 0 i p k 8 + R f i p k 2 3 π )   m   cos ( θ )
Based on manufacturer datasheet parameters and the average behavioural model, E o n and   E o f f as a function of the phase-current (ic) flowing through the IGBT and junction temperature of the IGBT can be expressed by employing surface curve fitting of E o n ( i c , T j Q ) and E o f f ( i c , T j Q ) as in Equations (3) and (4), respectively. The subscripts on,test and off,test in Equations (3) and (4) represent the on and the off test conditions provided by manufacturer datasheet for energy losses measurements and α d c = V d c V d c , t e s t .
E o n = E o n ( R g , o n ) E o n ( R g , o n , t e s t )   α d c E o n ( i c , T j Q )
E o f f = E o f f ( R g , o f f ) E o f f ( R g , o f f , t e s t )   α d c E o f f ( i c , T j Q )
Integrating these energy losses over one fundamental period, the IGBT average switching losses per-period can be given as:
P s w Q = E o n + E o f f π f s w
Adopting average behavioural model and surface curve fitting tools E r e c can be represented as in Equation (6), and the diode average switching losses per-period are expressed as in Equation (7).
E r e c = α d c E r e c ( R g , o n ) E r e c ( R g , o n , t e s t )   E r e c ( i f , T j )
P s w D = E r e c π f s w
The total power losses P T in three-phase module under sinusoidal pulse width modulation (SPWM) are shown in Equation (8).
P T = 6   ( P C Q + P C D + P s w Q + P s w D )
Based on the well-known circuit shown in Figure 2 [14], the case, the IGBT, and the diode junction temperatures can be extracted as in Equations (9)–(11). To this end, all significant power losses are formulated and their impact on the junction temperatures is shown without excluding the ambient temperature.
T c = 6   ( P Q + P D )   ( R CS + R SA ) + T a
T j Q = P Q   R j C Q + T c
T j D = P D   R j C D + T c
Another point of interest of this work is the TDD of the output current. As a PQ-controlled inverter, the load of this DG can be represented as an ideal grid voltage source in series with inductive element as shown in Figure 1. This assumption is applicable for motor-drive application as well [14,15,16]. During any switching period, the inductor current is assumed linear, either in charging or discharging mode, with a constant fundamental component. For star-connected load, the current ripple per fundamental period can be expressed as in Equation (12). The TDD is expressed as in Equation (13).
I ^ h , r m s = m V d c 16 3 L f s w 2 16 3 3 π m + 3 2 m 2
T D D = I ^ h , r m s I ¯ L , r a t e d

3. Online Adaptive Switching Frequency Algorithm

THD standards are related to certain loading conditions, and most of DGs are loaded based on the available or pre-scheduled dispatch energy that does not necessarily match the rated output power. To fulfill the standards at rated conditions, a higher switching frequency can be selected; this increase in switching frequency has mainly two impacts on the power electronics module: (i) the switching losses will increase and (ii) the junction temperature will increase as well. Therefore, linking and adapting the switching frequency with loading conditions is important to improve the overall VSI performance under any circumstance.
Different variable f s w algorithms are presented to improve the performance of the VSI by changing the switching frequency within the power fundamental period [21,22,23,24]; in this work, the switching frequency is related to the scheduled power references, and all regulations and performance indices are taken into consideration to ensure optimal operation between the contradictory requirements. In other words, OASF algorithm is adopted to ensure a proper trade-off between TDD and switching losses with firm satisfaction of the operation constraints under any loading condition. This trade-off between the two contradictory objectives is represented by a positive weighting factor w as shown in Equation (14).
Minimize   F u ( f s w ) = w P s w ( f s w ) + ( 1 w ) T D D ( f s w )
Equation (14) is a multi-objective optimization problem, in which the switching frequency is the key player that determines the switching losses and the TDD at the point of common coupling (PCC) based on the previous formulations. The weighting factor can be any fraction between 0 and 1. Selection of the weighting factor depends on the priority of the two objective functions. For large scale VSI, more weight can be given to the switching losses, and w can be selected to be around 60%. Another way to select w is to state a third objective function like the cost of the used filter, and then w will be considered as a new degree of freedom. One possible way of optimizing this weighting factor is presented in Section 5.
The practical values of P s w and TDD cannot be fairly compared in either order of magnitude or units; doing so will lead to the obtaining of a misleading result. To handle this, the objective function in Equation (14) is normalized and updated based on the boundaries of the optimization problem as in Equation (15), in which the superscript ideal notation is related to the minimum possible value.
Min   F u n ( f s w ) = w P s w ( f s w ) P s w i d e a l P s w n a d i r P s w i d e a l + ( 1 w ) T D D ( f s w ) T D D i d e a l T D D n a d i r T D D i d e a l
The T D D i d e a l solution is linked to f s w u p , and P s w i d e a l is the minimum possible total switching loses at f s w l o w . On the other hand,   P s w n a d i r and T D D n a d i r are the maximum possible values on the Pareto curve.
The mathematical formulations in Section 2 need to be updated to comprise the contradictory functions in this optimization problem. These functions and boundaries of the Pareto curve can be rewritten as in Equations (16) and (17). The value of P s w n a d i r is limited by many constraints, and it is linked with the junction temperature and the derivation of P s w n a d i r , which will be shown later in this section.
P s w = A f s w ;   P s w i d e a l = A f s w l o w ;   P s w n a d i r = A f s w u p
T D D = B f s w ;   T D D n a d i r = B f s w l o w ;   T D D I d e a l = B f s w u p
in which the constants A and B can be extracted from Equations (13) and (8) as follows
A = 6 ( E o n + E o f f + E r e c ) π
B = m V d c 16 3 L I r a t e d 2 16 3 3 π m + 3 2 m 2
Then, the normalized objective function F u n will be
F u n ( f s w ) = 1 f s w u p f s w l o w ( w ( f s w f s w l o w ) + ( 1 w ) f s w l o w ( f s w u p f s w 1 ) )
Differentiating Equation (20) yields Equation (21), and solving Equation (21) yields the optimal switching frequency f s w o p t as finalized in Equation (22).
d F u n d f s w | f s w = f s w o p t = w 1 f s w u p f s w l o w ( 1 w ) f s w u p f s w l o w f s w u p f s w l o w 1 ( f s w o p t ) 2 = 0
f s w o p t = f s w u p f s w l o w ( 1 w ) w
From the thermal resistance circuit, linking switching power losses with the junction temperature and P s w n a d i r is related to the maximum junction temperature. It is assumed that T j D max = T j Q max = T j max . Subtracting Equation (11) from Equation (10) yields Equation (23), and making use of Equation (9) at T j D max , the maximum power loss of the diode and IGBT can be related to each other via the thermal resistance as in Equation (24)
T j Q T j D = P Q   R j C Q P D   R j C D
P Q max = R j C D R j C Q P D max
From Equations (9), (23), and (24), the effect of ambient temperature and the junction temperature on the diode power losses can be expressed as in Equation (25).
P D max = T j max T a R j C D + 6 ( R C S + R S A ) ( 1 + R j C D R j C Q )
Changing the switching frequency without monitoring the junction temperature may lead to power module failure. As the conduction losses can be estimated, the maximum possible switching losses are limited to the difference between the maximum power losses and the conduction loss as seen in Equations (26) and (27) for the diode and the IGBT, respectively
P s w D max = P D max P C D P s w Q max = P Q max P C Q
Finally, P s w n a d i r can be expressed as:
P s w n a d i r = 6   ( P D max   ( 1 + R J C D R J C Q ) P C D P C Q )
Figure 3 shows a summary of the proposed work, in which the proposed algorithm is shown in Figure 3a, while the OASF implementation in the FPGA is shown in Figure 3b. The case temperature is sensed and used as input to the thermal model to estimate T j Q ,   T j D , and T a . The loading condition and both T j Q and T j D can be used to estimate the conduction and the energy switching losses based on the behavioral model. Thus, the optimal switching frequency can be readily calculated given the optimal weighting factor w o p t .
Two scenarios are considered in the following two sections:
First scenario (S.A): “Weighting factor is selected to favor the switching losses and the controller gains are optimized”. The first scenario, presented in Section 4, is used for FPGA-in-loop verification and consists of the following three steps:
Step1.A: Filter inductance is known and weighting factor is selected based on the priority of one objective over the other. The value of the L-filter is important in decoupling the d and q controllers, and this challenge is important in the second scenario.
Step2.A: The PI-controller’s gains shown in Figure 1 are optimally selected based on the ITAE of the output PQ response. Step change is applied to the references signals ( P r e f and Q r e f ), and teaching-learning-based optimization (TLBO) algorithm is used to select the optimal gains.
Step3.A: The weighting factor is selected with higher priority to switching losses ( w = 60 % ), and the online algorithm is tested and compared with fixed switching frequencies through FPGA-in-the-loop verifications with fast change in the reference power or the ambient temperature. For the first scenario, two tests are carried out:
  • The output power varies from 10% to 100% of 33 kW with 10% step in very brief time (0.5 s) under constant ambient temperature as in Section 4.1.
  • The load is kept constant at the rated load and the ambient temperature varies from 10 °C to 50 °C with 10 °C step at each 0.5 s as in Section 4.2.
Second scenario (S.B): “The weighting factor is optimally selected as a new degree of freedom to reduce the cost of the L-filter and the heat sink”. The second scenario, presented in Section 5, is used to validate the proposed work experimentally and consists of the following two steps:
Step1.B: This scenario is used to verify the work experimentally and analyze the results when there is no significant importance of the switching losses over the quality of the output current as the main objective for the design stage is the cost.
Step2.B: All system, control variable, operational limits, and constraints are considered under the extreme case in which the system is fully loaded (0.9 power factor and 50 °C ambient temperature, to optimally find the weighting factor, switching frequency, filter inductance, and heat sink).
The designed parameters from (SB.Step2.B) are used, and the system is tested while changing load from 10% to 100% of 1.0 kW.
The results are compared with conventional fixed switching frequencies, which are 10 kHz, 20 kHz, and the optimal switching frequency at the extreme case 14.434 kHz in (SB.Step2.B)

4. FPGA-In-The-Loop Verification

4.1. Effect of the Load Change

In this section, the relationship between the two objectives and the switching frequency under different loading conditions is discussed, and the benefits of the proposed algorithm with its ability to maintain the TDD standards at the PCC are shown. A 33 kVA, 380 V, 50 Hz VSI is used with different scheduled power references as shown in Figure 4a. For a weighting factor of 60% and unity power factor, the power reference is changed every 0.5 s starting from 6.6 kW and finishing with 33 kW as in Figure 4a. The proposed algorithm is tested through FPGA in-the-loop to check its computational time. As can be seen from Figure 4b, the corresponding optimal switching frequency of the proposed algorithm is decreasing to attain an optimal trade-off between the switching losses represented by the junction temperatures as in Figure 4c and the TDD as in Figure 4d. The larger the load, the lower the switching frequency, and hence the higher the TDD. The relationship between the switching frequency and the continuous variation of the load from 10% to 100% of the rated capacity is clearly illustrated in Figure 5a. Form results in Figure 5, it can be concluded that the switching frequency decays exponentially as the load increases.
One of the key features of the proposed algorithm is the accurate observation of IGBT and diode junction temperatures while considering the ambient temperature and the conduction losses that are mainly related to loading conditions.
The rate of change of operating temperature is the main cause of failure of most power-electronic switches and electrical devices. From Figure 5b,c, the operating temperature profile under the proposed algorithm is flatter and at lower level compared with the results from middle and upper switching frequencies. Only the minimum switching frequency can result in lower temperatures but with higher TDD as in Figure 6. This coincides with the goals of the proposed algorithm and adds more robustness to the power module when its life time is extended. From Pareto curve, 4.858 kHz is the lower switching frequency and 14.58 kHz is the upper switching frequency. The average of these two frequencies is the middle frequency, which is 9.719 kHz. Comparing the results from OASF algorithm with the results from the optimal two switching frequencies (lower and upper) and its middle value shows the apparent effectiveness of the proposed work.
Alternatively, as the load increases, the TDD resulted from the utilization of the proposed algorithm (Figure 6) will start from its minimum value, which is achieved by selecting the highest switching frequency and then increasing linearly to reach the highest TDD at full loading condition. This shows that the TDD under the OASF algorithm follows the regulation at all loading conditions.

4.2. Effect of Variation of Ta under the Rated Loading Condition

To study the impact of T a , which did not attract a lot of attention in the literature, the load is kept constant at the rated value and unity power factor, while the ambient temperature varies from 5 to 50 ° C with 10 degrees-step at each 0.5 s, as shown in Figure 7a. This brief time is selected to be relatively small with respect to the practical rate of change to test the effectiveness of the proposed work as an online algorithm and to summarize the results in smaller figures. The switching frequency decreases as the temperature increases (Figure 7b) to ensure the optimal trade-off between switching losses and TDD (Figure 7d) while keeping the junction temperature within the operational range as indicated in Figure 7c. Moreover, the switching frequency linearly decreases as the ambient temperature increases, as shown in Figure 8a. The temperature profiles shown in (Figure 8b) and (Figure 7c) have smaller range of variation than the other fixed frequencies. At low temperatures, the junction temperatures when OASF algorithm is adopted are close to the junction temperatures obtained from the upper limit of the switching frequency and end with the lower limit of the switching frequency at high ambient temperature.
Figure 8 and Figure 9 illustrate the meaning of the trade-off between the selected objective functions. The OASF algorithm finds the optimal solution when both TDD and power losses are considered. Moreover, the flatter temperature profile (Figure 8b,c) proves the importance of including the ambient temperature and how OASF algorithm is useful to the performance of the VSI. Giving more weight to the switching losses will lead to the touching of the optimization boundaries at lower ambient temperatures.

5. Optimal Selection of Weighting Factor and Experimental Validation

Selecting the weighting factor of the objective function can be considered as an additional degree of freedom of the proposed algorithm. The weighting factor is selected to attain the lowest cost of the heat-sink and the filter. As discussed in the previous part, the minimum switching frequency occurs at maximum output power and maximum ambient temperature. Therefore, the filter should be designed at the minimum optimal switching frequency. Moreover, the cooling system must be designed at this point, because the maximum junction temperature is linked to the same loading condition. The optimization problem formulation that is used to find the minimum cost design at the worst case of loading condition is:
Min     C t o t = 3 × C L ( L ) + C S A ( R S A ) s . t . T j Q T j Q max T j D T j D max T D D T D D max f s w 10 / τ c l o s e d
where
C L ( L ) = 10.5 + 0.84   L C S A ( R S A ) = 16.42 / ( R S A 0.0105 ) τ c l o s e d = 2 × 10 3 L / K P P Q
In Equation (29), C L is the curve-fitted cost of a fixed single-phase inductor (mH), which can carry the rated current, and C S A is the cost of the heat sink, which can work at full load condition. Interpolating the price offers from manufacturers’ database, as well as the cost functions C L and C S A , can be determined [18]. The last equation in (29) relates the impact of the coupling inductor to the controller response time.
Based on the datasheet, the first and second constraints of the optimization process T j Q max and T j D max are set to be 125 ° C , and according to the IEE-519 standards; the third constraint T D D max is set to be less than 5%. The fourth constraint of the optimization process represents the dependency of the closed-loop controller bandwidth on the value of the inductance. At this point, the bandwidth is selected to be 10 times slower than f s w . The maximum ambient temperature is assumed to be 50 ° C . These constraints are used to find the optimal control and design variable in this extreme case. After that, VSI will be tested at different loading and temperature conditions and the performance will be compared against three fixed switching frequencies.
The results from this optimization problem are the desired inductance L , the thermal resistance of the heat sink R S A , and the optimal switching frequency f s w o p t . As the boundaries of the switching frequency are known ( f s w l o w , f s w u p ) and f s w o p t is determined based on Equation (28), then the optimal weighting factor w o p t can be extracted from Equation (22). For V d c = 100   V ,   V a c = 70   V , T a = 50   ° C , and 1.0 kW rated power at 0.9 lagging power factor, the results of the optimization problem of Equation (28) are:
w o p t = 0.4916 , f s w o p t = 14.434   kHz , R S A = 4.01   C / W , L = 0.786   mH   for optimal cost C t o t o p t = 37.586 $ .
Figure 10 shows the experimental setup that is used to verify the proposed work. As the load varies at T a = 25   ° C , and unity power factor varies from 10% to 100% of the rated power, f s w o p t will decrease exponentially as in Figure 11a. A comparison with three fixed switching frequencies (10 kHz, 20 kHz, and 14.434 kHz) is carried out as shown in Figure 11b,c, in which the estimated junction temperatures and the experimental TDD increase as the load increases. Moreover, since the load is resistive, the TDD will be fixed with fixed switching frequencies, while with OASF algorithm, the switching frequency will decrease as the load increases. Hence, the TDD will increase. From Figure 11a, the full-load optimal f s w is higher than 14.434 kHz (18.9 kHz); this is because of the change in the ambient temperature and the load power factor that relaxes the constraints on the optimal f s w .
It is clear from the IGBT junction temperature (Figure 11c) that the weighting factor does not give any priority to the switching losses, but the rate of change is better (flatter) with OASF algorithm. The experimental TDD (Figure 11b), which is the second objective, gets benefits from this weighting factor, and TDD from OASF is much lower than the other fixed switching frequencies. TDD is more than 5% when the switching frequency is 10 kHz or 14.434 kHz. The last result shows that fixed f s w , which is optimal in the extreme case, is infeasible when the load power factor becomes unity.
Figure 11 shows the importance of adopting the OASF algorithm that employs the optimal weighting factor for grid feeding VSI; the percentages of the reductions in the slope of the steady state junction temperature profile compared to fixed frequencies of 10 kHz, 14.434 kHz, and 20 kHz are about 6%, 30%, and 18%, respectively.

6. Conclusions

In this paper, full mathematical formulations, including the impact of the coupling inductor and the controller response time on the performance optimization of two-level, three-phase, grid-feeding, voltage-source inverters are considered through the adoption of an online adaptive switching frequency algorithm (OASF) with a new degree of freedom. The adopted OASF algorithm with the extra degree of freedom has been fully analyzed. Based on these analyses, an optimization problem to minimize the cost design in the worst case of the loading condition for the gird-feeding VSI is formulated. The results from this optimization problem are the filter inductance, the thermal resistance of the heat sink, and the optimal switching frequency with the optimal weighting factor. Based on those results, VSI test-bed is designed, and experiments are conducted. From the experimental results, the performance of VSI is improved without any violation of any harmonic standards or the junction temperature limits at any loading condition, while the budget for the heat sink and the passive filter is minimized. Although, as with any variable switching frequency algorithm, changing the switching frequency of the VSI may lead to the oversizing of the output differential mode and the common mode filters, nevertheless the proposed work can be easily implemented in micro-controllers and can be extended to any power converter, which includes multi-level inverters, if the proper models for the power losses and the total demand distortion are constructed. While satisfying the harmonic constraints, the flatness of the junction temperature profile is enhanced even if compared with the minimum switching frequency. At least a 6% reduction in the slope of the junction temperature is achieved by employing the proposed work, which can contribute to the extension of the life time of the gird-feeding VSI, thus, providing a better transient capability while enhancing the overall performance.

Acknowledgments

Besides the open access fees, this research was supported by the deanship of research at Jordan University of Science and Technology (Grant number: 20150010).

Author Contributions

Issam A. Smadi, Saher Albatran and Hamzeh J. Ahmad participated in the research idea formulations and building the experimental setup. Issam A. Smadi and Saher Albatran updated the literature review and improved the quality of presentation. Issam A. Smadi formulated the control design and Saher Albatran and Hamzeh J. Ahmad implemented it. All authors participated in verifying the results and providing answers to all comments from reviewers. All authors read and approved the final manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

Nomenclature

The following nomenclature have been used in this paper
Switching and optimization variables
T Fundamental period [s]
T s w Switching period [s]
f s w Switching frequency [Hz]
T D D i d e a l TDD at f s w u p on the Pareto curve
f s w u p Maximum possible f s w [Hz]
P s w i d e a l Minimum possible switching losses on the Pareto curve [Hz]
f s w l o w Lowest possible f s w [Hz]
P s w n a d i r Maximum possible switching losses on the Pareto curve [W]
T D D n a d i r Maximum possible TDD on the Pareto curve
f s w o p t Optimal switching frequency [Hz]
w o p t Optimal value of the trade-off weighting factor
Antiparallel diode variables
V f 0 Diode threshold voltage [V]
R f Diode forward resistance [Ω]
Module datasheet parameters
E o n IGBT turn-on energy [J]
E o f f Diode turn-off energy [J]
R g Gate resistance [Ω]
T j D max Maximum possible diode junction temperature [ ° C ]
T j Q max Maximum possible IGBT junction temperature [ ° C ]
Load and system variables
L , L c h o c k e Inductance of the L-filter [mH]
i p k Peak value of the sinusoidal current [A]
i c Phase-current [A]
m Modulation index
θ Power factor angle [rad]
V d c Input dc voltage [V]
I ^ h , r m s rms current ripple [A]
I ¯ L , r a t e d rms load (inductor) current [A]
w Trade-off weighting factor
F u Objective function [$]
F u n Normalized objective function
Module and thermal model variables
T a Ambient temperature [ ° C ]
T j Junction temperature [ ° C ]
T c Case temperature [ ° C ]
T j D Junction temperature of the diode [ ° C ]
T j Q Junction temperature of the IGBT [ ° C ]
R j C D Junction to case diode thermal resistance [C/W]
R j C Q Junction to case IGBT thermal resistance [C/W]
R C S Case to heat sink thermal resistance [C/W]
IGBT variables
V C E 0 IGBT threshold voltage [V]
R C E IGBT turn-on resistance [Ω]
Module losses
P C Q Average per-phase conduction losses of the IGBT [W]
P C D Average per-phase conduction losses of the diode [W]
P s w Q IGBT average switching losses per-period [W]
E r e c Reverse recovery loss of the diode [W]
P s w D Diode average switching losses per-period [W]
P T Total power loss [W]
P Q Total power loss in the IGBT [W]
P D Total power loss in the diode [W]
Controller parameters
K p P Q Proportional gain of the PQ regulator
K I P Q Integral gain of the PQ regulator
K p I Proportional gain of the current regulator
K I I Integral gain of the current regulator
τ c l o s e d Controller closed loop time constant [s]
P r e f Active power reference
Q r e f Reactive power reference
P m Measured active power
Q m Measured reactive power
V d Direct axis voltage
V q Quadrature axis voltage
I d Direct axis current
I q Quadrature axis current
V r e f P W M Voltage reference to the PWM
PLLPhase-locked loop

References

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Figure 1. Schematic representation of grid-feeding VSI using the adopted OASF algorithm.
Figure 1. Schematic representation of grid-feeding VSI using the adopted OASF algorithm.
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Figure 2. Thermal circuit with common thermal resistance case to heatsink.
Figure 2. Thermal circuit with common thermal resistance case to heatsink.
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Figure 3. Summary of the proposed work (a) the used algorithm; (b) OASF implementation in the FPGA.
Figure 3. Summary of the proposed work (a) the used algorithm; (b) OASF implementation in the FPGA.
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Figure 4. Effect of the load change on the switching frequency, junction temperatures, and TDD, (a) the output power in kW; (b) the switching frequency in kHz; (c) the IGBT and diode junction temperatures in °C; (d) the TDD of the output current.
Figure 4. Effect of the load change on the switching frequency, junction temperatures, and TDD, (a) the output power in kW; (b) the switching frequency in kHz; (c) the IGBT and diode junction temperatures in °C; (d) the TDD of the output current.
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Figure 5. Optimal switching frequency and the junction temperature versus output power for different switching frequencies, (a) optimal switching frequency in kHz; (b) IGBT junction temperature under different switching frequencies; (c) diode junction temperature under different switching frequencies.
Figure 5. Optimal switching frequency and the junction temperature versus output power for different switching frequencies, (a) optimal switching frequency in kHz; (b) IGBT junction temperature under different switching frequencies; (c) diode junction temperature under different switching frequencies.
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Figure 6. TDD versus output power for different switching frequencies.
Figure 6. TDD versus output power for different switching frequencies.
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Figure 7. Effect of the ambient temperature on the switching frequency, junction temperatures, and TDD at rated load, (a) ambient temperature in °C (b) the switching frequency in kHz; (c) the IGBT and diode junction temperatures in °C; (d) the TDD of the output current.
Figure 7. Effect of the ambient temperature on the switching frequency, junction temperatures, and TDD at rated load, (a) ambient temperature in °C (b) the switching frequency in kHz; (c) the IGBT and diode junction temperatures in °C; (d) the TDD of the output current.
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Figure 8. Optimal switching frequency and junction temperatures versus ambient temperature for different switching frequencies, (a) optimal switching frequency in kHz; (b) IGBT junction temperature under different switching frequencies; (c) diode junction temperature under different switching frequencies.
Figure 8. Optimal switching frequency and junction temperatures versus ambient temperature for different switching frequencies, (a) optimal switching frequency in kHz; (b) IGBT junction temperature under different switching frequencies; (c) diode junction temperature under different switching frequencies.
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Figure 9. TDD versus the ambient temperature for different switching frequencies.
Figure 9. TDD versus the ambient temperature for different switching frequencies.
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Figure 10. Experimental setup.
Figure 10. Experimental setup.
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Figure 11. Optimal switching frequency, experimental TDD, and IGBT junction temperature for different switching frequencies, (a) optimal switching frequency in kHz; (b) the experimental TDD of the output current under different switching frequencies; (c) estimated IGBT junction temperature under different switching frequencies.
Figure 11. Optimal switching frequency, experimental TDD, and IGBT junction temperature for different switching frequencies, (a) optimal switching frequency in kHz; (b) the experimental TDD of the output current under different switching frequencies; (c) estimated IGBT junction temperature under different switching frequencies.
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MDPI and ACS Style

Smadi, I.A.; Albatran, S.; Ahmad, H.J. On the Performance Optimization of Two-Level Three-Phase Grid-Feeding Voltage-Source Inverters. Energies 2018, 11, 400. https://doi.org/10.3390/en11020400

AMA Style

Smadi IA, Albatran S, Ahmad HJ. On the Performance Optimization of Two-Level Three-Phase Grid-Feeding Voltage-Source Inverters. Energies. 2018; 11(2):400. https://doi.org/10.3390/en11020400

Chicago/Turabian Style

Smadi, Issam A., Saher Albatran, and Hamzeh J. Ahmad. 2018. "On the Performance Optimization of Two-Level Three-Phase Grid-Feeding Voltage-Source Inverters" Energies 11, no. 2: 400. https://doi.org/10.3390/en11020400

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