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Micromachines
Special Issues
3D Integration Technologies for MEMS
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3D Integration Technologies for MEMS

A special issue of Micromachines (ISSN 2072-666X).

Deadline for manuscript submissions: closed (25 June 2016) | Viewed by 64723

Special Issue Editors

Prof. Dr. Frank Niklaus

E-Mail Website
Guest Editor
Department of Micro and Nanosystems (MST), KTH Royal Institute of Technology, SE-10044 Stockholm, Sweden
Interests: MEMS; NEMS; micro and nano-fabrication; wafer bonding; heterogeneous 3D integration; MEMS packaging
Dr.-Ing. Roy Knechtel

E-Mail Website
Guest Editor
X-FAB MEMS Foundry GmbH Erfurt Harbergstrasse 67, D-99097 Erfurt, Germany
Interests: MEMS; acoustics; 3D integartion; wafer bonding

Special Issue Information

Dear Colleagues,

Packaging and integrating microelectromechanical systems (MEMS) with integrated circuits (ICs) is critical for the majority of MEMS devices. Technologies for three dimensional (3D) integration and packaging of MEMS are critical to realize cost-efficient and highly integrated components and, thus, these are hot research topics in both industry and academia. Accordingly, this Special Issue seeks to showcase high quality research papers, short communications, and review articles that focus on 3D integration technologies relevant for MEMS applications. Example topics include MEMS and IC integration, through silicon vias (TSV) technologies for MEMS, wafer bonding, wafer-level packaging of MEMS, vacuum sealing, 3D micro and nano-fabrication technologies, chip and wafer stacking, monolithic CMOS and MEMS integration, and heterogeneous 3D integration technologies.

Prof. Dr. Frank Niklaus
Dr. Roy Knechtel
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • three dimensional (3D) integration
  • MEMS and IC integration
  • through silicon vias (TSVs)
  • wafer stacking
  • chip stacking
  • wafer bonding
  • interposer substrate
  • wafer-level packaging of MEMS
  • system-on-chip (SoC)
  • system-in-package (SiP)

Published Papers (7 papers)

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Research

3581 KiB  
Article
Investigation of Au/Si Eutectic Wafer Bonding for MEMS Accelerometers
by Dongling Li, Zhengguo Shang, Yin She and Zhiyu Wen
Micromachines 2017, 8(5), 158; https://doi.org/10.3390/mi8050158 - 15 May 2017
Cited by 21 | Viewed by 9273
Abstract
Au/Si eutectic bonding is considered to BE a promising technology for creating 3D structures and hermetic packaging in micro-electro-mechanical system (MEMS) devices. However, it suffers from the problems of a non-uniform bonding interface and complex processes for the interconnection of metal wires. This [...] Read more.
Au/Si eutectic bonding is considered to BE a promising technology for creating 3D structures and hermetic packaging in micro-electro-mechanical system (MEMS) devices. However, it suffers from the problems of a non-uniform bonding interface and complex processes for the interconnection of metal wires. This paper presents a novel Au/Si eutectic wafer bonding structure and an implementation method for MEMS accelerometer packaging. The related processing parameters influencing the Au/Si eutectic bonding quality were widely investigated. It was found that a high temperature of 400 °C with a low heating/cooling rate of 5 °C/min is crucial for successful Au/Si eutectic bonding. High contact force is beneficial for bonding uniformity, but the bonding strength and bonding yield decrease when the contact force increases from 3000 to 5000 N due to the metal squeezing out of the interface. The application of TiW as an adhesion layer on a glass substrate, compared with a commonly used Cr or Ti layer, significantly improves the bonding quality. The bonding strength is higher than 50 MPa, and the bonding yield is above 90% for the presented Au/Si eutectic bonding. Furthermore, the wafer-level vacuum packaging of the MEMS accelerometer was achieved based on Au/Si eutectic bonding and anodic bonding with one process. Testing results show a nonlinearity of 0.91% and a sensitivity of 1.06 V/g for the MEMS accelerometer. This Au/Si eutectic bonding process can be applied to the development of reliable, low-temperature, low-cost fabrication and hermetic packaging for MEMS devices. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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1239 KiB  
Article
Investigation of Surface Pre-Treatment Methods for Wafer-Level Cu-Cu Thermo-Compression Bonding
by Koki Tanaka, Wei-Shan Wang, Mario Baum, Joerg Froemel, Hideki Hirano, Shuji Tanaka, Maik Wiemer and Thomas Otto
Micromachines 2016, 7(12), 234; https://doi.org/10.3390/mi7120234 - 15 Dec 2016
Cited by 13 | Viewed by 6657
Abstract
To increase the yield of the wafer-level Cu-Cu thermo-compression bonding method, certain surface pre-treatment methods for Cu are studied which can be exposed to the atmosphere before bonding. To inhibit re-oxidation under atmospheric conditions, the reduced pure Cu surface is treated by H [...] Read more.
To increase the yield of the wafer-level Cu-Cu thermo-compression bonding method, certain surface pre-treatment methods for Cu are studied which can be exposed to the atmosphere before bonding. To inhibit re-oxidation under atmospheric conditions, the reduced pure Cu surface is treated by H2/Ar plasma, NH3 plasma and thiol solution, respectively, and is covered by Cu hydride, Cu nitride and a self-assembled monolayer (SAM) accordingly. A pair of the treated wafers is then bonded by the thermo-compression bonding method, and evaluated by the tensile test. Results show that the bond strengths of the wafers treated by NH3 plasma and SAM are not sufficient due to the remaining surface protection layers such as Cu nitride and SAMs resulting from the pre-treatment. In contrast, the H2/Ar plasma–treated wafer showed the same strength as the one with formic acid vapor treatment, even when exposed to the atmosphere for 30 min. In the thermal desorption spectroscopy (TDS) measurement of the H2/Ar plasma–treated Cu sample, the total number of the detected H2 was 3.1 times more than the citric acid–treated one. Results of the TDS measurement indicate that the modified Cu surface is terminated by chemisorbed hydrogen atoms, which leads to high bonding strength. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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4088 KiB  
Article
Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding
by Simon J. Bleiker, Maaike M. Visser Taklo, Nicolas Lietaer, Andreas Vogl, Thor Bakke and Frank Niklaus
Micromachines 2016, 7(10), 192; https://doi.org/10.3390/mi7100192 - 18 Oct 2016
Cited by 11 | Viewed by 7916
Abstract
Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS) transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized [...] Read more.
Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS) transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS) compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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4173 KiB  
Article
Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration
by Takafumi Fukushima, Hideto Hashiguchi, Hiroshi Yonekura, Hisashi Kino, Mariappan Murugesan, Ji-Chel Bea, Kang-Wook Lee, Tetsu Tanaka and Mitsumasa Koyanagi
Micromachines 2016, 7(10), 184; https://doi.org/10.3390/mi7100184 - 10 Oct 2016
Cited by 19 | Viewed by 11366
Abstract
Plasma- and water-assisted oxide-oxide thermocompression direct bonding for a self-assembly based multichip-to-wafer (MCtW) 3D integration approach was demonstrated. The bonding yields and bonding strengths of the self-assembled chips obtained by the MCtW direct bonding technology were evaluated. In this study, chemical mechanical polish [...] Read more.
Plasma- and water-assisted oxide-oxide thermocompression direct bonding for a self-assembly based multichip-to-wafer (MCtW) 3D integration approach was demonstrated. The bonding yields and bonding strengths of the self-assembled chips obtained by the MCtW direct bonding technology were evaluated. In this study, chemical mechanical polish (CMP)-treated oxide formed by plasma-enhanced chemical vapor deposition (PE-CVD) as a MCtW bonding interface was mainly employed, and in addition, wafer-to-wafer thermocompression direct bonding was also used for comparison. N2 or Ar plasmas were utilized for the surface activation. After plasma activation and the subsequent supplying of water as a self-assembly mediate, the chips with the PE-CVD oxide layer were driven by the liquid surface tension and precisely aligned on the host wafers, and subsequently, they were tightly bonded to the wafers through the MCtW oxide-oxide direct bonding technology. Finally, a mechanism of oxide-oxide direct bonding to support the previous models was discussed using an atmospheric pressure ionization mass spectrometer (APIMS). Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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Graphical abstract

7069 KiB  
Article
Novel Capacitive Sensing System Design of a Microelectromechanical Systems Accelerometer for Gravity Measurement Applications
by Zhu Li, Wen Jie Wu, Pan Pan Zheng, Jin Quan Liu, Ji Fan and Liang Cheng Tu
Micromachines 2016, 7(9), 167; https://doi.org/10.3390/mi7090167 - 14 Sep 2016
Cited by 26 | Viewed by 8607
Abstract
This paper presents an in-plane sandwich nano-g microelectromechanical systems (MEMS) accelerometer. The proof-mass fabrication is based on silicon etching through technology using inductive coupled plasma (ICP) etching. The capacitive detection system, which employs the area-changing sensing method, combines elementary capacitive pickup electrodes with [...] Read more.
This paper presents an in-plane sandwich nano-g microelectromechanical systems (MEMS) accelerometer. The proof-mass fabrication is based on silicon etching through technology using inductive coupled plasma (ICP) etching. The capacitive detection system, which employs the area-changing sensing method, combines elementary capacitive pickup electrodes with periodic-sensing-array transducers. In order to achieve a large dynamic range with an ultrahigh resolution, the capacitive detection system employs two periodic-sensing-array transducers. Each of them can provide numbers for the signal period in the entire operating range. The suspended proof-mass is encapsulated between two glass caps, which results in a three dimensional structure. The measured resonant frequency and quality factor (Q) are 13.2 Hz and 47, respectively. The calibration response of a ±0.7 g input acceleration is presented, and the accelerometer system presents a sensitivity of 122 V/g and a noise floor of 30 ng/√Hz (at 1 Hz, and 1 atm). The bias stability for a period of 10 h is 30 μg. The device has endured a shock up to ±2.6 g, and the full scale output appears to be approximately ±1.4 g presently. This work presents a new opportunity for highly sensitive MEMS fabrication to enable future high-precision measurement applications, such as for gravity measurements. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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Graphical abstract

15633 KiB  
Article
Stacked Integration of MEMS on LSI
by Masayoshi Esashi and Shuji Tanaka
Micromachines 2016, 7(8), 137; https://doi.org/10.3390/mi7080137 - 05 Aug 2016
Cited by 19 | Viewed by 8345
Abstract
Two stacked integration methods have been developed to enable advanced microsystems of microelectromechanical systems (MEMS) on large scale integration (LSI). One is a wafer level transfer of MEMS fabricated on a carrier wafer to a LSI wafer. The other is the use of [...] Read more.
Two stacked integration methods have been developed to enable advanced microsystems of microelectromechanical systems (MEMS) on large scale integration (LSI). One is a wafer level transfer of MEMS fabricated on a carrier wafer to a LSI wafer. The other is the use of electrical interconnections using through-Si vias from the structure of a MEMS wafer on a LSI wafer. The wafer level transfer methods are categorized to film transfer, device transfer connectivity last, and immediate connectivity at device transfer. Applications of these transfer methods are film bulk acoustic resonator (FBAR) on LSI, lead zirconate titanate (Pb(Zr,Ti)O3) (PZT) MEMS switch on LSI, and surface acoustic wave (SAW) resonators on LSI using respective methods. A selective transfer process was developed for multiple SAW filters on LSI. Tactile sensors and active matrix electron emitters for massive parallel electron beam lithography were developed using the through-Si vias. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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Graphical abstract

6841 KiB  
Article
Compensation Method for Die Shift Caused by Flow Drag Force in Wafer-Level Molding Process
by Simo Yeon, Jeanho Park and Hye-Jin Lee
Micromachines 2016, 7(6), 95; https://doi.org/10.3390/mi7060095 - 24 May 2016
Cited by 17 | Viewed by 11306
Abstract
Wafer-level packaging (WLP) is a next-generation semiconductor packaging technology that is important for realizing high-performance and ultra-thin semiconductor devices. However, the molding process, which is a part of the WLP process, has various problems such as a high defect rate and low predictability. [...] Read more.
Wafer-level packaging (WLP) is a next-generation semiconductor packaging technology that is important for realizing high-performance and ultra-thin semiconductor devices. However, the molding process, which is a part of the WLP process, has various problems such as a high defect rate and low predictability. Among the various defect factors, the die shift primarily determines the quality of the final product; therefore, predicting the die shift is necessary to achieve high-yield production in WLP. In this study, the die shift caused by the flow drag force of the epoxy molding compound (EMC) is evaluated from the die shift of a debonded molding wafer. Experimental and analytical methods were employed to evaluate the die shift occurring during each stage of the molding process and that resulting from the geometrical changes after the debonding process. The die shift caused by the EMC flow drag force is evaluated from the data on die movements due to thermal contraction/expansion and warpage. The relationship between the die shift and variation in the die gap is determined through regression analysis in order to predict the die shift due to the flow drag force. The results can be used for die realignment by predicting and compensating for the die shift. Full article
(This article belongs to the Special Issue 3D Integration Technologies for MEMS)
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