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Article

Compact Low Loss Ribbed Asymmetric Multimode Interference Power Splitter

1
School of Information Science and Engineering, Dalian Polytechnic University, Dalian 116034, China
2
Research Institute of Photonics, Dalian Polytechnic University, Dalian 116034, China
*
Author to whom correspondence should be addressed.
Photonics 2024, 11(5), 472; https://doi.org/10.3390/photonics11050472
Submission received: 19 March 2024 / Revised: 9 May 2024 / Accepted: 13 May 2024 / Published: 17 May 2024
(This article belongs to the Special Issue Optical Fiber Communication Systems and Networks)

Abstract

:
Optical power splitters (OPSs) are utilized extensively in integrated photonic circuits, drawing significant interest in research on power splitters with adjustable splitting ratios. This paper introduces a compact, low-loss 1 × 2 asymmetric multimode interferometric (MMI) optical power splitter on a silicon-on-insulator (SOI) platform. The device is simulated using the finite difference method (FDM) and eigenmode expansion solver (EME). It is possible to attain various output power splitting ratios by making the geometry of the MMI central section asymmetric relative to the propagation axis. Six distinct optical power splitters are designed with unconventional splitting ratios in this paper, which substantiates that the device can achieve any power splitter ratios (PSRs) in the range of 95:5 to 50:50. The dimensions of the multimode section were established at 2.9 × (9.5–10.9) μm. Simulation results show a range of unique advantages of the device, including a low extra loss of less than 0.4 dB, good fabrication tolerance, and power splitting ratio fluctuation below 3% across the 1500 nm to 1600 nm wavelength span.

1. Introduction

Silicon-on-insulator (SOI) platforms are commonly regarded as platforms for low-cost, efficient, and dense integration of photonic devices due to their excellent high-index contrast and compatibility with the well-established complementary metal-oxide semiconductor (CMOS) fabrication process [1,2]. Since 2004, core-integrated structures on silicon-on-insulator (SOI) platforms have been demonstrated, including nanophotonic waveguides [3], grating couplers [4], and spot-size converters [5].
Integrated photonics [6] has attracted significant attention recently, due to the complementary and compatible relationship between integrated photonics and electronics. Optical power splitters (OPSs) serve as fundamental components of photonic integrated circuits. Among these optical power splitters, multimode interference (MMI) power splitters [7,8] have become an integral part of optoelectronic integrated circuits due to their significant fabrication tolerance, expansive operational bandwidth, and compact size. Depending on the application scenarios, different output power ratios are required from the OPS output port. This output power ratio can be characterized by the power splitter ratio (PSR). The ability to select power splitting ratios is important for photonic integrated circuit (PIC) applications such as nano-photonic phased arrays [9], asymmetric Mach–Zehnder interferometers (MZIs) [10], and ladder-type filters [11]. However, traditional MMI power splitters with two output ports are limited to fixed splitter ratios—100:0, 50:50, 85:15, and 72:28. This limitation highlights the important research value of OPS with adjustable power ratios. Due to platform limitations in this design, it is important to emphasize that the PSR is fixed after nanodevice fabrication and cannot be adjusted later. Therefore, it is imperative to rigorously design the device during the initial design phase.
Generally, three methods are used to realize adjustable optical power splitters (OPSs). The first method relies on directional couplers (DC) [12,13], which is a standard selection for achieving arbitrary power splitter ratios (PSRs). Devices designed through this method exhibit larger sizes, increased susceptibility to wavelength sensitivities, and tight fabrication tolerance, which strongly limits its applications. However, the ability of DC to easily adjustable PSRs compared to other devices cannot be overlooked [14]. The second method utilizes a deep learning-based inverse design process to develop a multimode interference power splitter that can realize adjustable PSRs [15]. This approach is an emerging design solution, and devices designed using this method have demonstrated favorable performance [16,17]. The third method is based on multimode interference coupler (MMI)-based OPSs, which are known for their compactness and excellent tolerance in manufacturing processes. Currently, the utilization of rib and strip waveguide photonic platform asymmetric MMI [18,19,20,21,22,23] for arbitrary OPSs has been extensively reported. Most of these studies realized asymmetric structures by removing a small rectangle in the coupling region. Adjustable PSRs are achieved by manipulating the length and width of the removed rectangle. In this paper, the asymmetric structure is realized by removing a triangle in the coupling region, and the PSR is achieved by changing the angle of the removal region. The approach we propose to achieve the asymmetric structure shows significant research value compared to traditional methods. It is important to note that using both methods increases the length of the device in a certain range.
This study introduces the process of a 1 × 2 asymmetric multimode interferometric MMI optical power splitter (OPS) optimized based on the SOI platform, as well as the evaluation of the device performance. The power splitter is based on a ribbed waveguide platform. A tapered structure is integrated between the output waveguide and the coupling area to reduce transmission loss through the optical waveguide. The results demonstrate the extra loss of the devices is less than 0.4 dB and the PSR variation is less than 3% in the range of 1500 nm to 1600 nm. Furthermore, the proposed devices have good fabrication tolerance and are compatible with the fabrication processes of popular high-performance CMOS photonic devices.

2. Theory and Structural Design

The schematic diagram of the proposed device is demonstrated in Figure 1a. The device was designed on an SOI platform with a 220 nm thick Si layer, a 3 μm thick SiO2 buried oxide layer, and an outer cladding material of SiO2. The structure of the devices adopts a rib waveguide platform, with a ridge height of 70 nm and a residual layer thickness of 150 nm.
The device is divided into three sections: a single-mode input area (I), an asymmetrically coupled region (II), and a region for power dissemination (III). The input region is characterized by a straight waveguide configuration, and the output region utilizes an asymmetric taper structure. Throughout the simulations, TE polarized light is injected into the coupling region through a waveguide width is 500 nm, splitting it into dual beams in the region of multimode interference coupling. These beams are accurately positioned onto the first pair of replicated images at ±WMMI/4 by the output waveguide as illustrated in Figure 1c,d. Specifically, the corner segment of the multimode interference coupling region demonstrates a faint energy distributed as observed in Figure 1c,d red circle area. These corners contain a little optical field, but removing one of them breaks the interference symmetry as follows the self-imaging principle [24]. Such asymmetric MMIs, when excited by asymmetric perturbation in the multimode region, will exhibit a significantly distinct optical field distribution [18]. Therefore, as the angle of the removal region increases in the asymmetric coupling region, there is a consequent alteration in the PSRs of the devices. Nevertheless, as the size of the removal region grows, the imaging position of the coupling area shifts rearward, extending the total length of the device. But the length does not vary significantly, so it does not have a strong impact on the footprint. By adjusting the angle and length of the removed region, it is possible to achieve any specific power division ratio and maintain a compact size.
In Figure 1a, the bottom output port is identified as the low-potent output side (denoted as P2), and the top side is recognized as the more potent output (denoted as P1). As depicted in Figure 1d, when θ ≠ 0, the electrical field distribution on the strong potent side intensifies notably. However, when θ = 0, the light field distribution on both output junctions exhibits uniformity. As θ increases, the asymmetry of the multimode interference zone increases, and the power imbalance becomes larger. By specifically adjusting the θ value according to this principle, it is possible to achieve power splitters capable of adjustment to any predetermined power splitting ratio (PSR).
In the 1 × 2 MMI coupler, two of the most critical performance parameters are the extra loss and the splitting ratio [25]. The extra loss can be defined by the following equation:
E x t r a   L o s s = 10 log 10 P o u t P i n
The power splitter ratio (PSR) of the device depends on the change in optical power of the output ports. Here, P1 denotes the optical power of output port 1 and P2 represents the optical power of output port 2. PSR can be calculated utilizing the following formula:
P S R = P 1 P 2 × 100 %
Multimode interference effects are well described by the guided-mode propagation analysis developed for step-index waveguides [24], according to which Lmmi is proportional to the beat length Lπ of the two lowest order modes [26]:
L π = π β 0 β 1 4 n r W e 2 3 λ 0
where β0 and β1 represent the propagation constants of the fundamental and the first-order modes, nr is an effective refractive index of the waveguide core, We is an effective fundamental mode width, which is proportional to the waveguide width, and λ0 is the wavelength of incident radiation in a vacuum. In the case of θ = 0°, the proposed device is symmetric, and it is equivalent to a 1 × 2 MMI. According to the self-imaging principle [24], two-fold images of the input TE0 mode occur when the length (L) of the multimode interferometric coupling region (Lmmi) satisfies the following condition [23]:
L m m i = 3 L π 4 N
where N is a non-negative integer (in this paper N = 2). By optimizing the length (L) and width (W) of the multimode region, a 1 × 2 OPS with a 50:50 power splitting ratio (PSR) and low extra loss can be achieved. In this case, the device exhibits a symmetric electric field distribution.
Therefore, by simultaneously optimizing θ and Lmmi, it is possible to achieve devices with low loss and arbitrary PSR. To meticulously design and fine-tune these structures, we perform simulations using the finite difference method (FDM) and an eigenmode expansion solver (EME). To ensure low extra loss, the optimal width for the input waveguide is set to be 0.5 μm, and the dimensions of the coupling region are 2.9 × (9.5–10.9) μm. The gap between the output waveguides (Wgap) is precisely tuned to 0.8 μm, and Δ1 = Δ2 = 0.35 μm, which facilitates efficient transfer of optical power to the output and minimizes power crosstalk.
Overall, by changing the value of θ in the asymmetric coupling region to adjust the size of the removal region, a 1 × 2 optical power splitter (OPSs) with a power splitting ratio (PSRs) ranging from 50:50 to 5:95 can be realized. This study discusses devices with PSRs of 50:50, 40:60, 30:70, 20:80, 10:90, and 5:95. The corresponding L and θ values are recorded in the Table 1. It is crucial to emphasize that the devices under discussion are specifically designed for the TE0 mode.

3. Simulation and Numerical Analysis of the Coupler

3.1. Determination of Single-Mode Conditions and Etching Depth

The dimensions of the input waveguide must fulfill the criteria for single-mode transmission to enhance communication reliability and transmission speed. This standard is necessary for the long-distance transmission of optical signals in waveguides. The finite difference method is utilized to optimize the structure. In this method, the width of the input waveguide is adjusted to accurately reflect the changes in the effective refractive index changes in both TE and TM modes.
The width range of the input waveguide as 0.2 μm to 1 μm is defined in our study. Within this range, systematically selected 50 values of the waveguide width parameter based on a consistent gradient. As illustrated in Figure 2a, TE1 and TM1 modes maintained a consistent linear pattern until the waveguide width reached 500 nm. However, beyond 500 nm, both TE1 and TM1 modes grew significantly while the TM0 and TE0 modes continued to evolve steadily. Consequently, before reaching the waveguide width of 500 nm, only one mode persists within the waveguide. At the same time, wider waveguides can also achieve higher energy transmission efficiency. Therefore, the optimal width of the input waveguide is 500 nm.
The etching depth of the device is simulated and adjusted to achieve the optimal height of the ridge layer. According to existing etching technology [27,28] and the 220 nm standard SOI platform, the effects of varying etching depths are simulated in the range of 0–150 nm on the normalized power of the #1 device. As shown in Figure 2c, the optimal etching depth for the device is between 50 nm to 70 nm. Considering relevant papers [20], the optimal etching depth is 70 nm.

3.2. Design of the Coupling Zone

Utilizing a multimode interference coupling region is a standard method for enhancing coupling efficiency, and it plays a crucial role in affecting the operational capacity of optical power splitters (OPSs) to divide incoming optical signals across multiple output channels. For the proposed device, the distribution ratio of the output ports may vary depending on the change in the coupling region. This necessitates an individualized design approach for each device.
Equation (3) shows that the beat length is directly proportional to the width of the coupling region, implying that a narrower coupler leads to a shorter coupling region. However, excessive narrowing of the width may introduce undesirable crosstalk, among the output ports. To resolve this issue, we use the eigenmode expansion solver (EME) in Mode Solutions software (lumerical2020R2 software) to determine the acceptable threshold. In summary, the overall step includes determining the width of the device, calculating the ideal length based on the identified width, and adjusting the angle in the removal zone to achieve the desired power distribution ratio. The optimal width for these devices is approximately 2.9 μm, as depicted in Figure 3. Therefore, the width of the MMI is adjusted to 2.9 μm and proceeds to calculate the optimal device length in accordance with this value. After determining the optimal length and width, the specific power ratio can be achieved by adjusting the angle of the removal region in the asymmetric coupling region.
Varying angles will lead to changes in the power splitting ratios (PSRs). The increase of θ leads to an expansion of both the removal region and the leaked light field, reducing the power at the weaker output port and enhancing the normalized power at the stronger output port. As illustrated in Figure 3a, as the θ increase a progressive decline in the power distribution ratio on the weaker output side is observed. When θ is less than 70 degrees, the decline rate of the power ratio is relatively moderate, and when θ exceeds 70 degrees, the decline rate is accelerated. From a theoretical standpoint, it is feasible to represent the entire spectrum of correlations between θ and PSR in the range of 50:50 to 0:100.
As depicted in Figure 3, the coupling region lengths are 9.6 μm and the angle of the rib geometry structure is 69.8 degrees for a power distribution ratio of 60:40, 10.2 μm and 75.2 degrees for 70:30, 10.6 μm and 78.8 degrees for 80:20, 10.7 μm and 82.1 degrees for 90:10, and 10.9 μm and 83.6 degrees for 95:5.

3.3. Design of Taper Structures

The multimode interference coupling region through a taper structure connected to the output waveguide. This structure effectively mitigates transmission loss enhances the power splitter transmission efficiency and preserves the wavelength dependence of the normalized transmission, as demonstrated in Figure 4c. Remarkably, the ideal taper dimensions are 2 μm in length and 0.85 μm in width, as illustrated in Figure 4a,b.
An important factor to consider is the distance between the two waveguides. When the distance is too close, it may lead to crosstalk and subsequently reduce the normalized transmission power. In this paper, an asymmetric taper structure is used to decrease the influence of crosstalk and avoid the presence of sharp corners on the device, reducing accordingly the losses caused by the roughness induced in the fabrication process [20]. As showed in Figure 1b, Wgap = 0.8 μm, Δ1 = Δ2 = 0.35 μm.

3.4. Simulation of Bandwidth and Extra Loss

The bandwidth of photonic devices is critically important because a wider bandwidth allows the device to function across a broader spectrum. Extra loss refers to the loss of energy owing to many different factors during optical transmission or processing. The extra loss of photonic devices directly impacts the performance and efficiency of the system. Therefore, devices that offer a wide operational range of frequencies and low extra loss have more exceptional performance.
Figure 5a illustrates that the PSR changes remain below 3% across the wavelength (1500 nm to 1600 nm). This result suggests that the optical power splitters under consideration exhibit minimal wavelength dependency with extensive bandwidth. It is important to note that expanding the removal region correlates with a gradual increase in device loss. As shown in Figure 5b, with the broadest removal region, the optical power splitter (OPSs) encounters its maximum loss at a power ratio of 5:95, but the maximum loss is still below 0.4 dB. With the increase in the wavelength (in the range of 1500 to 1600 nm), the loss decreases. An innovative strategy to further reduce extra loss is to rotate the output waveguide of P2 in a counterclockwise direction. This adjustment reduces extra loss to a certain degree capturing more optical power from the multimode interference region [29]. However, this modification necessitates greater fabrication accuracy and increases the complexity of the construction of the optical power splitter.

3.5. Fabrication Tolerance Analysis

Fabrication tolerance is a critical factor in evaluating the robustness of the device. Due to imperfections in manufacturing and operational procedures, some fabrication tolerance is unavoidable. The study conducted a numerical analysis of the fabrication tolerance of the device by adjusting the etching depth (H) and the angle of the removal area (θ). This work was conducted based on optimized devices.
The total thickness of the silicon layer is 220 nm. The etching depth is permitted to vary in a predetermined range to account for potential discrepancies in the etching procedure. The ∂PSR/∂H((5 nm)−1) represents the rate of change in PSR for every 5 nm change in etch depth. Figure 6a demonstrates that the maximum variation in the power splitter ratios (PSRs) remains under 1% per 5 nm change in etching depth.
The design is realized by adjusting the angle of the removal region. This change adjusts the multimode region symmetry, thereby affecting power distribution. Accordingly, any change in the removal region angle can induce significant PSR changes. An evaluation of the rate of change in comparison to the original specific power distribution is carried out by fine-tuning the angle of the removal region to ±0.2 degrees from the normal angle. Figure 6b illustrates that an angle adjustment for a device with a power splitter ratio of 70:30 initiates the most significant change in the device power distribution, while the maximum change in PSR is maintained below 0.5%. The results indicate that the angle and etching depth in a certain range have little influence on the OPSs of the device and have good fabrication tolerance under the existing fabrication conditions.

4. Results and Discussion

After conducting a series of simulations and data analysis. The ridge height and the thickness of the residual layer were determined to be 0.07 μm and 0.15 μm, respectively. the size of the coupling region was set to 2.9 × (9.5~10.9) μm, the length of the taper structure was set to 2 μm and the width was 0.85 μm.
The total loss of the six devices in the range of 1500 nm to 1600 nm is less than 0.4 dB. In fact, for some devices, the loss is even less than 0.1 dB. The PSR variability is under 3% across the wavelength range of 1500 nm to 1600 nm. Further numerical analysis results indicate that the device exhibits robustness during the fabrication process. The comparison between this paper and other power dividers capable of achieving adjustable power distribution ratios is presented in Table 2. MMI-type OPSs are generally excellent compared with directional couplers in dimension, extra loss, and bandwidth. The device designed in this article also demonstrates good performance compared to traditional asymmetric OPSs in loss and bandwidth while keeping a compact size.
Although the proposed concept does not offer continuous adjustment capability, it is particularly advantageous in applications that require a fixed PSR, such as optical coherence tomography [30], laser detection and ranging [31], and polarization control [32]. In these applications, OPSs with fixed PSRs are utilized for light splitting for detection, reference, or feedback information. Therefore, this device holds promising prospects for applications and market potential. Finally, it is imperative to acknowledge that the actual preparation of the device may deviate slightly from the intended design. Such deviations primarily stem from mishandling during the preparation process or specific operations. However, these deviations are usually minimal and do not significantly impact the device’s ability to achieve the anticipated results.

5. Conclusions

This study presents an asymmetric MMI 1 × 2 power splitter ratio (PSR). The asymmetric structure is realized by removing a triangle in the coupling region. The design is implemented on a standard 220 nm silicon-on-insulator (SOI) platform by changing the angle of the removal region to control the PSRs. We can achieve PSRs from 50:50 to 95:5, meanwhile maintaining low extra loss. The dimensions of the proposed devices are 2.9 μm × (9.5–10.9) μm to minimize the impact on the overall footprint of large integrated silicon photonic chips (Si-PICs). The measured performances are in line with the conventional symmetric MMI devices in terms of losses and optical bandwidth. Overall, this asymmetric power divider not only exhibits superior performance but also demonstrates promising potential for inclusion in large-scale integrated circuits.

Author Contributions

Conceptualization, H.L. and Y.L.; methodology, H.L. and Y.L.; software, Y.L.; validation, B.L., F.L., S.L. and H.W.; formal analysis, H.L. and Y.L.; investigation, Y.L.; resources, H.L.; data curation, Y.L.; writing—original draft preparation, Y.L.; writing—review and editing, H.L. and Y.L.; visualization, Y.L.; supervision, X.L., F.L., S.L. and Y.C.; project administration, Y.L., X.L., S.L. and Q.G.; funding acquisition, H.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Foundation of Liaoning Province Education Administration (JYTMS20230429).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

The raw data supporting the conclusions of this article will be made available by the authors on request.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. (a) Schematic structure of the designed device. the input and output ports (denoted as P1 and P2), the dimensions of the various components: Wmmi = 2.9 μm, LTaper = 2 μm, and WTaper = 850 nm. (b) Top view of the proposed design device. (I) Input single-mode region, (II) multimode interference coupling region Wgap = 0.8 μm, (III) output energy region Δ1 = Δ2 = 0.35 μm. (c,d) The electric field strength distributions of the designed device with θ = 0 and θ ≠ 0. Normalized electric field intensity 1.0, 0.5, and 0.0.
Figure 1. (a) Schematic structure of the designed device. the input and output ports (denoted as P1 and P2), the dimensions of the various components: Wmmi = 2.9 μm, LTaper = 2 μm, and WTaper = 850 nm. (b) Top view of the proposed design device. (I) Input single-mode region, (II) multimode interference coupling region Wgap = 0.8 μm, (III) output energy region Δ1 = Δ2 = 0.35 μm. (c,d) The electric field strength distributions of the designed device with θ = 0 and θ ≠ 0. Normalized electric field intensity 1.0, 0.5, and 0.0.
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Figure 2. (a) The curve of effective refractive index of TE0 (black line), TM0 (red line), TE1 (blue line), and TM1 (green line) as the input waveguide width increases. (b) Fundamental optical mode in a shallow etched configuration is utilized to realize the device. (c) Relationship between etching depth and normalized power.
Figure 2. (a) The curve of effective refractive index of TE0 (black line), TM0 (red line), TE1 (blue line), and TM1 (green line) as the input waveguide width increases. (b) Fundamental optical mode in a shallow etched configuration is utilized to realize the device. (c) Relationship between etching depth and normalized power.
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Figure 3. (a) Relationship between the angle of the removal region and the power division ratio. (bg) The relationship between the size of the six power splitter ratios device and the normalized transmission power.
Figure 3. (a) Relationship between the angle of the removal region and the power division ratio. (bg) The relationship between the size of the six power splitter ratios device and the normalized transmission power.
Photonics 11 00472 g003aPhotonics 11 00472 g003b
Figure 4. (a,b) The correlation between the length and width of the Taper structure and the normalized power. (c) Effect of presence or absence of the taper structure on the normalized power.
Figure 4. (a,b) The correlation between the length and width of the Taper structure and the normalized power. (c) Effect of presence or absence of the taper structure on the normalized power.
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Figure 5. (a) Power splitting ratio (PSR) function of various devices within the wavelength range of 1500~1600 nm. (b) Device losses with different power ratios (pink, light blue, green, blue, red, and purple lines represent power distribution ratios of 50:50, 60:40, 70:30, 80:20, 90:10, 95:5, respectively) in the wavelength range of 1500 to 1600 nm.
Figure 5. (a) Power splitting ratio (PSR) function of various devices within the wavelength range of 1500~1600 nm. (b) Device losses with different power ratios (pink, light blue, green, blue, red, and purple lines represent power distribution ratios of 50:50, 60:40, 70:30, 80:20, 90:10, 95:5, respectively) in the wavelength range of 1500 to 1600 nm.
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Figure 6. Fabrication tolerances analysis for devices with different power splitter ratios. (a) The derivative of the PSR versus the etching depth per 5 nm (H) for devices with different PSRs. The inset illustrates a cross-section view of the ridge waveguide structure. The total thickness of the Si layer is fixed at 220 nm. (b) Derivative of the power splitter ratio with respect to the angle of the removed area per 0.1 degree for devices with different power ratios. The inset shows the top view of the proposed device. θ represents the angle of the removed region.
Figure 6. Fabrication tolerances analysis for devices with different power splitter ratios. (a) The derivative of the PSR versus the etching depth per 5 nm (H) for devices with different PSRs. The inset illustrates a cross-section view of the ridge waveguide structure. The total thickness of the Si layer is fixed at 220 nm. (b) Derivative of the power splitter ratio with respect to the angle of the removed area per 0.1 degree for devices with different power ratios. The inset shows the top view of the proposed device. θ represents the angle of the removed region.
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Table 1. L and θ values in the asymmetry coupling region utilized for the simulation device.
Table 1. L and θ values in the asymmetry coupling region utilized for the simulation device.
Device#1#2#3#4#5#6
L9.59.610.210.610.710.9
θ069.875.278.882.183.6
Table 2. A comparison of the power divider reported in the literature with our power splitters.
Table 2. A comparison of the power divider reported in the literature with our power splitters.
Ref.Waveguide structure TypeDevice
Type
Length
(μm)
Width
(μm)
Loss
(dB)
Bandwidth
(nm)
[12] dc321.3<11500–1600
[13] dc7020<11510–1540
[18]strip1 × 2(1.8–2.8)1.5<0.41520–1580
[20]rib1 × 210.53<0.81540–1580
[21]strip1 × 23.32.4<0.671530–1570
[22]strip1 × 2104<0.61500–1600
[23]strip1 × 2(57.5–108)9.6<0.31520–1590
This workrib1 × 2(9.5–10.9)2.9<0.41500–1600
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MDPI and ACS Style

Liang, Y.; Lv, H.; Liu, B.; Wang, H.; Liu, F.; Liu, S.; Cong, Y.; Li, X.; Guo, Q. Compact Low Loss Ribbed Asymmetric Multimode Interference Power Splitter. Photonics 2024, 11, 472. https://doi.org/10.3390/photonics11050472

AMA Style

Liang Y, Lv H, Liu B, Wang H, Liu F, Liu S, Cong Y, Li X, Guo Q. Compact Low Loss Ribbed Asymmetric Multimode Interference Power Splitter. Photonics. 2024; 11(5):472. https://doi.org/10.3390/photonics11050472

Chicago/Turabian Style

Liang, Yanfeng, Huanlin Lv, Baichao Liu, Haoyu Wang, Fangxu Liu, Shuo Liu, Yang Cong, Xuanchen Li, and Qingxiao Guo. 2024. "Compact Low Loss Ribbed Asymmetric Multimode Interference Power Splitter" Photonics 11, no. 5: 472. https://doi.org/10.3390/photonics11050472

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