Figure 1.
UPQC power circuitry diagram and scheme of obtaining conductance signal on the base of DC-link capacitor voltage vdc, according to Equation (6). The S/H block is an sample-and-hold module that is synchronized with source voltage waveform using sync block.
Figure 1.
UPQC power circuitry diagram and scheme of obtaining conductance signal on the base of DC-link capacitor voltage vdc, according to Equation (6). The S/H block is an sample-and-hold module that is synchronized with source voltage waveform using sync block.
Figure 2.
Shunt converter turning on. Source voltage: run 1, source current: 2, conductance signal: 3. Y scale for conductance signal is 45 mS/div.
Figure 2.
Shunt converter turning on. Source voltage: run 1, source current: 2, conductance signal: 3. Y scale for conductance signal is 45 mS/div.
Figure 3.
Shunt converter turning on process. DC-link capacitor voltage: waveform 1, and load equivalent conductance signal: waveform 2.
Figure 3.
Shunt converter turning on process. DC-link capacitor voltage: waveform 1, and load equivalent conductance signal: waveform 2.
Figure 4.
Series converter turning on. Load voltage: waveform 1, and DC-link capacitor voltage: waveform 2.
Figure 4.
Series converter turning on. Load voltage: waveform 1, and DC-link capacitor voltage: waveform 2.
Figure 5.
Series converter turning on process. Source current: waveform 1, and conductance signal: waveform 2.
Figure 5.
Series converter turning on process. Source current: waveform 1, and conductance signal: waveform 2.
Figure 6.
Load turning off process. Load voltage: waveform 1, and load current: waveform 2.
Figure 6.
Load turning off process. Load voltage: waveform 1, and load current: waveform 2.
Figure 7.
Load turning off process. Load voltage: waveform 1, and source current: waveform 2.
Figure 7.
Load turning off process. Load voltage: waveform 1, and source current: waveform 2.
Figure 8.
Load turning off process. DC-link capacitor voltage: waveform 1, and load conductance signal: waveform 2.
Figure 8.
Load turning off process. DC-link capacitor voltage: waveform 1, and load conductance signal: waveform 2.
Figure 9.
Source voltage swell compensation. Source voltage: waveform 1, and load voltage: waveform 2.
Figure 9.
Source voltage swell compensation. Source voltage: waveform 1, and load voltage: waveform 2.
Figure 10.
Source voltage swell. Load current, source current and conductance signal: waveforms 1, 2 and 3.
Figure 10.
Source voltage swell. Load current, source current and conductance signal: waveforms 1, 2 and 3.
Figure 11.
Source voltage swell. DC-link capacitor voltage and series converter current: waveforms 1 and 2.
Figure 11.
Source voltage swell. DC-link capacitor voltage and series converter current: waveforms 1 and 2.
Figure 12.
Source voltage sag compensation. Source voltage: waveform 1 and load voltage: waveform 2.
Figure 12.
Source voltage sag compensation. Source voltage: waveform 1 and load voltage: waveform 2.
Figure 13.
Source voltage sag compensation. Source current: waveform 1, load current: waveform 2, and conductance signal: waveform 3.
Figure 13.
Source voltage sag compensation. Source current: waveform 1, load current: waveform 2, and conductance signal: waveform 3.
Figure 14.
Source voltage sag compensation. DC-link capacitor voltage and load series converter current: waveform 1 and 2, respectively.
Figure 14.
Source voltage sag compensation. DC-link capacitor voltage and load series converter current: waveform 1 and 2, respectively.
Figure 15.
Source voltage flicker compensation. DC-link capacitor voltage for Tst = T and for Tst = 3T: waveforms 2 and 4, respectively, and conductance signal for Tst = T and for Tst = 3T: waveforms 1 and 3, respectively.
Figure 15.
Source voltage flicker compensation. DC-link capacitor voltage for Tst = T and for Tst = 3T: waveforms 2 and 4, respectively, and conductance signal for Tst = T and for Tst = 3T: waveforms 1 and 3, respectively.
Figure 16.
Source voltage flicker compensation. Source voltage: waveform 1, and harmonics-compensated and amplitude-levelled load voltage: waveform 2.
Figure 16.
Source voltage flicker compensation. Source voltage: waveform 1, and harmonics-compensated and amplitude-levelled load voltage: waveform 2.
Figure 17.
Source voltage: waveform 1, load voltage: waveform 2 and load current: waveform 3. Whole network action, general view.
Figure 17.
Source voltage: waveform 1, load voltage: waveform 2 and load current: waveform 3. Whole network action, general view.
Figure 18.
DC-link capacitor voltage: waveform 1, conductance signal: waveform 2 and source current: waveform 3 with Y scale of 54 mS/div. Whole network action, case 4.1 (a).
Figure 18.
DC-link capacitor voltage: waveform 1, conductance signal: waveform 2 and source current: waveform 3 with Y scale of 54 mS/div. Whole network action, case 4.1 (a).
Figure 19.
DC-link capacitor voltage: waveform 1, conductance signal: waveform 2 and source current: waveform 3 with Y scale of 10 A/div. Whole network action, case 4.1 (b).
Figure 19.
DC-link capacitor voltage: waveform 1, conductance signal: waveform 2 and source current: waveform 3 with Y scale of 10 A/div. Whole network action, case 4.1 (b).
Figure 20.
Load voltage: waveform 1, load current: waveform 2 and source current: waveform 3.
Figure 20.
Load voltage: waveform 1, load current: waveform 2 and source current: waveform 3.
Figure 21.
Load current: waveform 1 and source current: waveform 2.
Figure 21.
Load current: waveform 1 and source current: waveform 2.
Figure 22.
Load current: waveform 1 and source current: waveform 2.
Figure 22.
Load current: waveform 1 and source current: waveform 2.
Figure 23.
Source voltage: waveform 1 and load current: waveform 2.
Figure 23.
Source voltage: waveform 1 and load current: waveform 2.
Figure 24.
DC-link capacitor voltage: waveform 1, source current: 2 and conductance signal: 3 with Y scale of 27 mS/div.
Figure 24.
DC-link capacitor voltage: waveform 1, source current: 2 and conductance signal: 3 with Y scale of 27 mS/div.
Figure 25.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 348 V and 14.7%, and then 268 V and 7.7%, respectively.
Figure 25.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 348 V and 14.7%, and then 268 V and 7.7%, respectively.
Figure 26.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 162 V and 32.7%, and then 219 V and 4.1%, respectively.
Figure 26.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 162 V and 32.7%, and then 219 V and 4.1%, respectively.
Figure 27.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 235 V and 21.4%, and then 231 V and 4.3%, respectively.
Figure 27.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 235 V and 21.4%, and then 231 V and 4.3%, respectively.
Figure 28.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 235 V and 21.7%, and then 231 V and 4.7%, respectively.
Figure 28.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 235 V and 21.7%, and then 231 V and 4.7%, respectively.
Figure 29.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 162 V and 32.6%, and then 219 V and 4.2%, respectively.
Figure 29.
Source and load voltages: waveform 1 and 2. Theirs RMS and THD parameters are 162 V and 32.6%, and then 219 V and 4.2%, respectively.
Figure 30.
Source voltage with spike distortion: waveform 1 and DC-link capacitor voltage: waveform 2.
Figure 30.
Source voltage with spike distortion: waveform 1 and DC-link capacitor voltage: waveform 2.
Figure 31.
Source voltage: waveform 1 and load voltage: waveform 2.
Figure 31.
Source voltage: waveform 1 and load voltage: waveform 2.
Figure 32.
Conductance signal: waveform 1 and source current: waveform 2.
Figure 32.
Conductance signal: waveform 1 and source current: waveform 2.
Figure 33.
DC-side load current: waveform 1, DC-link capacitor voltage: waveform 2 and conductance signal: waveform 3 (Y scale for this signal is 25 mS/div).
Figure 33.
DC-side load current: waveform 1, DC-link capacitor voltage: waveform 2 and conductance signal: waveform 3 (Y scale for this signal is 25 mS/div).
Figure 34.
AC-side source voltage: waveform 1, AC-side load voltage: waveform 2, AC-side load current: waveform 3, AC-side source current: waveform 4 and conductance signal: waveform 5, where Y scale for the conductance signal is 57 mS/div.
Figure 34.
AC-side source voltage: waveform 1, AC-side load voltage: waveform 2, AC-side load current: waveform 3, AC-side source current: waveform 4 and conductance signal: waveform 5, where Y scale for the conductance signal is 57 mS/div.
Figure 35.
Global view on AC-side source voltage: waveform 1 and on AC-side load voltage: waveform 2.
Figure 35.
Global view on AC-side source voltage: waveform 1 and on AC-side load voltage: waveform 2.
Figure 36.
Global view on AC-side load current: waveform 1 and on DC-side load current: waveform 2.
Figure 36.
Global view on AC-side load current: waveform 1 and on DC-side load current: waveform 2.
Figure 37.
Global view on DC-link capacitor voltage: waveform 1, AC-side source current: waveform 2 and conductance signal: waveform 3 with Y scale of 56 mS/div.
Figure 37.
Global view on DC-link capacitor voltage: waveform 1, AC-side source current: waveform 2 and conductance signal: waveform 3 with Y scale of 56 mS/div.
Figure 38.
Critical time period 100 ms–300 ms. AC-load voltage: waveform 1 and AC-source current: waveform 2.
Figure 38.
Critical time period 100 ms–300 ms. AC-load voltage: waveform 1 and AC-source current: waveform 2.
Figure 39.
Critical time period 560 ms–760 ms. AC-load voltage: waveform 1 and AC-source current: waveform 2.
Figure 39.
Critical time period 560 ms–760 ms. AC-load voltage: waveform 1 and AC-source current: waveform 2.
Table 1.
Compensated load basic electrical parameters just before (for 380 ms–400 ms) and after (for 400 ms–460 ms) the instant (at 400 ms) of turning the shunt converter on.
Table 1.
Compensated load basic electrical parameters just before (for 380 ms–400 ms) and after (for 400 ms–460 ms) the instant (at 400 ms) of turning the shunt converter on.
Time (ms) | 380–400 | 400–420 | 420–440 | 440–460 |
---|
Parameter |
---|
VLoad (V) | 229 | 234 | 234 | 234 |
ILoad (A) | 15.6 | 16.6 | 17.0 | 17.0 |
SLoad (VA) | 3572 | 3884 | 3978 | 3978 |
PLoad (W) | 2439 | 2743 | 2885 | 2879 |
PFLoad | 0.68 | 0.71 | 0.73 | 0.73 |
WLoad (J) | 48.8 | 54.9 | 57.7 | 57.6 |
GLoad (mS) | 46.6 | 50.1 | 52.7 | 52.6 |
Table 2.
UPQC-and-load subcircuit basic electrical parameters before (380 ms–400 ms) and after (400 ms–460 ms) the instant (at 400 ms) of turning the shunt converter on.
Table 2.
UPQC-and-load subcircuit basic electrical parameters before (380 ms–400 ms) and after (400 ms–460 ms) the instant (at 400 ms) of turning the shunt converter on.
Time (ms) | 380–400 | 400–420 | 420–440 | 440–460 |
---|
Parameter |
---|
VSource (V) | 232 | 232 | 232 | 232 |
ISource (A) | 15.5 | 2.8 | 12.1 | 12.9 |
ISource THD (%) | 59 | 146 | 17 | 14 |
SUPQC+Load (VA) | 596 | 650 | 2807 | 2993 |
PUPQC+Load (W) | 449 | 277 | 2717 | 2899 |
PFUPQC+Load | 0.68 | 0.42 | 0.97 | 0.97 |
WUPQC+Load (J) | 49.0 | 5.5 | 54.3 | 58.0 |
∆WDCCap (J) | 0.0 | −49.5 | −4.2 | 0.0 |
GSignal (mS) | 1.2 | 1.2 | 42.3 | 59.0 |
Table 3.
Basic parameters describing load action before (780 ms–800 ms) and after (800 ms–860 ms) the instant (800 ms) of turning the series converter on.
Table 3.
Basic parameters describing load action before (780 ms–800 ms) and after (800 ms–860 ms) the instant (800 ms) of turning the series converter on.
Time (ms) | 780–800 | 800–820 | 820–840 | 840–860 |
---|
Parameter |
---|
VLoad (V) | 234 | 229 | 229 | 229 |
VLoad THD (%) | 15 | 3.3 | 3.1 | 3.5 |
ILoad (A) | 16.9 | 16.1 | 16.1 | 16.0 |
SLoad (VA) | 3955 | 3687 | 3686 | 3664 |
PLoad (W) | 2873 | 2589 | 2608 | 2563 |
PFLoad | 0.73 | 0.86 | 0.71 | 0.70 |
WLoad (J) | 57.5 | 51.8 | 52.2 | 51.3 |
GLoad (mS) | 52.4 | 49.5 | 49.9 | 49.0 |
Table 4.
Basic parameters describing load action before, (780 ms–800 ms) and after (800 ms–860 ms) the instant (800 ms) of turning the series converter on. All parameters are defined as for
Table 2.
Table 4.
Basic parameters describing load action before, (780 ms–800 ms) and after (800 ms–860 ms) the instant (800 ms) of turning the series converter on. All parameters are defined as for
Table 2.
Time (ms) | 780–800 | 800–820 | 820–840 | 840–860 |
---|
Parameter |
---|
VSource (V) | 232 | 232 | 232 | 232 |
ISource (A) | 12.9 | 13.1 | 12.0 | 12.1 |
ISource THD (%) | 14 | 13 | 14 | 14 |
SUPQC+Load (VA) | 2993 | 3039 | 2784 | 2807 |
PUPQC+Load (W) | 2908 | 2919 | 2659 | 2692 |
PFUPQC+Load | 0.97 | 0.96 | 0.96 | 0.96 |
WUPQC+Load (J) | 58.2 | 58.4 | 53.2 | 53.8 |
∆WDCCap (J) | 0.5 | 5.2 | −0.9 | 1.9 |
GSignal (mS) | 51.0 | 50.8 | 45.8 | 46.3 |
Table 5.
Basic parameters characterizing load work before and during source voltage swell. The parameter definitions are the same as for
Table 3.
Table 5.
Basic parameters characterizing load work before and during source voltage swell. The parameter definitions are the same as for
Table 3.
Time (ms) | 0–80 | 80–100 | 100–120 | 120–140 | 180–200 | 240–260 |
---|
Parameter |
---|
VLoad (V) | 225 | 229 | 228 | 247 | 248 | 247 |
ILoad (A) | 22.3 | 22.4 | 22.3 | 24.6 | 24.6 | 24.8 |
SLoad (VA) | 5018 | 5130 | 5084 | 6076 | 6101 | 6126 |
PLoad (W) | 4203 | 4278 | 4241 | 5145 | 5147 | 5214 |
PFLoad | 0.84 | 0.83 | 0.83 | 0.85 | 0.84 | 0.85 |
WLoad (J) | 84.0 | 85.6 | 84.8 | 102.9 | 102.9 | 104.3 |
GLoad (mS) | 83.0 | 81.6 | 81.6 | 84.3 | 83.7 | 85.5 |
Table 6.
Basic parameters characterizing UPQC-and-load subcircuit operation for the voltage swell. The parameter describing is the same as for
Table 2.
Table 6.
Basic parameters characterizing UPQC-and-load subcircuit operation for the voltage swell. The parameter describing is the same as for
Table 2.
Time (ms) | 60–80 | 80–100 | 100–120 | 120–140 | 180–200 | 240–260 |
---|
Parameter |
---|
VSource (V) | 231 | 232 | 232 | 346 | 346 | 346 |
ISource (A) | 22.2 | 2.6 | 18.2 | 19.0 | 17.7 | 17.7 |
SUPQC+Load (VA) | 5128 | 603 | 4222 | 6574 | 6124 | 6124 |
PUPQC+Load (W) | 4210 | 254 | 4146 | 6458 | 6014 | 6009 |
PFUPQC+Load | 0.82 | 0.42 | 0.98 | 0.98 | 0.98 | 0.98 |
WUPQC+Load (J) | 84.2 | 5.1 | 82.9 | 129.2 | 120.3 | 120.2 |
∆WDCCap (J) | −1.0 | −81.8 | −2.8 | 7.0 | −0.5 | 0.0 |
GSignal (mS) | 0.2 | 0.3 | 74.4 | 76.8 | 71.1 | 71.4 |
Table 7.
Basic parameters characterizing load work before and during source voltage sag. The parameter describing is the same as for
Table 3.
Table 7.
Basic parameters characterizing load work before and during source voltage sag. The parameter describing is the same as for
Table 3.
Time (ms) | 60–80 | 80–100 | 100–120 | 120–140 | 200–220 | 380–400 |
---|
Parameter |
---|
VLoad (V) | 225 | 229 | 228 | 214 | 209 | 208 |
ILoad (A) | 22.3 | 22.4 | 22.3 | 20.9 | 20.7 | 20.2 |
SLoad (VA) | 5018 | 5130 | 5084 | 4473 | 4326 | 4121 |
PLoad (W) | 4203 | 4278 | 4241 | 3735 | 3653 | 3487 |
PFLoad | 0.84 | 0.83 | 0.83 | 0.84 | 0.84 | 0.85 |
WLoad (J) | 84.1 | 85.6 | 84.8 | 74.7 | 73.1 | 69.7 |
GLoad (mS) | 83.0 | 81.6 | 81.6 | 81.6 | 83.6 | 83.4 |
Table 8.
Basic parameters describing UPQC-and-load subcircuit action before and during the source voltage sag. The parameters shown were defined in
Table 2.
Table 8.
Basic parameters describing UPQC-and-load subcircuit action before and during the source voltage sag. The parameters shown were defined in
Table 2.
Time (ms) | 60–80 | 80–100 | 100–120 | 120–140 | 140–160 | 200–220 | 280–300 | 380–400 |
---|
Parameter |
---|
VSource (V) | 231 | 232 | 232 | 120 | 120 | 120 | 120 | 120 |
ISource (A) | 22.2 | 2.6 | 18.2 | 18.1 | 30.3 | 44.7 | 46.5 | 46.6 |
SUPQC+Load (VA) | 5128 | 603 | 4222 | 2172 | 3636 | 5364 | 5580 | 5592 |
PUPQC+Load (W) | 4210 | 254 | 4146 | 2086 | 3492 | 5123 | 5364 | 5369 |
PFUPQC+Load | 0.82 | 0.42 | 0.98 | 0.96 | 0.96 | 0.96 | 0.96 | 0.96 |
WUPQC+Load (J) | 84.2 | 5.1 | 82.9 | 41.7 | 69.8 | 102.5 | 107.3 | 107.4 |
∆WDCCap (J) | −0.48 | −82.8 | −2.3 | −57.6 | −33.0 | −7.1 | −10.5 | −0.4 |
GSignal (mS) | 0.2 | 0.3 | 74.4 | 76.8 | 129.6 | 192.6 | 200.0 | 200.0 |