1. Introduction
Due to the continuous depletion of fossil fuels as well as the perpetual escalation of energy demands, research on renewable energy resources has been a hot topic in recent years. The integration and planning of renewable energy has a great impact on the operation of the electric market [
1,
2,
3]. Among several renewable energy resources, wind energy has drawn substantial attention from researchers due to its maximum power point tracking capability, high efficiency, self-regulating control of active and reactive power, and improved power quality [
4,
5]. Renewable energy resources, especially large-scale wind power based on doubly fed induction generator (DFIG) integration with the existing power grid is a challenging task for power engineers. Compared to other integration techniques, voltage source converter high-voltage DC (VSC-HVDC) has greater flexibility [
6,
7]. Additionally, since the VSC-HVDC system adopts an insulated-gate bipolar transistor (IGBT) switch instead of thyristor, it could prevent commutation failure due to grid fault. Hence, VSC-HVDC offers a better solution to the commutation problem in HVDC systems [
8].
Although the HVDC system has several advantages; it is vulnerable to AC/DC faults in the system [
9]. Due to disturbances, bulk power transmission is highly interrupted, causing power imbalance and instability in the system. Therefore, HVDC systems must be kept energized during faults. Various control techniques have been applied for VSCs to improve fault ride through (FRT) capability as well as transient stability [
7,
10]. In an HVDC system, for proper operation and control of the converters, DC link voltage must be regulated within permissible limits. Various DC link power dissipation techniques are presented in the literature [
11] to keep the DC link voltage within expected limits during faults. These techniques involve a reduction in active power and the adjustment of wind turbine power, which depend on a fast communication route among the converter stations. DC link ripple reduction and a power oscillation damping method is presented with a negative sequence current controller [
12]. Nevertheless, this method results in stresses on the mechanical system because of reduction of active power to zero from the sending terminal.
Electric power system reliability can be enhanced through the integration of several renewable energy resources [
13,
14,
15,
16]. However, disturbances in the grid may cause instability in such integrated systems. The integration of offshore wind turbines to grids through a medium-voltage DC transmission system is presented with a new magnetic linked converter [
17]. The presented magnetic linked converter can eliminate the need for low frequency heavy transformers as well as solve isolation problems naturally. Among different wind energy integration techniques, DFIG is considered to be superior as its efficiency is high and the control of active and reactive powers can be decoupled [
18,
19,
20].
The generated active and reactive powers are controlled by rotor-side converter (RSC), while DC link voltage and reactive power exchange with the grid are controlled by the grid-side converter (GSC) [
21,
22,
23]. DFIG systems are vulnerable to grid faults due to the direct connection of the stator winding to the grid [
24,
25,
26]. A new control technique for DFIG wind integration was presented whereby the continuation of the DFIG connection during a fault can be secured and the system stability can be improved under fault conditions [
23].
Nowadays, it is imperative to maintain the security and stability of the power system, due to its complex structure. Fault current limiters (FCLs) are considered as an important candidate to be placed in power systems to augment stability and security. Generally, superconducting fault current limiter placement is dominant in AC power system [
27,
28,
29,
30]. A saturated iron-core superconducting fault current limiter (SISFCL) to improve distance protection of a 500 kV AC transmission line is presented [
31]. Since SISFCL adds inductance to the transmission line, re-adjustment of distance relay settings was presented to achieve better coordination. In addition, a resistive-type superconducting FCL was presented [
32]. However, it suffers from high current and high cost related to installation, operation, and maintenance. To overcome this problem, Nam et. al. [
33] presented a hybrid resistive-type superconducting fault current limiter (SFCL) with thyristors where phase angle control of the thyristors is coordinated with SFCL to limit the fault current. However, this hybrid fault current limiting technique has been developed for small-scale system application. Further study and research on capability extension are needed for application in large-scale systems. Superconducting fault current limiting cables have been presented for protection purposes [
34,
35]. A systematic method for impedance selection of high-temperature superconducting cables under different fault conditions was developed [
35]. Depending on fault current levels and relay operating times, the optimal impedance value is determined from the system protection perspective. Fault current limiting techniques with a series dynamic braking resistor (SDBR) are presented [
36,
37]. A controllable switch is connected in parallel with a resistive branch in SDBR. The switch can be turned off or on in a dynamic fashion to insert the resistance as a main current-limiting part in SDBR operation. However, the SDBR is sensitive to switching delay and has inadequate performance in restricting fault current and augmenting dynamic performance [
38]. Furthermore, most of the FCLs have been examined and installed in AC power systems; however, their feasibility and placements have not been fully investigated in VSC-HVDC systems [
39].
The non-superconducting bridge-type fault current limiter (BFCL) is a novel technology having promising competency to improve the dynamic stability of wind farms and power grids by inserting sizeable impedance during the inception of disturbances in the system [
40,
41,
42,
43,
44,
45]. However, determining the size of impedance of BFCL to restrict the fault current of DFIG wind-based HVDC systems is a challenging task. Also, the insertion of this determined impedance during fault conditions in the system needs proper fault detection and a BFCL operation strategy. Mainly, BFCL consists of some diodes, an IGBT switch, resistor, and inductor. Thanks to the non-superconducting nature of these elements [
46], BFCL can easily be implemented in power system with less cost compared to other current-limiting devices. To sum up, there is gap in current studies examining and implementing low-cost BFCLs that needs to be filled by designing proper impedance as a prospective solution for fault impact mitigation of DFIG wind integrated HVDC systems.
This study proposes BFCL-based control for reducing the fault current, improving the fault ride through capability, and enhancing the transient stability of DFIG wind integrated VSC-HVDC systems. To the best of our knowledge, this non-superconducting BFCL has not been designed and examined for FRT capability enhancement of DFIG-based HVDC systems. In this work, the proper size of impedance of BFCL is designed and inserted under different fault conditions in HVDC systems. The proposed BFCL is also equated with SDBR to demonstrate its efficacy for reducing the fault current and improving the stability of VSC-HVDC systems with DFIG wind integration. Unlike other methods presented in the literature, the proposed BFCL-based protection scheme is superior for augmenting the FRT capability of DFIG wind farms integrated with VSC-HVDC systems. The following shortcomings in current studies are to be addressed as the main contributions of this research:
- (a)
Excessive DC link voltage fluctuation
- (b)
High fault current and oscillation in DFIG speed and active power
- (c)
Improper size of BFCL impedance for DFIG-based HVDC systems
2. Bridge-Type Fault Current Limiter
Non-superconducting bridge-type fault current limiter (BFCL) is proposed to augment fault ride through capability of DFIG wind farm integration with VSC-HVDC. The construction, working principle, and proposed control strategy of BFCL are documented below.
2.1. BFCL Structure, Operation, and Design
As shown in
Figure 1, BFCLs have two main parts [
41,
47]: shunt branch with resistor and inductor, and diode bridge with diodes, resistor, inductor, and IGBT switch. The shunt resistor,
Rsh, and the inductor,
Lsh, are the main current-limiting parts, the sizes of which need to be designed for the improvement of the dynamic performance of the system, while the DC resistor,
RDC, and inductor,
LDC, are chosen to have small values in order to have a very negligible impact on the system during normal operation. The main role of the BFCL is to inset the shunt branch impedance in series with the line under faulty conditions in order to limit the fault current.
The operation mode of BFCLs is controlled by proper control signal to the gate of the IGBT. For the system without fault mode, the objective is to bypass the shunt branch by short-circuiting the bridge part. Therefore, during normal conditions, the current passes through the D1-LDC-RDC-IGBT-D4 path for the positive half cycle of the line current, while the current passes through the D2-LDC-RDC-IGBT-D3 path for the negative half cycle of the line current. As a result, LDC and RDC carry the current, which is of a unified direction, and the LDC charges to the peak value of the line current. It is worth mentioning that LDC and RDC have small values and the voltage drops across them are inconsequential. In conclusion, the bridge acts as a short circuit and it bypasses the shunt branch of the BFCL under normal conditions. In the disturbance mode operation of the BFCL, the IGBT switch is turned off, and thus, the bridge part acts as an open circuit. Consequently, the line current is now forced to flow through the shunt branch, which restricts the current in fault mode operation.
In this work, sizeable impedance of the shunt branch is determined on the basis of the pre-fault active power flow through the line cable. The same amount of power flows through each line during normal operation. Each of the BFCLs placed in each line should absorb the same or a greater amount of power, which flows through the line in pre-fault conditions. Now, the power flow of each BFCL in post-fault conditions is presented by the following Equations [
48]:
where
VPCC is the voltage at point of common coupling (PCC) and
PG is the active power delivered to the grid. The simplification of Equations (1) and (2) gives the following equation:
Rsh must be a positive value. Thus, the term inside the root must be positive. This obligatory condition gives the following equation for determining the size of shunt branch reactance:
A similar systematic method is adopted to determine the size of Rsh. Since the BFCL bridge part needs to be short-circuited during normal operation, with negligible impact, lower values of LDC and RDC are chosen on a trial-and-error basis so that the DC current flowing through them is smooth.
2.2. BFCL Control Strategy
The BFCL control signal is generated based on the detection of a fault in the system. Fault detection in AC/DC systems could be achieved by the amount of voltage dip or over-current at the point of common coupling (PCC) [
49]. This work uses the amount of voltage dip to sense the fault, as shown in
Figure 2.
A comparator circuit evaluates the voltage at PCC (
VPCC) with a pre-defined threshold voltage (
VT), which is arbitrarily chosen as 95% of the nominal
VPCC.
VT is chosen as 95% since the voltage below 0.95 p.u. is considered a worst-case scenario [
50]. In normal conditions,
VPCC is greater than
VT. Therefore, the comparator provides a low signal output. The step voltage generation then provides a high-voltage signal to the gate of the IGBT and subsequently turns it on. Thus, the bridge part of the BFCL is short-circuited in this control mode. However, in faulty conditions,
VPCC has a voltage dip and while it is below 95% of its nominal value,
VT becomes higher than
VPCC. A fault appearance signal is generated in the output of the comparator and based on this signal, low step voltage is produced, which turns off the IGBT. Accordingly, the bridge part of the BFCL is open-circuited and line current is forced to flow through the shunt branch. Now, insertion of the sizeable shunt branch impedance in the line restricts fault current and hence improves the dynamic performance of DFIG wind integrated VSC-HVDC systems. The current through
LDC has a tendency to rise drastically during fault initiation. However,
LDC limits this current and the IGBT switch is protected against high
di/dt.