*Article* **Double-Carrier Phase-Disposition Pulse Width Modulation Method for Modular Multilevel Converters**

#### **Fayun Zhou 1, An Luo 1, Yan Li 1,2,\*, Qianming Xu 1, Zhixing He <sup>1</sup> and Josep M. Guerrero <sup>3</sup>**


#### Academic Editor: Gabriele Grandi

Received: 12 February 2017; Accepted: 20 April 2017; Published: 23 April 2017

**Abstract:** Modular multilevel converters (MMCs) have become one of the most attractive topologies for high-voltage and high-power applications. A double-carrier phase disposition pulse width modulation (DCPDPWM) method for MMCs is proposed in this paper. Only double triangular carriers with displacement angle are needed for DCPDPWM, one carrier for the upper arm and the other for the lower arm. Then, the theoretical analysis of DCPDPWM for MMCs is presented by using a double Fourier integral analysis method, and the Fourier series expression of phase voltage, line-to-line voltage and circulating current are deduced. Moreover, the impact of carrier displacement angle between the upper and lower arm on harmonic characteristics is revealed, and further the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme. Finally, the proposed method and theoretical analysis are verified by simulation and experimental results.

**Keywords:** modular multilevel converter; double-carrier phase-disposition pulse width modulation; double Fourier integral analysis; harmonic characteristic; carrier displacement angle

#### **1. Introduction**

Nowadays, modular multilevel converters (MMCs) have become one of the most attractive multilevel converter topologies available for high-voltage and high-power applications such as voltage-sourced converter high-voltage direct current (VSC-HVDC) transmission [1–6], static synchronous compensators (STATCOMs) [7], unified power flow controllers (UPFCs) [8], active power filters (APFs) [9], medium voltage motor drives [10], integration of renewable energy sources into the electrical grid [11–13] and battery energy storage systems [14,15]. Compared to other multilevel converter topologies, the salient features of MMC include: high degree of modularity, high efficiency, superior harmonic performance, high reliability and absence of dc-link capacitors [5].

Many academic papers have focused on modeling [16–19], control [20–24], and modulation techniques [25–41] for MMCs. The multilevel converter pulse width modulation technique is one of the key technologies for MMCs as it affects the harmonic characteristics, voltage balancing and system efficiency. Various pulse width modulation techniques have been applied for MMCs, and each technique has advantages and drawbacks [25,26]. The selective harmonic elimination-pulse width modulation (SHE-PWM) method can provide good harmonic features with low switching frequency of sub-modules (SMs). However, the calculation of angles increases significantly as the number of output voltage levels increases [27–29]. The space vector modulation (SVM) method can provide more flexibility to optimize switching waveforms. However, when the number of voltage levels increases, the complexity of the algorithm for SVM grows exponentially [4]. In [30], a simplified SVM scheme was proposed for MMCs, which reduces the computation demands and can be used for any level MMC. The main advantage of the nearest level modulation (NLM) method is its simple implementation. However, the NLM method generates poor quality waveforms with small numbers of SMs [31,32]. The application scope of NLM is extended by introducing one SM operating in the PWM mode [33,34]. The phase-shifted carrier pulse-width modulation (PSCPWM) method achieves even power distribution among the SMs [35,36]. However, dedicated capacitor voltage balancing controllers for each SM are mandatory, which reduces the harmonic performance of the output voltage. Compared with PSCPWM, the phase-disposition pulse width modulation (PDPWM) method has superior harmonic characteristics by placing significant harmonic energy into the first carrier component in the phase voltage and relying upon the elimination of this component when the line-to-line voltages are created [25]. The main drawback of the PDPWM is the uneven loss distribution among the SMs, which can be solved by the voltage balancing method based on sorting [37–40]. In [41], an improved PDPWM method using a single carrier was proposed for MMCs, which reduces the control hardware requirement. However, the upper arm and lower arm use the same carrier, and the impact of the carrier displacement angle between the upper arm carrier and the lower arm carrier on the harmonic characteristics has not been considered. The circulating current and output voltage for MMCs are determined by the interactions between the upper arm voltage and the lower arm voltage [42]. Therefore, the carrier for the lower arm and the carrier for the upper arm need to be analyzed separately with an interleaved displacement angle. The displacement angle will influence the high-frequency interactions between the upper arm and lower arm, and further affect the harmonic characteristics of MMCs [43].

A double-carrier phase-disposition pulse width modulation (DCPDPWM) method for MMC is proposed in this paper. Only double triangular carriers with displacement angle are needed for DCPDPWM, one carrier for the upper arm and the other for the lower arm. The theoretical analysis of DCPDPWM for MMC is presented based on double Fourier integral analysis method, and the Fourier series expression of phase voltage, line-to-line voltage and circulating current are deduced. Moreover, the impact of carrier displacement angle between the upper and lower arms on harmonic characteristics is revealed, and the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme.

The paper is organized as follows: Section 2 introduces the topology and mathematical model of MMC. Section 3 proposes the DCPDPWM method for MMC. Section 4 presents the theoretical analysis of DCPDPWM for MMC by using double Fourier integral analysis method, and the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme. Sections 5 and 6 show the simulation and experimental results, respectively. The conclusions are summarized in Section 7.

#### **2. Topology and Mathematical Model of MMC**

The schematic diagram of a three phase MMC is shown in Figure 1. The MMC comprises upper and lower arms per phase-leg. Each arm consists of *N* series-connected, nominally identical SMs and a series buffer inductor. The buffer inductors for the upper and lower arms can be chosen as coupled or separate ones. The coupled inductor is adopted in this paper as it has lighter weight and smaller size than two separate inductors [34,35]. The power loss of SMs and the resistances of the inductors are ignored. Based on Kirchhoff's voltage law, the following equations can be obtained:

$$L\_p \frac{di\_{p\bar{j}}}{dt} + M\_\text{il} \frac{di\_{n\bar{j}}}{dt} = \frac{\mathcal{U}\_{dc}}{2} - u\_{p\bar{j}} - u\_{\bar{j}} \tag{1}$$

$$L\_n \frac{di\_{nj}}{dt} + M\_\text{ul} \frac{di\_{pj}}{dt} = \frac{\mathcal{U}\_{dc}}{2} - u\_{nj} + u\_j \tag{2}$$

where *Udc* is the dc-link voltage. *uj* denotes the output voltage phase-*j* (*j* = *a*, *b*, *c*). *upj* and *unj* are the output voltage of the upper and the lower arms, respectively. *ipj* and *inj* refer to the current of the upper arm and the lower arm, respectively. *Lp* and *Ln* are the self-inductances of the coupling inductance for the upper and lower arms, respectively. *Mu* is the mutual inductance, assuming the two inductors are closely coupled and the leakage inductance can be ignored (i.e., *Lp* = *Ln* = *Mu* = *L*).

**Figure 1.** Schematic diagram of three phase modular multilevel converter (MMC). SM: sub-module.

According to Kirchhoff's current law, the upper and lower arm current of phase-*j* can be expressed as:

$$i\_{pj} = i\_{cj} + \frac{i\_j}{2} \tag{3}$$

$$i\_{n\dot{j}} = i\_{c\dot{j}} - \frac{i\_{\dot{j}}}{2} \tag{4}$$

where *ij* and *icj* are the output current and circulating current of phase-*j*, respectively.

Combining (1)–(4), the output voltage and circulating current of phase-*j* can be derived as:

$$
u\_{\dot{j}} = \frac{1}{2} (\boldsymbol{u}\_{n\dot{j}} - \boldsymbol{u}\_{p\dot{j}}) \tag{5}$$

$$i\_{cj} = \frac{1}{2} (i\_{pj} + i\_{nj}) \tag{6}$$

Combining (1), (2) with (6), the following equation can be obtained as:

$$4L\frac{di\_{cj}}{dt} = \mathcal{U}\_{dc} - \mathfrak{u}\_{pj} - \mathfrak{u}\_{nj} \tag{7}$$

According to (7), the circulating current of phase-*j* can be calculated as:

$$\dot{u}\_{c\dot{j}} = I\_{c\dot{j}} + \int\_0^t \frac{\mathbb{U}\_{dc} - u\_{p\dot{j}} - u\_{n\dot{j}}}{4L} dt \tag{8}$$

where *Icj* is the dc component of circulation current *icj*.

#### **3. Implementation of Double-Carrier Phase Disposition Pulse Width Modulation for MMCs**

The principle of DCPDPWM for MMCs is shown in Figure 2, where *N* is the number of SMs for each arm (e.g., *N* = 10). Only two carriers with displacement angle are needed for DCPDPWM, one carrier for the upper arm and the other for lower arm. Where *θ* is defined as the displacement angle between the upper arm carrier and lower arm carrier, and the range of *θ* can be obtained as [0, 2π). Note that the displacement angle *θ* between upper arm carrier and lower arm carrier has a significant impact on the harmonic characteristics of MMC, which will be analyzed in Section 4.

**Figure 2.** Principle of double-carrier phase-disposition pulse width modulation (DCPDPWM) for MMCs: (**a**) integer portion of the upper arm modulation signal; (**b**) integer portion of the lower arm modulation signal; (**c**) modulation of the remainder for the upper arm; (**d**) modulation of the remainder for the lower arm; (**e**) pulse width modulation (PWM) signal of the upper arm; (**f**) PWM signal of the lower arm; (**g**) number of on-state SMs for the upper arm; and (**h**) number of on-state SMs for the lower arm.

The reference voltages of the upper and lower arm for phase-*j* can be expressed as:

$$\ln u\_{pj,ref} = \frac{\mathcal{U}\_{dc}}{2} \left[ 1 + M \cos \left( \omega\_o t + \pi + \phi\_j \right) \right] \tag{9}$$

$$u\_{nj,ref} = \frac{\mathcal{U}\_{dc}}{2} \left[ 1 + M \cos \left( \omega\_o t + \phi\_j \right) \right] \tag{10}$$

where *M* (0 < *M* ≤ 1) denotes the modulation index. *ω<sup>o</sup>* is the angular frequency of output voltage. *φ<sup>j</sup>* is the phase angle of phase-*j* (*φ<sup>a</sup>* = 0, *φ<sup>b</sup>* = –2*π*/3, *φ<sup>c</sup>* = 2*π*/3).

The modulation signals of the upper and lower arms for phase-*j* can be obtained as:

$$u\_{pj, \text{mod}} = \frac{u\_{pj, ref}}{l l\_{\text{C}}} = \frac{N}{2} \left[ 1 + M \cos \left( \omega\_o t + \pi + \phi\_j \right) \right] \tag{11}$$

$$
\mu\_{\rm nj,mod} = \frac{u\_{\rm nj,ref}}{\underline{\rm L}\_{\rm C}} = \frac{N}{2} \left[ 1 + M \cos \left( \omega\_0 t + \phi\_{\bar{j}} \right) \right] \tag{12}
$$

where *UC* is the capacitor rated voltage of SMs. Given that *UC* = *U*dc/*N*. The range of modulation signals are [−*N*/2, *N*/2].

As shown in Figure 2a,b, the integer portion of upper arm and low arm modulation signals can be calculated as:

$$N\_{pj, \text{int}} = floor \left( \frac{u\_{pj, \text{ref}}}{lI\_{\text{C}}} \right) \tag{13}$$

$$N\_{nj, \text{int}} = floor \left( \frac{u\_{nj, ref}}{\mathcal{U}\_{\mathbb{C}}} \right) \tag{14}$$

In which the function *floor*(*x*) obtains the largest integer that is less than or equal to *x*. *Npj,int*, *Nnj,int* are the integer portion of modulation signals, respectively.

As shown in Figure 2c,d, the remainder of reference voltage for upper and lower arms can be derived as:

$$
\mu\_{pj,rem} = \mu\_{pj,ref} - \mathcal{U}\_{\mathbb{C}} \times \mathcal{N}\_{pj,int} \tag{15}
$$

$$
\mu\_{n\text{j,rem}} = \mu\_{n\text{j,ref}} - \mathcal{U}\_{\mathbb{C}} \times \mathcal{N}\_{u\text{j,int}} \tag{16}
$$

where *upj,rem* and *unj,rem* are the remainder of reference voltage for upper arm and lower arm, respectively.

The expressions of upper and the lower arms carriers can be obtained as:

$$\mu\_{pj, \text{car}} = \begin{cases} \frac{\text{l}\!\!\!\!\!\!\/\!}{\pi} (\omega\_{\text{c}}t - \theta - 2k\pi) & , \text{ } 2k\pi \le \omega\_{\text{c}}t - \theta < 2k\pi + \pi \\\ -\frac{\text{l}\!\!\!\!\/\!\/\!}{\pi} (\omega\_{\text{c}}t - \theta - 2k\pi - 2\pi) & , \text{ } 2k\pi + \pi \le \omega\_{\text{c}}t - \theta < 2k\pi + 2\pi \end{cases} \tag{17}$$

$$u\_{\rm inj,car} = \begin{cases} \frac{\underline{\mathcal{U}\_{\rm C}}}{\pi} (\omega\_{\rm c} t - 2k\pi) & 2k\pi \le \omega\_{\rm c} t < 2k\pi + \pi \\\ -\frac{\underline{\mathcal{U}\_{\rm C}}}{\pi} (\omega\_{\rm c} t - 2k\pi - 2\pi) & 2k\pi + \pi \le \omega\_{\rm c} t < 2k\pi + 2\pi \end{cases} \tag{18}$$

where *upj,car* and *unj,car* are the carriers of upper and lower arms, respectively. *k* is the number of carrier period (*k* ∈ [0, 1, ..., n]). *ω<sup>c</sup>* is the angular frequency of triangular carrier.

As shown in Figure 2e,f, the PWM signals of upper and lower arms can be obtained by comparing the remainders with the carriers of upper and lower arms, respectively. The PWM signals of upper and lower arms can be calculated as:

$$N\_{pj,p\text{uvm}} = \begin{cases} 1, & \mathfrak{u}\_{pj,\text{rcm}} > \mathfrak{u}\_{pj,\text{car}} \\ 0, & \mathfrak{u}\_{pj,\text{rcm}} \le \mathfrak{u}\_{pj,\text{car}} \end{cases} \tag{19}$$

$$N\_{\rm nj,pwur} = \begin{cases} \ 1, & \mathfrak{u}\_{\rm nj,rcw} > \mathfrak{u}\_{\rm nj,car} \\ 0, & \mathfrak{u}\_{\rm nj,rcw} \le \mathfrak{u}\_{\rm nj,car} \end{cases} \tag{20}$$

As shown in Figure 2g,h, the number of on-state SMs for each arm can be obtained by adding the integer portion and corresponding PWM portion. The number of on-state SMs for upper and lower arms can be obtained as:

$$N\_{pj, \text{dcm}} = N\_{pj, \text{int}} + N\_{pj, p\text{wm}} \tag{21}$$

$$N\_{\rm nj,dcm} = N\_{\rm nj,int} + N\_{\rm nj,pvm} \tag{22}$$

where *Npj,dcm*, *Nnj,dcm* are the number of on-state SMs for upper and lower arms, respectively.

The block diagram of double-carrier phase-disposition pulse width modulation with a capacitor voltage balancing algorithm is shown in Figure 3. Firstly, the number of on-state SMs for each arm is obtained through the DCPDPWM. Then, the selection of the SMs is performed based on the reducing switching frequency (RSF) voltage balancing algorithm [44], which can achieve capacitor voltage balancing of SMs and reduce the average device switching frequency. *upj*[*i*] (*i* = 1, 2, ... , *N*) and *unj*[*i*] are the capacitor voltages of SMs for the upper and lower arms, respectively.

**Figure 3.** Block diagram of double-carrier phase-disposition pulse width modulation for MMCs.

As the circulating current control can influence several performance features of MMCs such as suppressing the low frequency circulating current, increasing the switching frequency, reducing the capacitor voltage ripple and so on, for simplicity, it is assumed that the circulating current control method is not applied in the block diagram as shown in Figure 3. Note that this assumption is reasonable as the circulating currents flowing through the three phase legs of the MMC caused by the voltage differences among the dc-link voltage and three phase legs, which will not affect the output voltages and currents [5,22]. Moreover, this paper mainly focuses on the high frequency (switching frequency) circulating current caused by DCPDPWM method for MMCs, whereas the circulating current control method focuses on low frequency circulating currents (mainly second-order harmonic currents), which can be suppressed by adding a circulating current control method [36,43]. Thus the circulating current control method affects significantly the low frequency harmonic circulating current and has a relatively small influence on switching frequency circulating current. The switching frequency harmonics caused by circulating current control method can be suppressed by selecting the arm inductance properly [24].

#### **4. Theoretical Analysis of DCPDPWM Method for MMCs**

The double Fourier integral analysis method is the most well-known analytical method for determining the harmonic components of a PWM method [45]. In this section, the theoretical analysis of DCPDPWM for MMCs is presented using the double Fourier integral analysis method. The Fourier series expression of phase voltage, line-to-line voltage and circulating current are deduced. Moreover, the influence of carrier displacement angle between upper and lower arms on the harmonic

characteristics is revealed, and the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme.

#### *4.1. Influence of the Carrier Displacement Angle on Harmonic Characteristic of Output Voltage and Circulating Current for MMC*

Note that the following harmonics analysis focuses on the switching harmonics produced by DCPDPWM, while the low-frequency harmonics (e.g., second-order harmonic for circulating current) caused by the energy oscillation between the upper arm and lower arm are not included.

Assuming *N* is even, and the range of modulation index *M* can be obtained as [0, 1]. For simplicity, it is assumed that the capacitance of each submodule is large enough and all the capacitor voltages of SMs are naturally balanced (i.e., *UC* = *Udc*/*N*), so that the capacitor voltage ripple can be ignored. Note that this assumption is reasonable as the capacitor voltage ripple is generally a relatively small portion comparing with the reference voltages of upper and lower arms [36,43].

The analytical technique for determining the spectral components of multilevel PWM method proposed in [46,47] is applied for DCPDPWM. The phase voltage can be derived as follows (see Appendix A):

$$\begin{split} u\_{i} &= \frac{ML\_{dc}}{2} \cos\left(\omega\_{i}t + \phi\_{j}\right) + \frac{8L\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \frac{c\_{0}}{2m+1} \sin\left[\frac{(2m+1)\theta}{2}\right] \cos\left[(2m+1)\omega\_{i}t + \frac{(2m+1)\theta}{2} - \frac{\pi}{2}\right] \\ &+ \frac{4L\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{n=0}^{\infty} \frac{c\_{1}}{2n+1} \sin\left[\frac{(2m+1)\theta}{2}\right] \cos\left[(2m+1)\omega\_{i}t + 2n\left(\omega\_{o}t + \phi\_{j}\right) + \frac{(2m+1)\theta}{2} - \frac{\pi}{2}\right] \\ &\qquad \qquad \qquad \qquad \qquad (n \neq 0) \\ &+ \frac{2L\_{dc}}{N\pi^{2}} \sum\_{m=-\infty}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{c\_{2}}{2n} \cos\left(m\theta\right) \times \cos\left[2m\omega\_{i}t + (2n-1)\left(\omega\_{0}t + \phi\_{j}\right) + m\theta\right] \end{split} \tag{23}$$

where *m* denotes the carrier index variable and *n* refers to the baseband index variable.

The line-to-line voltage can be calculated as:

$$\begin{array}{l} \mu\_{d0} = & u\_d - u\_b = \frac{\sqrt{3}ML\_d}{2} \cos\left(\omega\_d t + \frac{\pi}{6}\right) \\ & + \frac{8L\_d}{N\pi^2} \sum\_{m=0}^{\infty} \sum\_{\substack{-\infty \\ m=0}}^{\infty} \frac{C\_1}{2m+1} \sin\left(\frac{2m\pi}{3}\right) \sin\left[\frac{(2m+1)\theta}{2}\right] \cos\left[(2m+1)\omega\_d t + 2n\left(\omega\_d t - \frac{\pi}{3}\right) + \frac{(2n+1)\theta}{2}\right] \\ & (u \neq 0) \\ & + \frac{4L\_d}{N\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{C\_3}{2n} \sin\left[\frac{(2n-1)\pi}{3}\right] \cos(m\theta) \times \cos\left[2m\omega\_d t + (2n-1)\left(\omega\_d t - \frac{\pi}{3}\right) + m\theta + \frac{\pi}{2}\right] \end{array} \tag{24}$$

Substituting (23) and (24) into (7), the circulating current can be obtained as:

$$\begin{aligned} i\_{\ell j} &= \frac{l\_{\ell j}}{3} + \frac{4ll\_{\ell j}}{\text{NLI}\pi^{2}\omega\_{\text{c}}} \sum\_{m=0}^{\infty} \frac{c\_{\ell}}{(2m+1)^{2}} \cos\left[ \frac{(2m+1)\theta}{2} \right] \times \cos\left[ (2m+1)\omega\_{\text{c}}t + \frac{(2m+1)\theta}{2} + \frac{\pi}{2} \right] \\ &+ \frac{24ll\_{\ell j}}{\text{NLI}\pi} \sum\_{m=0}^{\infty} \sum\_{\substack{\ell \ge 0 \\ m=-\infty}}^{\infty} \frac{c\_{\ell}}{(2m+1)((2m+1)\omega\_{\ell} + 2m\omega\_{\text{c}})} \cos\left[ \frac{(2m+1)\theta}{2} \right] \\ & (n \neq 0) \\ &\quad \times \cos\left[ (2m+1)\omega\_{\text{c}}t + 2n\left(\omega\_{\text{o}}t + \phi\_{\text{f}}\right) + \frac{(2m+1)\theta}{2} + \frac{\pi}{2} \right] \\ &+ \frac{4L\_{\ell}}{\text{NLI}\pi} \sum\_{m=-\infty}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{c\_{\ell}}{2m(2m\_{\ell} + (2n-1)\omega\_{\text{c}})} \sin(m\theta) \times \cos\left[ 2m\omega\_{\text{c}}t + (2n-1)\left(\omega\_{\text{o}}t + \phi\_{\text{f}}\right) + m\theta + \frac{\pi}{2} \right] \end{aligned} \tag{25}$$

The magnitudes of carrier harmonic components and associated sideband harmonic components for the phase voltage, line-to-line voltage, circulating current can be expressed as follows:

$$M\_{j,m,n} = \begin{cases} P\_{m,n} \times \left| \sin \frac{(2m+1)\theta}{2} \right|, & \text{if } \omega\_j = (2m+1)\omega\_i, 2m+1 \in \{1, 3, \dots\} \\\ P\_{m,n} \times \left| \sin \frac{(2m+1)\theta}{2} \right|, & \text{if } \omega\_j = (2m+1)\omega\_i + 2m\omega\_b, 2m+1 \in \{1, 3, \dots\}, 2n \in \{-\infty, \dots, -2, 2, \dots, \infty\} \\\ P\_{m,n} \times \left| \cos m\theta \right|, & \text{if } \omega\_j = 2m\omega\_k + (2n-1)\omega\_b, 2m \in \{2, 4, \dots\}, 2n-1 \in \{-\infty, \dots, -1, 1, \dots, \infty\} \end{cases} \tag{26}$$

*Energies* **2017**, *10*, 581

*Ull*,*m*,*<sup>n</sup>* = ⎧ ⎪⎪⎪⎪⎪⎪⎨ ⎪⎪⎪⎪⎪⎪⎩ 0, *i f ωll* = (2*m* + 1)*ωc*, 2*m* + 1 ∈ {1, 3, . . .} 2*Pm*,*<sup>n</sup>* × sin (2*m*+1)*<sup>θ</sup>* 2 , *i f <sup>ω</sup>ll* <sup>=</sup> (2*<sup>m</sup>* <sup>+</sup> <sup>1</sup>)*ω<sup>c</sup>* <sup>+</sup> <sup>2</sup>*nωo*, 2*<sup>m</sup>* <sup>+</sup> <sup>1</sup> <sup>∈</sup> {1, 3, . . .}, 2*<sup>n</sup>* <sup>∈</sup>/ {0, 3, 6, . . .} 0, *i f ωll* = (2*m* + 1)*ω<sup>c</sup>* + 2*nωo*, 2*m* + 1 ∈ {1, 3, . . .}, 2*n* ∈ {3, 6, . . .} <sup>2</sup>*Pm*,*<sup>n</sup>* × |cos *<sup>m</sup>θ*|, *i f <sup>ω</sup>ll* = <sup>2</sup>*mω<sup>c</sup>* + (2*<sup>n</sup>* − <sup>1</sup>)*ωo*, 2*<sup>m</sup>* ∈ {2, 4, . . .}, 2*<sup>n</sup>* − 1 /∈ {0, 3, 6, . . .} 0, *i f <sup>ω</sup>ll* = <sup>2</sup>*mω<sup>c</sup>* + (2*<sup>n</sup>* − <sup>1</sup>)*ωo*, 2*<sup>m</sup>* ∈ {2, 4, . . .}, 2*<sup>n</sup>* − <sup>1</sup> ∈ {0, 3, 6, . . .} (27) *Icj*,*m*,*<sup>n</sup>* = ⎧ ⎪⎪⎨ ⎪⎪⎩ *Qm*,*<sup>n</sup>* × cos (2*m*+1)*<sup>θ</sup>* 2 , *i f <sup>ω</sup>cj* <sup>=</sup> (2*<sup>m</sup>* <sup>+</sup> <sup>1</sup>)*ωc*, 2*<sup>m</sup>* <sup>+</sup> <sup>1</sup> <sup>∈</sup> {1, 3, . . .} *Qm*,*<sup>n</sup>* × cos (2*m*+1)*<sup>θ</sup>* 2 , *i f <sup>ω</sup>cj* <sup>=</sup> (2*<sup>m</sup>* <sup>+</sup> <sup>1</sup>)*ω<sup>c</sup>* <sup>+</sup> <sup>2</sup>*nωo*, 2*<sup>m</sup>* <sup>+</sup> <sup>1</sup> <sup>∈</sup> {1, 3, . . .}, 2*<sup>n</sup>* <sup>∈</sup> {−∞, ··· , <sup>−</sup>2, 2, . . . , <sup>∞</sup>} *Qm*,*<sup>n</sup>* × |sin *<sup>m</sup>θ*|, *i f <sup>ω</sup>cj* = <sup>2</sup>*mω<sup>c</sup>* + (2*<sup>n</sup>* − <sup>1</sup>)*ωo*, 2*<sup>m</sup>* ∈ {2, 4, . . .}, 2*<sup>n</sup>* − <sup>1</sup> ∈ {−∞,..., −1, 1, . . . , <sup>∞</sup>} (28)

where:

$$P\_{m,n} = \begin{cases} \frac{81L\_k}{(2m+1)\lambda n^2} |\mathbb{C}\_0|, & \text{if } \omega\_j = (2m+1)\omega\_\varepsilon, 2m+1 \in \{1, 3, \dots\} \\ \frac{4L\_k}{(2m+1)\lambda n^2} |\mathbb{C}\_1|, & \text{if } \omega\_j = (2m+1)\omega\_\varepsilon + 2m\omega\_\varepsilon, 2m+1 \in \{1, 3, \dots\}, 2n \in \{-\infty, \dots, -2, 2, \dots, \infty\} \\ \frac{4L\_k}{m\lambda n^2} |\mathbb{C}\_2|, & \text{if } \omega\_j = 2m\omega\_\varepsilon + (2n-1)\omega\_\varepsilon, 2m \in \{2, 4, \dots\}, 2n-1 \in \{-\infty, \dots, -1, 1, \dots, \infty\} \\ \end{cases} \tag{29}$$
 
$$\left\{ \begin{array}{c} \frac{p\_{\omega\_\varepsilon}}{2L\omega\_\varepsilon(2m+1)}, & \text{if } \omega\_{\varepsilon j} = (2m+1)\omega\_\varepsilon, 2m+1 \in \{1, 3, \dots\} \\ \end{array} \right.$$

$$Q\_{m,n} = \begin{cases} \frac{2\overline{\omega}\omega\_{i}(2m+1)}{P\_{0,n}}, & \text{if } \omega\_{ij} = (2m+1)\omega\_{i}, 2m+1 \in \{1, 3, \dots\} \\ \frac{P\_{0,n}}{2\overline{\omega}\omega\_{i}[(2m+1)\omega\_{i} + 2m\omega\_{i}]}, & \text{if } \omega\_{ij} = (2m+1)\omega\_{i} + 2m\omega\_{i}, 2m+1 \in \{1, 3, \dots\}, 2n \in \{-\infty, \dots, -2, 2, \dots, \infty\} \\ \frac{P\_{\overline{\omega},n}}{2\overline{\omega}\omega\_{i}[2m\omega\_{i} + (2n-1)\omega\_{i}]}, & \text{if } \omega\_{ij} = 2m\omega\_{i} + (2n-1)\omega\_{i}, 2m \in \{2, 4, \dots\}, 2n-1 \in \{-\infty, \dots, -1, 1, \dots, \infty\} \end{cases} \tag{30}$$

where *Uj,m,n*, *Ull,m,n* and *Icj,m,n* are the magnitudes of carrier harmonic components and associated sideband harmonic components for the phase voltage, line-to-line voltage and circulating current, respectively. *ωj*, *ωll*, and *ωcj* are the angular frequency of phase voltage, line-to-line voltage and circulating current, respectively.

As shown in Equations (23)–(30), the phase voltage consists of a fundamental component, odd carrier harmonic components, even sideband harmonic components of odd carrier groups, and odd sideband harmonic components of even carrier groups. The carrier harmonic components and triple sideband harmonic components are cancelled in the line-to-line voltage. The circulating current consists of dc component, odd carrier harmonic components, even sideband harmonic components of odd carrier groups, and odd sideband harmonic components of even carrier groups.

It can be seen that the magnitudes of carrier harmonic components and associated sideband harmonic components for the phase voltage, line-to-line voltage and the circulating current are the function of displacement angle *θ*, respectively. Figure 4 shows the magnitudes of the harmonic components for the phase voltage and circulating current with different displacement angles. Only the first four harmonic groups (m ≤ 4) are studied here due to the limitations of the paper. Where *P*1,2*n*, *P*2,2*n-*1, *P*3,2*n*, *P*4,2*n-*<sup>1</sup> and *Q*1,2*n*, *Q*2,2*n-*1, *Q*3,2*n*, *Q*4,2*n-*<sup>1</sup> are the maximums of the first four harmonic groups for phase voltage and circulating current, respectively.

It is found that the changing tendency of the magnitudes for harmonic components in the phase voltage and circulating current are opposite. When the magnitudes of harmonic components for phase voltage and line-to-line voltage are at their minima, the magnitudes of the harmonic components for the circulating current are maximum, and vice versa. Therefore, the displacement angle *θ* should be specified according to the specific industry application. When the number of SMs for each arm is large, such as in HVDC applications, superior harmonics characteristics of the output voltage can be achieved, so reducing the harmonics of the circulating current is the main problem. On the other hand, when the number of SMs for each arm is small, such as in STATCOM and motor drive applications, reducing the harmonics of the output voltage is preferred.

**Figure 4.** Magnitudes of the harmonic components for the phase voltage and circulating current with different displacement angles: (**a**) magnitudes of harmonic components for phase voltage; and (**b**) magnitudes of harmonic components circulating current.

#### *4.2. Circulating Current Harmonics Cancellation Scheme for DCPDPWM Method*

When displacement angle *θ* = *π*, the circulating current harmonics cancellation scheme for DCPDPWM can be obtained. According to (23), the phase output voltage can be obtained as:

$$\begin{split} u\_{j} &= \quad \frac{ML\_{dc}}{2} \cos\left(\omega\_{o}t + \phi\_{j}\right) + \frac{8lI\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \frac{\mathbb{C}\_{0}}{2m+1} \cos\left[ (2m+1)\omega\_{c}t \right] \\ &+ \frac{4lI\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{\begin{subarray}{c} \Sigma \\ m=-\infty \end{subarray}}^{\infty} \frac{\mathbb{C}\_{1}}{2m+1} \cos\left[ (2m+1)\omega\_{c}t + 2n\left(\omega\_{0}t + \phi\_{j}\right) \right] \\ &\qquad \qquad \qquad \qquad (n \neq 0) \\ &+ \frac{2lI\_{dc}}{N\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{\mathbb{C}\_{2}}{2m} \cos\left[ 2m\omega\_{c}t + (2n-1)\left(\omega\_{0}t + \phi\_{j}\right) \right] \end{split} \tag{31}$$

According to (24), the line-to-line voltage can be expressed as:

$$\begin{array}{ll} \mu\_{ab} = & \frac{\sqrt{541I\_k}}{2} \cos\left(\omega\_a t + \frac{\pi}{6}\right) + \frac{8I\_k}{\overline{N}\pi^2} \sum\_{m=0}^{\infty} & \sum\_{\begin{subarray}{c} \omega \to \omega \\ m=0 \end{subarray}}^{\infty} \frac{\mathbb{C}\_1}{2m+1} \sin\left(\frac{2\pi x}{3}\right) \times \cos\left[ (2m+1)\omega\_a t + 2n\left(\omega\_a t - \frac{\pi}{3}\right) + \frac{\pi}{2} \right] \\ & (n \neq 0) \\ & + \frac{4I\_k}{\overline{N}\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{\mathbb{C}\_2}{2m} \sin\left[ \frac{(2n-1)\pi}{3} \right] \cos\left[ 2m\omega\_a t + (2n-1)\left(\omega\_a t - \frac{\pi}{3}\right) + \frac{\pi}{2} \right] \end{array} \tag{32}$$

According to (25), the circulating current can be derived as:

$$i\_{cj} = \frac{I\_{dc}}{3} \tag{33}$$

It can be seen that the magnitudes of the carrier harmonic components and associated sideband harmonic components for the circulating current are zero, which means that the carrier harmonic components and associated sideband harmonic components of the circulating current caused by DCPDPWM are completely cancelled out, leaving only the dc component. Therefore, the power loss and arm current stress are decreased. However, the magnitudes of the carrier harmonic components and sideband harmonic components for the phase voltage are at their maxima. The equivalent switching frequency (frequency of the lowest harmonic group) is *fdcm*, where *fdcm* denotes the carrier frequency of DCPDPWM.

#### *4.3. Output Voltage Harmonics Minimization Scheme for the DCPDPWM Method*

When carrier displacement angle *θ* = 0, the output voltage harmonics minimization scheme for DCPDPWM can be obtained. According to (23), the phase output voltage can be derived as:

$$u\_j = \frac{MlI\_{d\varepsilon}}{2}\cos\left(\omega\_o t + \phi\_j\right) + \frac{2lI\_{d\varepsilon}}{N\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{C\_2}{2m} \cos\left[2m\omega\_\varepsilon t + \left(2n-1\right)\left(\omega\_o t + \phi\_j\right)\right] \tag{34}$$

According to (24), the line-to-line output voltage can be obtained as:

$$u\_{ab} = \frac{\sqrt{5ML\_L}}{2} \cos\left(\omega\_b t + \frac{\pi}{6}\right) + \frac{4L\_L}{N\pi} \sum\_{n=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{C\_2}{2n} \sin\left[\frac{(2n-1)\pi}{3}\right] \times \cos\left[2m\omega\_t t + (2n-1)\left(\omega\_b t - \frac{\pi}{3}\right) + \frac{\pi}{2}\right] \tag{35}$$

According to (25), the circulating current can be derived as:

$$\begin{array}{ll} I\_{\leq f} = & \frac{I\_{dc}}{3} + \frac{4I\_{dc}}{N\Lambda\pi^{2}\omega\_{l}} \sum\_{m=0}^{\infty} \sum\_{k=1}^{\infty} \frac{c\_{0}}{(2m+1)^{2}} \times \cos\left[ (2m+1)\omega\_{l}t + \frac{\pi}{2} \right] \\ & + \frac{2I\_{dc}}{N\Lambda\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{\substack{\ell \in \mathbb{Z} \\ m \equiv -\infty \end{array}}^{\infty} \frac{c\_{1}}{(2m+1)((2m+1)\omega\_{l} + 2n\omega\_{\ell})} \times \cos\left[ (2m+1)\omega\_{l}t + 2n\left(\omega\_{\nu}t + \phi\_{l}\right) + \frac{\pi}{2} \right] \\ & (36) \\ & \left( n \neq 0 \right) \end{array} \tag{36}$$

It can be seen that the odd carrier harmonic components and the even sideband harmonic components of odd carrier groups for phase voltage are completely cancelled, leaving only the odd sideband harmonic components of even carrier groups. The equivalent switching frequency of phase voltage increases to 2 × *fdcm*, which means that the better harmonic characteristics can be achieved for phase voltage and current. However, the magnitudes of odd carrier harmonic components and even sideband harmonic components of odd carrier groups for circulating current are maximized, which increases the current stress upon the power semiconductor devices and decreases the MMC efficiency.

When the carrier displacement angle *θ* = 0, the carrier for the upper arm and carrier for the lower arm are the same, which means that only a single carrier is needed. Therefore, single carrier PDPWM is a special kind of DCPDPWM. Comparing Equations (34)–(36) with Equations (20), (34) and (21) in [43], it is found that when the equivalent switching frequency is the same (i.e., *fdcm* = *N* × *fpsc*, *fpsc* is the carrier frequency of PSCPWM), the phase voltage and line-to-line voltage of DCPDPWM have the same harmonic characteristics as PSCPWM, whereas the harmonics of the circulating current for DCPDPWM is different from PSCPWM. The harmonics of circulating current for DCPDPWM consist of odd carrier harmonics and odd sideband harmonics of even carrier groups, while the circulating current harmonics of the PSCPWM method comprise the sideband harmonic components of carrier groups.

#### **5. Simulation Results**

In order to verify the validity of the DCPDPWM method and the theoretical analysis in this paper, a MMC-based three phase inverter with ten SMs per arm was developed using PSIM software. The simulation parameters are listed in Table 1.

Comparison can be made between the proposed DCPDPWM method and PSCPWM method presented in [43] with circulating current harmonics cancellation scheme and output voltage harmonics minimization scheme. Note that the carrier frequency of DCPDPWM *fdcm* = *N* × *fpsc*, so that the average frequency of SMs for DCPDPWM method is basically equal to the PSCPWM method.


**Table 1.** Parameters of the simulation.

*5.1. Comparison between DCPDPWM and PSCPWM Methods with Circulating Current Harmonics Cancellation Scheme*

The comparison of simulation waveforms and harmonic spectra between the DCPDPWM and PSCPWM for MMC with circulating current harmonics cancellation scheme are shown in Figures 5 and 6, respectively. As shown in these figures, the voltage levels of phase voltage for both the PSCPWM and DCPDPWM methods are eleven. The equivalent switching frequency of phase voltage for PSCPWM method is the same with DCPDPWM method (i.e., *fequ* = *fdcm* = *N* × *fpsc* = 4000 Hz).

It can be seen that the most significant harmonic for DCPDPWM is the first carrier harmonic component, which can be cancelled in the line-to-line voltage. The triplen sideband harmonics in the phase voltage for DCPDPWM are also cancelled in the line-to-line voltage. However, only the triplen sideband harmonic components of the phase voltage are eliminated in the line-to-line voltage for PSCPWM. The magnitudes of the sideband harmonic components of line-to-line voltage and phase current for DCPDPWM method are lower than for PSCPWM, which means that the DCPDPWM can achieve better harmonic performance than PSCPWM.

Moreover, it is found that the carrier harmonic components and associated sideband harmonic components of circulating current caused by DCPDPWM are completely cancelled, whereas the sideband harmonic components of circulating current caused by PSCPWM are also completely cancelled, leaving only dc components and low frequency harmonics (mainly second-order harmonics). Therefore, the circulating current harmonics for the PSCPWM method are similar to those of the DCPDPWM method with the circulating current harmonics cancellation scheme. Note that the low frequency harmonic components can be reduced by the circulating current control method. In order to ensure that the harmonic characteristics are only affected by the modulation method, the circulating current control method is not included in this paper. It can be concluded that the simulation results are completely consistent with the theoretical analysis with the circulating current cancellation scheme for the DCPDPWM method.

Note that only transitions caused by DCPDPWM and PSCPWM methods are considered in the following analysis when the circulating current control method is not applied for MMC. However, when the circulating current control method is applied for MMC, the transitions will be increased.

Comparison of the simulation results between the DCPDPWM and PSCPWM methods with circulating harmonics cancellation scheme are shown in Table 2. It can be seen that the total switching number per arm in 1 power grid period for PSCPWM and DCPDPWM are 80 and 79, respectively. The total harmonic distortion (*THD*) of line-to-line voltage and phase current for DCPDPWM are 6.89% and 3.91%, respectively. The *THD* of line-to-line voltage and phase current for PSCPWM are 9.77% and 7.01%, respectively. It is found that when the total switching frequency is basically the same, the DCPDPWM has better harmonic characteristics than PSCPWM with the circulating current harmonics cancellation scheme.

Figure 7 shows the *THD* of line-to-line voltage for DCPDPWM and PSCPWM for different modulation indexes with the circulating current harmonics cancellation scheme. It can be seen that DCPDPWM method has better line-to-line harmonic characteristics than the PSCPWM method in the whole modulation index region.

**Table 2.** Comparison of simulation results between DCPDPWM and PSCPWM methods with the circulating current harmonics cancellation scheme. *THD*: total harmonic distortion.

**Figure 5.** Comparison of simulation waveforms between DCPDPWM and phase-shifted carrier pulse-width modulation (PSCPWM) methods with the circulating current harmonics cancellation scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; and (**h**) circulating current of PSCPWM.

**Figure 6.** Comparison of harmonic spectra between DCPDPWM and PSCPWM methods with the circulating current harmonics cancellation scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; and (**h**) circulating current of PSCPWM.

**Figure 7.** *THD* of line-to-line voltage for DCPDPWM and PSCPWM methods in different modulation index with circulating current harmonics cancellation scheme.

#### *5.2. Comparison between DCPDPWM and PSCPWM Method with Output Voltage Harmonics Minimization Scheme*

The comparison of simulation waveforms and harmonic spectra between the DCPDPWM and PSCPWM methods for MMC with output voltage harmonics minimization scheme are presented in Figures 8 and 9, respectively.

It can be seen that the voltage levels of phase voltage for both the PSCPWM and DCPDPWM methods rise to twenty-one. The equivalent switching frequency increases to *fequ* = 2*fdcm* = 2*N* × *fpsc* = 8000 Hz. It is found that the odd carrier harmonic components, and even sideband harmonic components of odd carrier groups in the phase voltage are completely eliminated in the line-to-line voltage for DCPDPWM, leaving only the even sideband harmonics of odd carrier groups. The sideband harmonic components of odd carrier groups in the phase voltage are cancelled for PSCPWM, leaving also the even sideband harmonics of odd carrier groups. It is found that the phase voltage, line-to-line voltage and phase current for PSCPWM and DCPDPWM methods have the same harmonic performance.

**Figure 8.** Comparison of simulation waveforms between the DCPDPWM and PSCPWM methods with output voltage harmonics minimization scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; and (**h**) circulating current of PSCPWM.

**Figure 9.** Comparison of harmonic spectra between DCPDPWM and PSCPWM methods with output voltage harmonics minimization scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; (**h**) circulating current of PSCPWM.

It can be seen that the harmonics of circulating currents between DCPDPWM and PSCPWM are different. The switching harmonics of circulating current for DCPDPWM includes odd carrier harmonic components and odd sideband harmonic components of even carrier groups. The main switching harmonics of DCPDWPM in the circulating current is the first carrier harmonic, while the switching harmonics of circulating current for PSCPWM consist of the sideband harmonics of carrier groups. It can be concluded that the simulation results completely agree with the theoretical analysis when applying the output voltage harmonics minimization scheme for DCPDPWM method.

Comparison of simulation results between the DCPDPWM and PSCPWM methods with output voltage harmonics minimization scheme are shown in Table 3. It can be seen that when the total switching number per arm in 1 power grid period are basically the same, the *THD* of line-to-line output voltage and phase current for both the DCPDPWM and PSCPWM are 4.78% and 2.44%, respectively.

Figure 10 shows the *THD* of line-to-line voltage for DCPDPWM and PSCPWM methods in different modulation index with output voltage harmonics minimization scheme. It can be seen that DCPDPWM method has the same line-to-line voltage harmonic characteristics with PSCPWM method in the whole modulation index region.


**Table 3.** Comparison of simulation results between DCPDPWM and PSCPWM method with the output voltage harmonics minimization scheme.

**Figure 10.** *THD* of line-to-line output voltage for DCPDPWM and PSCPWM methods in different modulation index with output voltage harmonics minimization scheme.

#### **6. Experimental Verification**

In order to further verify the proposed method and theoretical analysis, a three-phase MMC laboratory prototype was built. The parameters of the prototype are shown in Table 4. The dc-link voltage is 400 V, and the number of SMs per arm is *N* = 4. A coupled inductor is adopted as the arm inductor, and a resistance-inductor load is used.

**Table 4.** Parameters of Prototype.


Figures 11 and 12 show the experimental waveforms and harmonic spectra of DCPDPWM and PSCPWM with circulating current harmonics cancellation scheme, respectively. It is found that the switching harmonics of the circulating current are basically cancelled for DCPDPWM and PSCPWM methods. It can be seen that voltage level number of phase voltage is five, and the equivalent switching frequency of phase voltage for both the DCPDPWM and PSCPWM methods is 4000 Hz (*fequ* = *fdcm* = *N* × *fpsc*). For the DCPDPWM method, the main harmonic component of phase voltage is the first carrier harmonic component, which is eliminated in the line-to-line voltage. The harmonic components magnitudes in the line-to-line voltage and phase current for DCPDPWM are lower than PSCPWM with circulating current harmonics cancellation scheme.

From Figure 12, it can be seen that the *THD* of line-to-line voltage and phase current for DCPDPWM are 18.70% and 4.55%, respectively. The *THD* of line-to-line voltage and phase current for PSCPWM are 30.30% and 9.89%, respectively. The experimental results show that DCPDPWM has better harmonic characteristics than PSCPWM with the circulating current harmonics cancellation scheme. It is found that the experimental results match well with the theoretical analysis and simulation results.

Figures 13 and 14 present the experimental waveforms and harmonic spectra of DCPDPWM and PSCPWM with output voltage harmonics minimization scheme, respectively. It can be seen that the voltage level number of the phase voltage increases to nine for both the DCPDPWM and PSCPWM methods, which means that the lower *THD* of phase voltage and line-to-line voltage can be achieved. It is found that the harmonic components of the first carrier groups are basically cancelled in the phase voltage, and the equivalent switching frequency of phase voltage for DCPDPWM and PSCPWM methods rises to 8000 Hz (*fequ* = 2 *fdcm* = 2 × *N* × *fpsc*).

**Figure 11.** Experimental waveforms of DCPDPWM method and PSCPWM method with circulating current harmonics cancellation scheme: (**a**) phase voltage and circulating current of DCPDPWM; (**b**) phase voltage and circulating current of PSCPWM; (**c**) line-to-line voltage and phase current of DCPDPWM; and (**d**) line-to-line voltage and phase current of PSCPWM.

**Figure 12.** *Cont*.

**Figure 12.** Harmonic spectra of experimental waveforms for the DCPDPWM and PSCPWM methods with circulating current harmonics cancellation scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; and (**h**) circulating current of PSCPWM.

**Figure 13.** Experimental waveforms of DCPDPWM method and PSCPWM method with output voltage harmonics minimization scheme: (**a**) phase voltage and circulating current of DCPDPWM; (**b**) phase voltage and circulating current of PSCPWM; (**c**) line-to-line voltage and phase current of DCPDPWM; (**d**) line-to-line voltage and phase current of PSCPWM.

Meanwhile, it can be seen that there are many switching harmonics in the circulating current, which causes high switching ripples in the waveform of circulating current. The circulating current harmonics for DCPDPWM are different with PSCPWM. The main switching harmonic component in the circulating current of DCPDPWM is the first carrier harmonic component, while the switching harmonics in the circulating current for PSCPWM are the sideband harmonic of the carrier groups. From Figure 14, it can be seen that the *THD* of line-to-line voltage and phase current for DCPDPWM are 13.27% and 2.93%, respectively. The *THD* of line-to-line voltage and phase current for PSCPWM

are 13.34% and 2.98%, respectively. The experimental results show that DCPDPWM has the same harmonic characteristics than PSCPWM with the output voltage harmonics minimization scheme. The experimental results agree with the theoretical analysis and simulation results.

**Figure 14.** Harmonic spectra of experimental results for DCPDPWM and PSCPWM methods with output voltage harmonics minimization scheme: (**a**) phase voltage of DCPDPWM; (**b**) phase voltage of PSCPWM; (**c**) line-to-line voltage of DCPDPWM; (**d**) line-to-line voltage of PSCPWM; (**e**) phase current of DCPDPWM; (**f**) phase current of PSCPWM; (**g**) circulating current of PDPWM; and (**h**) circulating current of PSCPWM.

#### **7. Conclusions**

This paper has proposed a DCPDPWM method for MMCs. Only double triangular carriers with displacement angle are needed, one carrier for the lower arm, and the other carrier for the upper arm. The theoretical analysis of DCPDPWM for MMCs is presented by using a double Fourier integral analysis method. The Fourier series expression of phase voltage, line-to-line voltage and circulating current are deduced, and further the influence of carrier displacement angle between the upper and lower arms on the harmonic characteristics of the output voltage and circulating current is revealed. Furthermore, the optimum displacement angles are specified for the circulating current harmonics cancellation scheme and the output voltage harmonics minimization scheme. The proposed method and theoretical analysis are verified by simulations and experimental results.

It can be concluded that when applying the circulating current harmonics cancellation scheme, the carrier and associated sideband harmonics of the circulating current caused by DCPDPWM are completely cancelled, leaving only the dc component and low frequency components, which is similar to the circulating current harmonic characteristics for PSCPWM. The DCPDPWM method has better

line-to-line voltage harmonic characteristics than the PSCPWM method with the same equivalent switching frequency. When applying the output voltage harmonics minimization scheme, the odd carrier harmonics and even sideband harmonics of odd carrier groups for phase voltage are eliminated, and the phase voltage and line-to-line voltage of DCPDPWM have the same harmonic characteristics as PSCPWM. However, the magnitudes of the odd carrier harmonics and odd sideband harmonics of even carrier groups for circulating current are at a maximum. The harmonic circulating current characteristics between the PSCPWM and DCPDPWM methods are different. The main harmonic caused by DCPDWPM in the circulating current is the first carrier harmonic, while the circulating current harmonics caused by PSCPWM consist of the carrier group sideband harmonics.

**Acknowledgments:** This work was supported by the National Natural Science Foundation of China (NSFC) under Grant No. 51477045.

**Author Contributions:** All the authors conceived and designed the study. Fayun Zhou performed the simulation and wrote the manuscript with guidance from An Luo and Yan Li. Fayun Zhou, Qianming Xu and Zhixing He performed the experiment. An Luo, Yan Li, Qianming Xu, Zhixing He and Josep M. Guerrero reviewed the manuscript and provided valuable suggestions.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **Appendix A**

The lower arm voltage can be obtained as:

$$\begin{aligned} u\_{\mathrm{nj}}(t) &= \begin{array}{c} \frac{UL\_{\mathrm{dc}}}{2} + \frac{MLl\_{\mathrm{dc}}}{2} \cos\left(\omega\_{o}t + \phi\_{\mathrm{f}}\right) + \frac{8\mathcal{U}\_{\mathrm{dc}}}{N\pi^{2}} \sum\_{m=0}^{\infty} \frac{C\_{o}}{2m+1} \cos\left[(2m+1)\omega\_{c}t\right] \\ &+ \frac{4\mathcal{U}\_{\mathrm{dc}}}{N\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{\begin{subarray}{c} \omega \in \mathbb{C} \\ m=-\infty \end{subarray}}^{\infty} \frac{C\_{1}}{2m+1} \cos\left[(2m+1)\omega\_{c}t + 2n\left(\omega\_{o}t + \phi\_{\mathrm{f}}\right)\right] \\ &\qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \begin{aligned} &\text{if } \omega = \mathrm{i} + \mathrm{m} \,\omega\_{c} \\ &\qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \qquad \end{aligned} \end{aligned} \tag{A1}$$

where *m* denotes the carrier index variable and *n* refers to the baseband index variable.

The coefficients *C*0, *C*1, *C*<sup>2</sup> are as follow:

$$\begin{aligned} \mathbf{C}\_{0} &= \sum\_{k=0}^{\infty} \cos(k\pi) I\_{2k+1} \left[ \frac{(2m+1)N\pi M}{2} \right] \\ &\times \left\{ \frac{1}{(2k+1)} \left[ \sin \left( (2k+1)\frac{\pi}{2} \right) + 2 \sum\_{h=1}^{\frac{N}{2}-1} \sin \left( (2k+1)\cos \left( \frac{2h}{NM} \right)^{-1} \right) \cos(h\pi) \right] \right\} \end{aligned} \tag{A2}$$

$$\begin{aligned} C\_{1} &= \sum\_{k=0}^{\infty} \cos(k\pi) f\_{2k+1} \left( \frac{(2n+1)N\pi M}{2} \right) \\ &\times \left\{ \begin{array}{cc} \frac{1}{2n - 2k - 1} \left[ \sin \left( (2n - 2k - 1) \frac{\pi}{2} \right) + 2 \sum\_{k=1}^{\frac{N}{2} - 1} \sin \left( (2n - 2k - 1) \cos^{-1} \left( \frac{2h}{N\hbar} \right) \right) \cos(h\pi) \right] \\ &\times \left[ \begin{array}{cc} \frac{N}{2} - 1 & \frac{N}{2} - 1 \\ \frac{1}{2} \left[ \frac{N}{2} - 1 + \frac{1}{2} \cos \left( \frac{N}{2} - \frac{1}{2} + \frac{1}{2} \cos \left( \frac{N}{2} - \frac{1}{2} \cos \left( \frac{N}{2} - \frac{1}{2} \right) \right) \right] & \times \frac{1}{2} \end{array} \right] \end{aligned} \tag{A3}$$

$$\left\{ \begin{array}{c} +\frac{1}{2n+2k+1} \left[ \sin\left[ (2n+2k+1)\frac{\pi}{2} \right] + 2\sum\_{h=1}^{7} \sin\left[ (2n+2k+1)\cos^{-1}\left(\frac{2h}{N\Pi}\right) \right] \cos(h\pi) \right] \\\\ \mathcal{C}\_{2} = f\_{2n-1}(mN\pi M)\cos((n-1)\pi) \end{array} \right\} \tag{A4}$$

where *Jn*(*λ*) represents the Bessel coefficient of order *n* and argument *λ*.

The upper arm voltage can be derived as:

$$\begin{aligned} u\_{pj} &= \begin{array}{cc} \frac{\mathcal{U}\_{dc}}{2} + \frac{M\mathcal{U}\_{dc}}{2} \cos\left(\omega\_{o}t + \pi + \phi\_{j}\right) + \frac{8\mathcal{U}\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \frac{\mathcal{C}\_{0}}{2m+1} \cos\left[ (2m+1)(\omega\_{c}t + \theta) \right] \\ &+ \frac{4\mathcal{U}\_{dc}}{N\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{n=1}^{\infty} \frac{\mathcal{C}\_{1}}{2m+1} \cos\left[ (2m+1)(\omega\_{c}t + \theta) + 2n(\omega\_{o}t + \pi + \phi\_{j}) \right] \\ &n = -\infty \end{array} \tag{A5}$$
 
$$\begin{aligned} (n \neq 0) \\ &+ \frac{2\mathcal{U}\_{dc}}{N\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{\mathcal{C}\_{2}}{2m} \cos\left[ 2m(\omega\_{c}t + \theta) + (2n-1)(\omega\_{o}t + \pi + \phi\_{j}) \right] \end{aligned} \tag{A6}$$

Substituting (A1) and (A5) into (8), the phase voltage can be derived as:

$$\begin{split} u\_{\!\!\!\!\!\!\!\!} \, \mu\_{\!\!\!\!\!\!\!} &= \, \frac{ML\_{\text{f}}}{2} \cos \left( \omega\_{\text{d}} t + \phi\_{\text{f}} \right) + \frac{8L\_{\text{f}}}{N\pi^{2}} \sum\_{m=0}^{\infty} \frac{c\_{\text{f}}}{2m+1} \sin \left[ \frac{(2m+1)\theta}{2} \right] \cos \left[ (2m+1)\omega\_{\text{d}} t + \frac{(2m+1)\theta}{2} - \frac{\pi}{2} \right] \\ &+ \frac{4L\_{\text{f}}}{N\pi^{2}} \sum\_{m=0}^{\infty} \sum\_{\substack{\alpha=0 \\ m=0 \ \alpha \neq \pm}}^{\infty} \frac{c\_{\text{f}}}{2m+1} \sin \left[ \frac{(2m+1)\theta}{2} \right] \cos \left[ (2m+1)\omega\_{\text{d}} t + 2n \left( \omega\_{\text{d}} t + \Phi\_{\text{f}} \right) + \frac{(2m+1)\theta}{2} - \frac{\pi}{2} \right] \\ & \qquad \left( n \neq 0 \right) \\ &+ \frac{2L\_{\text{f}}}{N\pi} \sum\_{m=1}^{\infty} \sum\_{n=-\infty}^{\infty} \frac{c\_{\text{f}}}{2m} \cos(m\theta) \times \cos \left[ 2m\omega\_{\text{d}} t + \left( 2n - 1 \right) \left( \omega\_{\text{d}} t + \Phi\_{\text{f}} \right) + m\theta \right] \end{split} \tag{A6}$$

#### **References**


© 2017 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

### *Article* **Impedance Decoupling in DC Distributed Systems to Maintain Stability and Dynamic Performance**

#### **Ahmed Aldhaheri \* and Amir Etemadi**

Department of Electrical and Computer Engineering, The George Washington University, Washington, DC 20052, USA; etemadi@email.gwu.edu

**\*** Correspondence: aaldhaheri@gwmail.gwu.edu; Tel.: +1-202-372-6444

Academic Editor: Birgitte Bak-Jensen Received: 10 February 2017; Accepted: 28 March 2017; Published: 2 April 2017

**Abstract:** DC distributed systems are highly reliable and efficient means of delivering DC power or adopting renewable energy resources. However, DC distributed systems are prone to instability and dynamic performance degradation due to the negative incremental input impedance of DC-DC converts. In this paper, we propose a generic method to eliminate the impact of the negative input impedance on DC systems by shaping the source output impedance such that its bode-plot is restricted in the area that is contained below the product of the source's duty ratio and its characteristic impedance. The performance deterioration originates whenever the output impedance of the source exceeds, in magnitude, the input impedance of the load converter due to deficiency in stability margins. Hence, confining the impedance in the proposed region helps decouple the interaction between the converters and preserve their own dynamic performances. The proposed method was proven by analytical analysis, time-based simulation, and practical experiments. All of their outcomes were in agreement, proving the effectiveness of the proposed method in preserving the dynamic performance of distributed systems.

**Keywords:** active damping; DC distributed systems; dynamic performance; impedance decoupling; impedance overlap; minor loop gain; non-causal system; stability margins

#### **1. Introduction**

DC distributed power systems are a remarkable application of power electronics and include a wide range of applications, such as in DC microgrids, motor drive systems, hybrid vehicles, aircrafts, ships, submarines, and satellites [1,2]. Most such applications are size-limited, so they require highly reliable power sources with high efficiency and power density based on DC distributed systems, to fulfill their power requirement [3]. A typical distributed DC system consists of a DC-DC load converter connected in series with a DC-DC source converter or an input filter, as illustrated in Figure 1 [4], which is also referred to as a cascaded DC system [5]. Each converter in cascaded systems represents a module that can be designed individually and then integrated with the rest of the components of the system [6]. Thus, cascaded systems are modular, scalable, and capable of meeting various load requirements, which adds to their attractiveness.

**Figure 1.** A typical cascaded system configuration illustrating the source output impedance (*Zo*) and the load input impedance (*Zin*).

Despite these appealing characteristics of cascaded DC systems, they are susceptible to dynamic performance degradation and instability problems. These problems arise because the load converter tightly regulates its output current or voltage, regardless of the voltage or current variations at the DC bus [7–9]. As a consequence, the load converter supplies its load with constant power, so the load converter acts as a power sink attached to the source [10,11]. The small-signal ac analysis of DC-DC converters shows that they have negative input impedance within the bandwidth of their controllers. Therefore, the source converter or the input filter sees the load converter as a negative impedance [12], whereas they are designed to supply non-negative resistive loads [13].

The performance of cascaded systems was first investigated by R.D. Middlebrook in the 1970s. He studied a cascaded system that consisted of a load converter with an input filter. His study concluded that adding the input filter reduces the relative stability margins of the load converter. If the output impedance magnitude (|*Zo*(*s*)|) of the filter exceeded the input impedance of the load (|*Zin*(*s*)|), the system would become unstable [14]. On the other hand, *Zo*(*s*) represents the closed-loop output impedance, if the source was a DC-DC converter. The ratio of the impedances is referred to as the minor loop gain (*Tm*(*s*) = *Zo*(*s*)/*Zin*(*s*)), and plays an important role in stability analysis of the overall system.

Several approaches and criteria have been proposed in the literature to ensure stability and proper dynamic performance of cascaded systems. R.D. Middlebrook proposed a criterion that confines the polar plot of *Tm*(*s*) within a circle with a radius of 1/*GM* in order to ensure stability without degradation in the dynamic performance, where *GM* is the gain margin of *Tm*(*s*) [14]. The criterion is artificially stringent [8]; it requires high capacitance at the DC bus to be fulfilled. Therefore, other criteria such as gain margin phase margin (GMPM) [15], the opposing argument [16], Energy Source Analysis Consortium (ESAC) [17], three-steps [18], and passivity-based [19] were introduced to relax the conservativeness of the Middlebrook criterion, or to expand its approach to cover a load system that consists of multiple load modules. All criteria are sufficient to ensure stability and/or dynamic performance [20]. Applying the Nyquist criterion to *Tm*(*s*) is the only necessary and sufficient condition to ensure both stability and dynamic performance, because all criteria presume that every converter in the system is standalone stable except the three-steps criterion, which defines its minor loop gain differently. Since every converter is standalone stable, the polar plot of *Tm*(*s*) must not encircle (−1, *j*0)—in the complex plane— in order to ensure stability [21].

The Middlebrook, opposing argument, GMPM, and ESAC are design-oriented criteria [8]. They assume that the output impedance of the source converter is known; hence, the load system must be designed accordingly [22]. This assumption limits the modularity feature of cascaded systems because the dynamic performance would not be guaranteed for any other load converters. Thus, passive damping methods were introduced to damp cascaded systems using bulky passive components connected to the DC bus [7]. Nevertheless, they incur extra power loss, and increase both the system size and weight. As a result, the efficiency, reliability, and power-density of the cascaded systems are compromised.

In order to tackle the drawbacks of passive damping methods, active damping methods have become a popular substitute. The system stability and/or dynamic performance are preserved by modifying the control loop of the source or the load converters. These methods do not typically incur extra power losses; however, some of them reduce the power-density of cascaded systems, such as the solution proposed in [23]. Several noticeable limitations or disadvantages are observed in the proposed solutions in the literature, which can be classified into ensuring stability with poor dynamics (i.e., long settling time) [24], limiting the controller application to a single converter topology (e.g., buck converters) [25,26], and inability to handle multiple converter load systems [27–30].

In this paper, we propose an active damping method that preserves both the stability and dynamic performance of cascaded systems. The approach is compatible with any minimum-phase DC-DC converter configuration and with any linear feedback control scheme. It is based on shaping the output impedance of the source converter such that its bode-plot is consistently less than the region below the product of the source characteristic impedance and its duty ratio. In addition, a quantifiable approach is proposed to shrink the impedance in that area in order to preserve the dynamic performance without artificial conservativeness.

This paper discusses the dynamic performance of cascaded systems in Section 2. Then, the proposed controller is demonstrated in Section 3. Section 4 illustrates the proposed reshaping method of the source output impedance. Next, a prototype cascaded system is analytically discussed in Section 5, and the analytical results are validated by simulations and experiments in Section 6. Finally, Section 7 sums up the main conclusions and outcomes.

#### **2. Analysis of Cascaded System Dynamics**

#### *2.1. Dynamic Performance*

The impact of the negative input impedance on cascaded systems can be studied using the canonical model [12] of a single-load-single-source, as shown in Figure 1. For such a system, the input-to-output voltage relationship can be described as

$$\frac{\overline{\sigma}\_o}{\overline{\sigma}\_{in}} = \frac{G\_{\upsilon \overline{\chi}, s} G\_{\upsilon \overline{\chi}, L}}{(1 + T\_S)(1 + T\_L)(1 + T\_m)}\tag{1}$$

where *v*˜*in* is the input voltage of the source converter, *v*˜*<sup>o</sup>* is the output voltage of the load converter, and *Gvg*,*<sup>s</sup>* and *Gvg*,*<sup>L</sup>* are the input-to-output voltage transfer functions of the source and the load converters, respectively. *TS* and *TL* denote the voltage loop gains of the source and load converters, respectively. Interconnecting the converters adds more poles to the system due to the added term (1 + *Tm*) in Equation (1), which alters the overall dynamic response of the system [31]. According to Equation (1), if |*Tm*| 1, each converter of the cascaded system will operate as it was individually designed. Hence, the Middlebrook criterion mathematically describes the change in the load converter control-to-output transfer function (*Gvd*,*L*) as:

$$G\_{\rm rd,L}^{\rm S} = G\_{\rm rd,L} \frac{1 + \frac{Z\_o}{Z\_{in}}}{1 + \frac{Z\_o}{Z\_{in,o}}} \tag{2}$$

where *G<sup>S</sup> vd*,*<sup>L</sup>* is the source-affected control-to-output transfer function of the load, and *Zin*,*<sup>o</sup>* is the load input open-loop impedance. In order to minimize the loading impact and eliminate the source-load dynamic coupling,

$$\begin{cases} \left| Z\_{\vartheta} \right| \ll \left| Z\_{\mathrm{in}} \right|\\ \left| Z\_{\vartheta} \right| \ll \left| Z\_{\mathrm{in},\vartheta} \right| \end{cases} \tag{3}$$

should hold for the entire range of frequency according to the Middlebrook criterion. Consequently, the extra poles in (1) will be eliminated and *G<sup>S</sup> vd*,*<sup>L</sup>* ≈ *Gvd*,*L*. Thus, each converter will operate as initially designed [32]. The terms |*Zo*/*Zin*| and |*Zo*/*Zin*,*o*| are approximately equal to each other within the load controller bandwidth (*fL*\_BW) [33,34]. Diminishing |*Tm*| would preserve the dynamic performance of the load converter.

#### *2.2. Impedance Interaction and Instability*

*Tm* is crucial to ensuring both stability and dynamic performance. In order to ensure the stability of the system, (1 + *Tm*) in (1) must have no zeros in the right-half-plane (RHP). These undesirable zeros would occur [20] if and only if:

$$\begin{cases} \left| \frac{Z\_o}{Z\_{\text{in}}} \right| \ge 1\\ \varrho(Z\_o) - \varrho(Z\_{\text{in}}) \ge 180^\circ \end{cases} \tag{4}$$

where *ϕ*(*Zo*) and *ϕ*(*Zin*) are the phase angles of source output and load input impedances, respectively. Figure 2 shows typical plots of *Zo* and *Zin* for *fL*\_BW = 1.60 kHz. Any impedance overlap that occurs within the controller bandwidth would satisfy (4) because *<sup>ϕ</sup>*(*Zin*) = <sup>−</sup>180◦ and <sup>|</sup>*Zo*/*Zin*<sup>|</sup> <sup>&</sup>gt; 1, which implies that the overall cascaded system will have unstable poles.

**Figure 2.** Typical plots of the source output impedance |*Zo*(*s*)| and the load input impedance |*Zin*(*s*)|, depicting an impedance interaction.

#### *2.3. The Source Performance*

The Middlebrook criterion was initially developed to study the impact of the input filter on the performance of DC-DC converters. Replacing the filter with a source DC-DC converter has an impact on the load converter, as described in (2). On the other hand, the loop gain of the source converter is modified by the load converter, due to the loading impact given by [32].

$$T\_S^L = \frac{T\_S}{1 + T\_m(1 + T\_S)}\tag{5}$$

where *T<sup>L</sup> <sup>S</sup>* is the loaded loop gain of the source converter. Similarly, diminishing |*Tm*| would preserve the dynamic performance of the source because *T<sup>L</sup> <sup>S</sup>* ≈ *TS*. In (5), *<sup>T</sup><sup>L</sup> <sup>S</sup>* will have RHP poles if and only if *Tm* satisfies (4).

#### **3. The Proposed Controller**

In order to preserve the dynamic performance of voltage mode controlled converters in cascaded systems, the control loop should not change the relationship between the reference voltage (*v*˜*ref*) and the output voltage of the converter (*v*˜*o*), so their relationship has to be preserved as

$$\frac{\tilde{\upsilon}\_o}{\tilde{\upsilon}\_{ref}} = \frac{G\_c G\_{PWM} G\_{vd,s}}{1 + G\_c G\_{PWM} G\_{vd,s}} = \frac{T\_S}{1 + T\_S} \tag{6}$$

where *Gc* is the controller transfer function, and *GPWM* is the pulse-width modulator. In addition, the controller must be capable of actively shaping the output impedance in order to eliminate the impedance interaction between the source and the load converters. Thus, we used the controller topology that is introduced in [35,36], which modified a conventional control scheme, as in Figure 3a, to the controller that is shown in Figure 3b. Then, we modified it to comply with our proposal.

**Figure 3.** The block diagram of (**a**) the conventional controller; and (**b**) the modified controller emphasizing the modifications in red. PWM: pulse-width modulator.

The output voltage of a standalone converter implementing this controller (displayed in Figure3b) is expressed as:

$$\widetilde{\upsilon}\_o = \widetilde{\upsilon}\_{ref} \frac{T\_S}{1 + T\_S} - \widetilde{l}\_o \frac{Z\_o}{1 + HG\_{PWM} G\_{vd,s}} + \widetilde{\upsilon}\_{in} \frac{G\_{vg,s}}{(1 + HG\_{PWM} G\_{vd,s})(1 + T\_S)} \tag{7}$$

where *H* is the transfer function that is used to shape *Zo*, and *Zo* is derived using the open-loop output impedance (*Zol*) as *Zo* <sup>=</sup> *Zol*/(<sup>1</sup> <sup>+</sup> *Ts*). The variations in the input voltage (*v*0*in*) can be ignored, because the source voltage is assumed to be ideal. It is noteworthy that we aim to preserve (7), because once the source converter is loaded, the dynamics of the system will be changed by substituting (5) into (7), resulting in the following:

$$\widetilde{\upsilon}\_o = \widetilde{\upsilon}\_{ref} \frac{T\_S^L}{1 + T\_S^L} - \widetilde{i}\_o \frac{Z\_o}{1 + HG\_{PWM} G\_{vd,s}} \tag{8}$$

The dynamics of the system in (6) would have been modified if |*Zo*||*Zin*| is violated according to (8). In order to eliminate the interaction, we propose to shape the output impedance according to:

$$Z\_{\circ,new} = \frac{Z\_{\circ}}{1 + \lambda} \tag{9}$$

where *Zo*,*new* is the reshaped output impedance of the source, and *λ* is a constant (its selection method is illustrated in the next section). Reducing |*Zo*| as proposed in (9) is challenging because (1+ *HGPWMGvd*) in (8) is a transfer function whose magnitude should be converted into a constant that equals 1 + *λ*. Choosing *H* = *λG*−<sup>1</sup> *PWMG*−<sup>1</sup> *vd*,*<sup>s</sup>* is not a practical choice because the reciprocation results in a transfer function that has more zeros than poles; *Gvd*,*<sup>s</sup>* is a strictly proper transfer function for any DC-DC converter. A transfer function of more zeros than poles is non-realistic. In control theory, such transfer functions describe non-causal systems because their current output depends on their future outcomes. To overcome this impediment, we propose to realize *G*−<sup>1</sup> *vd*,*<sup>s</sup>* within a certain frequency band using low-pass filters. The transfer function of a low-pass filter (*GF*) is described [37] as:

$$G\_F = \frac{1}{(1 + \frac{s}{w\_k})^a} \tag{10}$$

where *wc* is the cut-off frequency of the filter and *α* is a constant that dictates the order of the low-pass filter to be used. The order of the filter is chosen to ensure *λGFG*−<sup>1</sup> *PWMG*−<sup>1</sup> *vd*,*<sup>s</sup>* as a strictly proper transfer function. For instance, a buck converter has two storage elements (a capacitor and an inductor), so its *Gvd*,*<sup>s</sup>* will be of second order; *α* must be at least equal to 2. Other converters, like the minimum-phase fourth-order buck DC-DC converter [38] have four storage elements; therefore, *α* must be at least 4. Setting:

$$H = \lambda \mathcal{G}\_F \mathcal{G}\_{PWM}^{-1} \mathcal{G}\_{vd,s}^{-1} \tag{11}$$

and then substituting (11) in (8) changes the dominator of the impedance (1 + *HGPWMGvd*,*s*) to:

$$1 + \lambda \mathcal{G}\_F \mathcal{G}\_{\text{PWM}}^{-1} \mathcal{G}\_{\text{PWM}} \mathcal{G}\_{\text{PWM}} \mathcal{G}\_{\text{vd},s}^{-1} \mathcal{G}\_{\text{vd},s} \tag{12}$$

which can be interpreted as:

$$1 + \lambda \quad \omega \le \omega\_c \tag{13}$$

Thus, the output voltage of the proposed controller can be re-expressed as:

$$
\widetilde{\boldsymbol{w}}\_o \approx \widetilde{\boldsymbol{v}}\_{\boldsymbol{r} \boldsymbol{\varepsilon}} \frac{T\_{\widetilde{\boldsymbol{S}}}^L}{1 + T\_{\widetilde{\boldsymbol{S}}}^L} - \widetilde{\boldsymbol{i}}\_o \frac{Z\_o}{1 + \lambda} \quad \boldsymbol{\omega} \le \omega\_c \tag{14}
$$

Figure 4a shows the reshaped output impedance (*Zo*,*new*), using a low-pass filter with *ω<sup>c</sup>* = 10<sup>5</sup> rad/s, subjected to different values of *λ*. With these proposed modifications to the controller, the magnitude of the source output impedance can be precisely controlled within the filter bandwidth; however, beyond *ωc*, the magnitude of *Zo*,*new* consistently converges to coincide with the magnitude of *Zo*.

**Figure 4.** (**a**) The shaped output impedance magnitudes using a low-pass filter with *ω<sup>c</sup>* = 10<sup>5</sup> rad/s compared to the original output impedance |*Zo*|; and (**b**) demonstrates the selection of *ωi*.

Thus, in order to effectively reshape *Zo* such that the source and the load converters are decoupled, *ω<sup>c</sup>* should be greater than *ωi*, as shown in Figure 4b. Otherwise the shaping will fail to improve the

dynamic performance. Ultimately, the implemented controller with the proposed modifications is shown in Figure 5.

**Figure 5.** The proposed controller, emphasizing the modification to the controller in blue.

#### **4. Impedance Reshaping for Decoupling the Source-Load Interaction**

The impedance overlap in cascaded systems tends to occur in the vicinity of the peak impedance of the source converter [10]. The dynamic response of the system is compromised due to the impedance interaction around that region. The peak impedance occurs either at the cut-off frequency of the source controller (*fs*\_BW) due to low phase margins, or at the source resonant frequency (*fo* = 1/ <sup>√</sup>*LC*) if the the bandwidth of the controller was less than the resonance frequency of the converter. In the latter case, the peaking is more severe because DC-DC converters are designed to be highly efficient, which lightly damps the converter. The peaking of the output impedance can be expressed [39] as:

$$|Z\_{o,max}| = \frac{|Z\_{ol}(f\_{s\\_BW})|}{
\sqrt{(2 - 2\cos(\phi\_{ll}))}} \quad f\_{s\\_BW} > f\_o \tag{15}$$

$$|Z\_{\rm o,max}| = \frac{|Z\_{ol}(f\_o)|}{1 - 10^{(-\Psi/20)}} \quad f\_{s\\_BW} < f\_o \tag{16}$$

where *φ<sup>m</sup>* and Ψ are the phase and the gain margins of the source controller, respectively. A low gain or phase margin causes severe peaking, as depicted in Figure 6. For instance, a phase margin of 30◦ adds 5.8 dB to the output impedance, while a gain margin of 5 dB adds 7.20 dB.

**Figure 6.** The peaking caused by the low relative stability margins.

Reducing the magnitude of *Zo* below *Zin* to ensure stability is mathematically quantifiable because *Zin*, within the load controller bandwidth, can be described as [40]:

$$Z\_{\rm in} = -\frac{V\_{\rm bus^2}}{P\_o} \quad \forall \ f < f\_{L\_{\rm BW}} \tag{17}$$

where *Vbus* is the DC bus voltage, and *Po* is the power consumed by the load. Hence, the system will be stable as long as <sup>|</sup>*Zo*<sup>|</sup> <sup>&</sup>lt; <sup>|</sup>*Zin*|. However, the system dynamic performance would still be compromised if |*Zo*| | *Zin*|, so we are proposing a method to quantify (). The earlier mentioned criteria are used to design the load input impedance. Yet, we propose to shape the output impedance of the source converter to be confined in the region that is below the characteristic impedance of the source converter (*Zx* = *D* <sup>√</sup>*L*/*C*), as demonstrated in Figure 7. Shrinking the impedance in the proposed region ensures the dynamic performance of the system, regardless of the attached load. The peaking is more pronounced as the relative stability margins decrease; as a result, the peak impedance will exceed the stability limit. The dynamic performance can be ensured if <sup>|</sup>*Zo*,*max*<sup>|</sup> <sup>&</sup>lt; <sup>|</sup>*Zx*|, so <sup>|</sup>*Zo*<sup>|</sup> can be reduced to the proposed region of Figure 7 by dividing *Zo* by:

$$\rho = \frac{|Z\_{o,\text{max}}|}{|Z\_x|} \tag{18}$$

where *ρ* is the reduction factor in the magnitude of *Zo*, and *Zo*,*max* is the peak impedance of *Zo*. Hence, equating the dominators of (*Zo*/*ρ*)—which falls in the proposed region—with (9) yields:

*λ* = *ρ* − 1 (19)

**Figure 7.** Plots of |*Zo*| and |*Zx*| showing the reduction factor *ρ* with the shaped impedance |*Zo*,*new*|, where |*Zo*,*new*| is proposed to be in the hatched area.

#### *Mathematical Validation of Performance Preservation*

The shaped output impedance of the source can be expressed as:

$$Z\_{o, \text{new}} = \frac{Z\_o}{\rho} = \frac{Z\_o \,\text{D}}{|Z\_{o, \text{max}}|} \sqrt{\frac{\text{L}}{\text{C}}} \tag{20}$$

As a result, the new minor loop gain (*Tnew <sup>m</sup>* ) is given by:

$$T\_m^{new} = \frac{Z\_{o,new}}{Z\_{in}} = \frac{Z\_o \, D}{Z\_{in} |Z\_{o,max}|} \sqrt{\frac{L}{C}} = \frac{T\_m \, D}{|Z\_{o,max}|} \sqrt{\frac{L}{C}} \tag{21}$$

so substituting (21) in (5) modifies *T<sup>L</sup> <sup>S</sup>* to *<sup>T</sup>LR <sup>S</sup>* as follows:

$$T\_S^{LR} = \frac{T\_S}{1 + \frac{T\_{\text{fl}} \left(1 + T\_S\right) D}{|Z\_{o,\text{max}}|} \sqrt{\frac{L}{C}}} \tag{22}$$

where *TLR <sup>S</sup>* is the reshaped loop gain by implementing the proposed shaping in (18).

In order to prove *TLR <sup>S</sup>* ≈ *TS*, the denominator of (22) is evaluated where |*Zo*,*max*| occurs, where:

$$|T\_{\rm m}| = |Z\_{\rm o,max} / Z\_{\rm in}|\tag{23}$$

$$\delta = |1 + T\_S| = \begin{cases} \sqrt{(2 - 2\cos(\phi\_m))} & f\_{s\\_BW} > f\_o \\ 1 - 10^{(-\Psi/20)} & f\_{s\\_BW} < f\_o \end{cases} \tag{24}$$

In addition, the characteristic equation can be rewritten using (18) as:

$$\sqrt{\frac{L}{C}} = \frac{|Z\_{\text{o,max}}|}{\rho D} \tag{25}$$

Plugging |*Zin*|, (23), (24) and (25) into (22) yields:

$$T\_S^{LR} = \frac{T\_S}{1 + \frac{\delta}{\rho V\_{bus^2}} Z\_{o,max} P\_o} \tag{26}$$

By inspecting the second term of the denominator, the term *δ*/(*ρV*<sup>2</sup> *bus*) 1, and hence, 1 + *δZo*,*maxPo*/(*ρV*<sup>2</sup> *bus*)) ≈ 1. As a result, *<sup>T</sup>LR <sup>S</sup>* ≈ *TS*, which validates the proposed shaping method.

#### **5. Theoretical Analysis**

The effectiveness of the proposed solution to retain the dynamic performance of cascaded systems has been examined using a prototype that consists of two buck converters connected in series, as shown in Figure 8. The source converter tightly regulates the bus voltage at 7 V, while the load converter was designed to supply a resistive load of 16 W, with an output voltage of 4 V. *GPWM* was chosen to be 1 V−1. Each converter was devised to be standalone stable, as the polar plots of their voltage loop gains, *TS* and *TL*, imply in Figure 9. However, cascading the converters was not possible, because the overall system would suffer from instability as impedance overlap occurred, as shown in Figure 10a.

**Figure 8.** The prototype cascaded system used for analysis, simulation, and experiment.

**Figure 9.** The loop gains of the source and the load, showing their standalone stability.

#### *Impedance Reshaping and Performance Improvement*

In order to preserve both the stability and the dynamic performance of cascaded systems, we propose to shape *Zo* according to (20). The characteristic impedance of the source converter is 748.02 mΩ, and the peak impedance of the source is 11.5 dBΩ, which corresponds to 3.76 Ω. Thus, the resultant divisor factor *ρ*, using (18), is 14.5, which yields *λ* = 13.5. Using Figure 10a, *ω<sup>i</sup>* was found to be 2.2 × <sup>10</sup><sup>3</sup> rad/s, so *wc* was set to 10<sup>5</sup> rad/s. As buck converters have two storage elements, *<sup>α</sup>* was chosen to be 2 in order to guarantee that *H* is invertible. Plugging *ω<sup>c</sup>* and *α* in (10) gives:

$$G\_F = \frac{1}{\left(1 + \frac{s}{10^5}\right)^2} \tag{27}$$

so *H*, using (11), will be:

$$H = \frac{6.597 \times 10^6 \text{s}^2 + 7.612 \times 10^9 \text{s} + 2.427 \times 10^{13}}{\text{s}^3 + 2.143 \times 10^5 \text{s}^2 + 1.287 \times 10^{10} \text{s} + 1.435 \times 10^{14}}\tag{28}$$

As a result, the shaped output impedance of the source converter (*Zo*,*new*) is substantially reduced compared to *Zo*, which emphasizes the ability of the proposed method to decouple the impedances, as shown in Figure 10b.

**Figure 10.** The impedance analysis of the prototype: (**a**) showing the interaction between |*Zo*| and |*Zin*|; and (**b**) comparing |*Zo*| with the shaped impedance |*Zo*,*new*|.

In order to show the improvement in the dynamic performance, Figure 11 compares the unity feedback closed loop response of *TS* to its counterpart *TLR <sup>S</sup>* . The response of *<sup>T</sup>LR <sup>S</sup>* closely tracks its reference response, which highlights the effectiveness of the proposed shaping to stabilize and improve the dynamic performance of cascaded systems.

**Figure 11.** The unity feedback step response of *TLR <sup>S</sup>* compared to *TS*.

#### **6. Simulation and Experiment Case Studies**

#### *6.1. Time-Domain Simulations*

The system illustrated in Figure 8 was simulated using PLECS Standalone Package (Plexim, Zurich, Switzerland) in order to evaluate the effectiveness of the proposed controller. Two test cases were carried out. The first test was conducted while the system was at the verge of instability; the load converter was supplying 8 W. Once the system reached steady state, the other 8 W load was added at *t* = 0.15 s. The second test was conducted by starting the system while the load converter was supplying the 16 W in order to compare its response to the theoretical response of *TS*.

The system equipped with the conventional controller (as in Figure 3a) was tested in order to demonstrate the impact of the negative input impedance on the system dynamics. For the first test, the system was stable at the start-up with compromised dynamic response because the settling time was 50 ms compared to 20 ms in Figure 11. Connecting the other 8 W destabilized the bus voltage permanently, as shown in Figure 12a. Then, the second test was run; Figure 12b shows that the system was also unstable. These tests agree with the analytical analysis, which expected the instability of the system using the conventional controller.

The system was then equipped with the proposed controller as in Figure 5 or Figure 8. The first test was conducted, and the system reached the steady state in 20 ms. In addition, increasing the output power by 8 W had negligible impact on the system as Figure 13a depicts. Conducting the second test, as shown in Figure 13b, shows that the system response was similar to the of *TS* in Figure 11, which proves the effectiveness of the proposed reshaping to stabilize and improve the dynamic performance of cascaded systems.

**Figure 12.** The instability of the system with the conventional controller: (**a**) sequential loading; and (**b**) full loading.

**Figure 13.** The improved dynamic response using the proposed method: (**a**) sequential loading; and (**b**) full loading.

#### *6.2. Experimental Cases*

The prototype cascaded system was physically built as shown in Figure 14. The digital controller platform NIcRio 9024 (National Instruments, Austin, TX, USA) was used to control the output voltages of the converters, with a sampling rate of 30 Ksample/s. Similar to the simulation, the system with the conventional controller was tested using the two test procedures, where *vbus* denotes the DC bus voltage. Increasing the load sequentially—as in the first test—destabilized the bus voltage as soon as the load power reached 16 W, as shown in Figure 15a. A similar result was yielded by starting up the system supplying the entire load, as shown in Figure 15b. Hence, the determined impact of the negative input impedance is obvious.

The proposed controller was implemented to demonstrate its effectiveness in preserving the dynamic performance of the cascaded system. The first test was run, and Figure 15c shows the improvement in the response at the start up, while increasing the load had no impact on the stability of the system. Moreover, the second test was conducted, and the response of the system at the start-up while supplying the entire load was identical to the simulated and theoretical responses of *TS* as Figure 15d depicts. Hence, the experimental results have proven the efficacy of the proposed shaping in preserving the dynamic response of cascaded systems.

**Figure 14.** Experimental prototype set-up.

**Figure 15.** Experimental results: (**a**) The instability using the conventional controller by sequential loading; (**b**) The instability at full load with the conventional controller; (**c**) The improved performance using the proposed controller with sequential loading; and (**d**) The response of the system at full loading using the proposed controller.

#### **7. Conclusions**

In this paper, we proposed an active damping method to stabilize and retain the dynamic performance of cascaded systems by reshaping the impedance of the source converter. The magnitude of the shaped impedance was absolutely restricted to be in the region limited by the source characteristic impedance in order to prevent dynamic performance degradation. The proposed method is compatible with any linearized feedback control scheme and any DC-DC converter topology. The mathematical approach was developed in order to evaluate every parameter required to shrink the impedance of the source in the proposed region.

A prototype DC cascaded system was built and analyzed, where the performance of the system with and without the proposed method were compared. Analytical analyses, time-domain simulations, and practical experiments have proven the ability of the proposed method to decouple the interaction of the source and the load converters, and hence preserve their dynamic performances. In contrast, the conventional control method suffered from permanent oscillations at the DC bus.

**Author Contributions:** The authors have participated equally in this work. Analyses, simulations, and experiments were conducted and analyzed by both of the authors.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **References**


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