**A Power Loss Decrease Method Based on Finite Set Model Predictive Control for a Motor Emulator with Reduced Switch Count**

#### **Rui Qin, Chunhua Yang, Hongwei Tao \*, Tao Peng, Chao Yang and Zhiwen Chen**

School of Automation, Central South University, Changsha 410083, China; ruiqin@csu.edu.cn (R.Q.); ychh@csu.edu.cn (C.Y.); pandtao@csu.edu.cn (T.P.); chaoyang@csu.edu.cn (C.Y.); zhiwen.chen@csu.edu.cn (Z.C.) **\*** Correspondence: hongwei.tao@csu.edu.cn; Tel.: +86-151-1113-1734

Received: 7 October 2019; Accepted: 4 December 2019; Published: 6 December 2019

**Abstract:** This paper presents a power loss decrease method based on finite set model predictive control (FSMPC) with delay compensation for a motor emulator with reduced switch count. Specifically, the topology and mathematical model of the proposed motor emulator with reduced switch count are firstly built. Secondly, in light of given instructions, the normal or fault reference current of the motor emulator is set by a reference current setter. Then delay compensation is applied for the predictive current model to calculate the current residual generated by each switch control signal, and the current tracking performance under actions of two adjacent switch control signals is evaluated for each sector. Finally, a switch power loss objective function is defined, then the two adjacent switch control signals that generate the lowest switch power loss are selected for the next second instant, which minimizes the power loss of the motor emulator with ensuring satisfied current tracking performance. Simulation and experimental results show the feasibility and effectiveness of the proposed method.

**Keywords:** motor emulator; power loss; current tracking; finite set model predictive control

#### **1. Introduction**

As key power equipment, motors are widely used in various applications such as defense military, industrial production, and rail transit [1–3]. In the past few decades, the research about motor operating on fault state and condition suddenly alteration have become hot topics in high voltage and power applications [4,5]. The physical motors in the experiments of motor faults are usually damaged, which are not beneficial for performing experiments repeatedly and the cost of the experiments is high. Moreover, the drive shafts of the two physical motors in the experiments of speed with sudden alteration are connected together by adopting the output torque of one motor drive system as the load torque of another motor drive system. The speed of physical motors in the experiments is difficult to sudden change. Stator current of a motor is one of the most reliable electrical signals that reflecting specific features of motor operating on fault state and condition suddenly alteration [6,7]. Motor emulator was proposed by the British scholar H.J. Slater for the first time [8,9], in which the port characteristics of load current are the same as that of stator current of physical motor by controlling power electronic components. So various experiments that motor operating on fault state and condition sudden alteration could be conducted by motor emulator instead of physical motor. It is more secure and economical to perform these experiments by motor emulator compared with a physical motor.

The core of the motor emulator is the load current tracking stator current of motor [10,11]. During several years, motor emulators with plenty of electronic components are employed to simulate port characteristics of stator current [12,13]. In [14,15], the three-level converter of motor emulator is constituted by twelve Insulated Gate Bipolar Translators (IGBTs) and eighteen antiparallel diodes. Other motor emulators can be found in [16,17], in which the two-level converter is composed of six IGBTs and six antiparallel diodes. In [18], linear inverter structure is applied to reduce the harmonics of load current in the motor emulator, but the cost is double the number of electronic components compare with traditional two-level inverter. The load model of motor emulator proposed in [19] is an inductor-capacitor-inductor (LCL) filter, which improves current ripple induced by high-frequency switch, but increase reactive power consumption. There are many electronic components are used in these above motor emulators, which increase volume, weight, cost and directly incur excessive switch power loss [20]. Therefore, the power loss of the motor emulator caused by electronic components has become an important issue to be considered.

The load current tracking control of the motor emulator is mostly realized by PI modulation in the present motor emulators. In [21], the dynamic mathematical model of asynchronous motor is established to realize real-time calculation of stator current and tracking control of load current. A wind generator emulator is proposed in [22], which simulates static characteristics of stator current at different wind speeds by controlling a converter. But the steady-state error between stator current and load current is hardly eliminated by PI modulation. A current tracking method based on FSMPC is presented in [23], which improves the accuracy and rapidity of current tracking when compare to PI modulation. In [24], an optimized current control method with delay compensation is proposed to overcome harmonic current in distributed generation converters, and reference current at the next instant is tracked by controlling one switch control signal to generate one basic space voltage vector during every sampling period. However, these presented motor emulators only pursuit current tracking performance as the control object, while power loss of motor emulators is severely neglected. For motor emulators, especially applying to high voltage and power systems, various crucial factors such as on-off time and frequency of switch, can affect switch power loss, which directly linked with service behavior and life of switch. To the best of our knowledge, there is a lack of work about the power loss control method of motor emulator.

Motivated by the above discussion, a power loss decrease method for a reduced switch count motor emulator is proposed in this paper, which is realized by FSMPC with delay compensation. At the first, a topology of the motor emulator is proposed, in which the switch count of converter is reduced. Secondly, a power loss decrease method based on FSMPC is presented, an objective function is designed to select two adjacent switch control signals that generating lowest switch power loss on the premise of ensuring current tracking performance. Finally, the delay compensation is applied to improve current tracking accuracy, which is realized by calculating the current residual between predicted load current and reference current at the next second instant.

The rest of the paper is organized as follows. The topology and modeling of the motor emulator with reduced switch count are illustrated in Section 2. The power loss decrease method based on FSMPC with delay compensation is elaborated upon in Section 3. Section 4 is dedicated to present experimental results and discussion of switch power loss and performance of current tracking of motor emulator. Finally, the conclusions of this paper are reviewed in Section 5.

#### **2. Motor Emulator with Reduced Switch Count**

#### *2.1. Topology of Motor Emulator*

The topology of the motor emulator with reduced switch count is presented in Figure 1. It consists of the three-phase four-switch converter, coupled load network, motor model, the reference current setter and predictive controller. In three-phase four-switch converter, *b* and *c* phase are constructed of four active switches and four antiparallel diodes, and *a* phase is composed of two dc-link capacitors. The coupled load network consists of three-phase resistance-inductance load, where each phase includes a coupled resistance *R* and a coupled inductance *L*. The left and right ports of coupled load networks are connected to three-phase midpoint of three-phase four-switch converter and voltage source. The motor model is a squirrel cage asynchronous motor model, which provides a normal

three-phase stator current signal. According to given instruction, reference current is generated by reference current setter. When normal instruction is given, a three-phase stator current is adopted directly as reference current signal. When fault instruction is given, fault reference current signal is generated by conditioning three-phase stator current signal and specific fault signal, which is detailed in [25]. By calculating the current residual between reference current signal and predictive value of load current, the best applicable switch control signal is selected by predictive controller as switch control signal of three-phase four-switch converter for the next second instant.

**Figure 1.** The topology of motor emulator with reduced switch count.

#### *2.2. Modeling of Motor Emulator*

Three-phase output voltages of three-phase four-switch converter can be expressed by switching state as:

$$
\begin{bmatrix} u\_a \\ u\_b \\ u\_c \end{bmatrix} = u\_{dc} \begin{bmatrix} 0.5 \\ S\_b \\ S\_c \end{bmatrix} \tag{1}
$$

where *ua*, *ub* and *uc* are output voltage values of *a*, *b* and *c* phases of three-phase four-switch converter, *udc* is input voltage of three-phase four-switch converter, which is the sum of voltages of split capacitors *udc*<sup>1</sup> and *udc*<sup>2</sup> at the dc side. *Sb* and *Sc* are switching states of *b* and *c* phases in the three-phase four-switch converter, each of them has two logical states 0 and 1 [26,27]. When *SX* = 0, *TX*<sup>1</sup> is off and *TX*<sup>2</sup> is on. When *SX* = 1, *TX*<sup>1</sup> is on and *TX*<sup>2</sup> is off , *X* = *b*, *c*.

In addition, the switch control signal of three-phase four-switch converter can be defined as *Sz*, which can be given by *Sz* = *SbSc*, and *z* represents the selected number of *Sz*. The basic space voltage vector corresponding to switch control signal *Sz* is defined as *<sup>V</sup>z*, which is synthesized by three-phase output voltages *ua*, *ub* and *uc* in three-phase *abc* static coordinate frame. The basic space voltage vector *<sup>V</sup><sup>z</sup>* is described as (2) and the spatial distribution on the *abc* static coordinate frame is shown Figure 2.The relationship of switch control signal *Sz*, three-phase output voltages *ua*, *ub* and *uc*, and basic space voltage vectors *<sup>V</sup><sup>z</sup>* are listed in Table 1.

$$V\_z = u\_a + u\_b + u\_c \tag{2}$$


**Table 1.** Switch control signals, three-phase output voltages and basic space voltage vectors.

In *abc* static coordinate frame, every work period of the three-phase four-switch converter is divided into four sectors by four basic space voltage vectors. The sector formed by two adjacent basic space voltage vectors *<sup>V</sup><sup>z</sup>* and *<sup>V</sup>z*+<sup>1</sup> is named as *Nz*, where (*z*, *<sup>z</sup>* <sup>+</sup> <sup>1</sup>) can be (1, 2), (2, 3), (3, 4) and (4, 1), as shown in Figure 2.

**Figure 2.** Spatial distribution diagram of basic space voltage vectors and sectors.

The voltage state equation of the motor emulator can be expressed as:

$$
\mu\_{\mathbf{x}} = \mu\_{\mathbf{x'}} + R i\_{\mathbf{x}} + L \frac{di\_{\mathbf{x}}}{dt}, \quad \mathbf{x} = a, b, c; \; \mathbf{x'} = a', b', c'. \tag{3}
$$

where *ux* is output voltage of *x* phase of three-phase four-switch converter, *ux* is output voltage of *x* phase of voltage source. *ix* is load current of *x* phase of coupled load network. *R* and *L* are the resistance and inductance of coupled load network respectively.

Then, predictive current at the (*k* + 1)-th instant can be obtained by discretizing Equation (3):

$$i\_{\mathbf{x}}^{k+1} = (1 - \frac{RT\_{\mathbf{t}}}{L})i\_{\mathbf{x}}^{k} + \frac{T\_{\mathbf{t}}}{L}(\mu\_{\mathbf{x}}^{k} - \mu\_{\mathbf{x}'}^{k})\tag{4}$$

where *k* is sampling instant and *k* = 1, 2, 3 ··· . *Ts* is the sampling period. *i <sup>k</sup>*+<sup>1</sup> *<sup>x</sup>* is predictive current at the (*k* + 1)-th instant. *i k <sup>x</sup>* is sampling of *ix* at the *k*-th instant. *u<sup>k</sup> <sup>x</sup>* and *u<sup>k</sup> <sup>x</sup>* are samplings of *ux* and *ux* at the *k*-th instant respectively.

#### **3. Power Loss Decrease Method Based on FSMPC with Delay Compensation**

#### *3.1. Current Tracking Performance*

The theory of ideal FSMPC is shown in Figure 3a. Reference stator current *i* ∗ *<sup>x</sup>* is obtained and actual load current *i k <sup>x</sup>* are sampled at the *k*-th instant, and the optimal switch control signal is determined during the *k*-th sampling period and applied to the system at the *k*-th instant, then load current will reach the expected value at the (*k* + 1)-th instant. However, digital process system needs time to perform algorithm, as shown in Figure 3b. The sampling is accomplished at the *k*-th instant, but the optimal switch control signal is applied to system after *td* delay, which results in error between actual load current and expected value at the (*k* + 1)-th instant. Thus, the accuracy and rapidity of current tracking is partly decreased, especially for motor operating on fault state and condition suddenly alteration. Therefore, the delay compensation is adopted to regulate action time of the optimal switch control signal, as shown in Figure 3c. Sampling is completed at the *k*-th instant and calculating the optimal switch control signal during the the *k*-th sampling period, and applied to the system at the (*k* + 1)-th instant, then load current will reach the expected value at the (*k* + 2)-th instant. The delay compensation not only makes up for computation time of the algorithm, but also effectively raises the performance of current tracking for motor operating on fault state and condition suddenly alteration.

**Figure 3.** Principle of delay compensation.

According to principle of delay compensation [24], all switch control signals are used to calculate the predictive current at the (*k* + 2)-th instant:

$$
\mu\_{S\_z x}^{k+2} = (1 - \frac{RT\_z}{L})t\_x^{k+1} + \frac{T\_t}{L}(u\_{S\_z x}^{k+1} - u\_{x'}^k), \quad z = 1, 2, 3, 4. \tag{5}
$$

where *i k*+2 *Szx* is predictive current at the (*<sup>k</sup>* + 2)-th instant corresponding to switch control signal *Sz*. *<sup>u</sup>k*+<sup>1</sup> *Szx* predictive voltage at the (*k* + 1)-th instant corresponding to switch control signal *Sz*. Considering that the change of voltage source during one sampling period is not obvious, the sampling of *ux* at the (*k* + 1)th instant is approximatively equal to *u<sup>k</sup> x* .

After Clark coordinate transformation, *i k*+2 *Szx* can be converted as:

$$
\begin{bmatrix} i\_{S\_z a}^{k+2} \\ i\_{S\_z b}^{k+2} \end{bmatrix} = \sqrt{\frac{2}{3}} \begin{bmatrix} 1 & -\frac{1}{2} & -\frac{1}{2} \\ 0 & \frac{\sqrt{3}}{2} & -\frac{\sqrt{3}}{2} \end{bmatrix} \begin{bmatrix} i\_{S\_z a}^{k+2} \\ i\_{S\_z b}^{k+2} \\ i\_{S\_z c}^{k+2} \end{bmatrix} \tag{6}
$$

where *i k*+2 *Sz<sup>α</sup>* and *i k*+2 *Sz<sup>β</sup>* are the values of predictive current *i k*+2 *Szx* in *αβ* stationary frame.

Then, the current residual function at the (*k* + 2)-th instant can be defined as:

$$|\epsilon\_{S\_z}^{k+2}| = |i\_{S\_z a}^{k+2} - i\_a^{\*(k+2)}|^2 + |i\_{S\_z \beta}^{k+2} - i\_{\beta}^{\*(k+2)}|^2 \tag{7}$$

where *ek*+<sup>2</sup> *Sz* is current residual at the (*k* + 2)-th instant corresponding to switch control signal *Sz*. *i* <sup>∗</sup>(*k*+2) *<sup>α</sup>* and *i* ∗(*k*+2) *<sup>β</sup>* are the reference currents at the (*k* + 2)-th instant in *αβ* stationary frame. The *i* <sup>∗</sup>(*k*+2) *<sup>α</sup>* and *i* ∗(*k*+2) *<sup>β</sup>* can be constructed by the reference currents at the (*k* − 1)-th, the *k*-th and the (*k* + 1)-th instants according to linear interpolation theorem:

$$\begin{cases} \begin{array}{c} i\_{\mathfrak{a}}^{\*(k+2)} = 3i\_{\mathfrak{a}}^{\*(k+1)} - 3i\_{\mathfrak{a}}^{\*(k)} + i\_{\mathfrak{a}}^{\*(k-1)} \\\ i\_{\mathfrak{f}}^{\*(k+2)} = 3i\_{\mathfrak{f}}^{\*(k+1)} - 3i\_{\mathfrak{f}}^{\*(k)} + i\_{\mathfrak{f}}^{\*(k-1)} \end{array} \end{cases} \tag{8}$$

where, when *k* is equal to 1, the values of *i* <sup>∗</sup>(0) *<sup>α</sup>* and *<sup>i</sup>* ∗(0) *<sup>β</sup>* are set to equal the values of *i* <sup>∗</sup>(1) *<sup>α</sup>* and *i* ∗(1) *<sup>β</sup>* respectively.

In the traditional method of current tracking, only one basic space voltage vector *<sup>V</sup><sup>z</sup>* is generated by controlling a switch control signal *Sz* during every sampling period. When the traditional strategy is adopted for the current tracking control of the motor emulator, the error between load current and stator current is larger and current tracking accuracy is lower because of the finiteness and space distribution fixity of basic space voltage vectors. In the method of current tracking in this paper, there are two adjacent basic space voltage vectors *<sup>V</sup><sup>z</sup>* and *<sup>V</sup>z*+<sup>1</sup> are generated by controlling two adjacent switch control signals *Sz* and *Sz*+<sup>1</sup> during every sampling period. By allocating the action time proportion of the two space voltage vectors during one period, the error between load current and stator current can be minimized.

Since the sum of action time of two adjacent switch control signals *Sz* and *Sz*+<sup>1</sup> is constant *Ts*, and the action time of each switch control signal is inversely proportional to the current residual generated by it, larger current residual leads to smaller action time. Thus the action time of two adjacent switch control signals *Sz* and *Sz*+<sup>1</sup> for the sector *Nz* are derived as:

$$\begin{cases} \begin{array}{c} d\_{N\_xS\_z}^{k+2} = \frac{\epsilon\_{S\_{z+1}}^{k+2}}{\epsilon\_{S\_z}^{k+2} + \epsilon\_{S\_{z+1}}^{k+2}} T\_s\\ \vdots\\ d\_{N\_xS\_{z+1}}^{k+2} = \frac{\epsilon\_{S\_z}^{k+2}}{\epsilon\_{S\_z}^{k+2} + \epsilon\_{S\_{z+1}}^{k+2}} T\_s\\ \end{array} \tag{9} \\\ T\_s = d\_{N\_xS\_z}^{k+2} + d\_{N\_xS\_{z+1}}^{k+2} \end{cases} \tag{9}$$

where *dk*+<sup>2</sup> *NzSz* and *<sup>d</sup>k*+<sup>2</sup> *NzSz*+<sup>1</sup> are action times two switch control signals *Sz* and *Sz*+<sup>1</sup> of sector *Nz* for the (*k* + 2)-th instant.

The current tracking performance function for the sector *Nz* at the (*k* + 2)-th instant can be designed as:

$$\mathcal{G}\_{N\_z}^{k+2} = 1 - \frac{T\_s}{4I\_{mx}^t} \left( \frac{\epsilon\_{S\_x+1}^{k+2}}{d\_{N\_zS\_x}^{k+2}} + \frac{\epsilon\_{S\_x}^{k+2}}{d\_{N\_xS\_{x+1}}^{k+2}} \right) \tag{10}$$

where *<sup>ξ</sup>k*+<sup>2</sup> *Nz* expresses current tracking performance at the (*<sup>k</sup>* + 2)-th instant under the action of the two switch control signals *Sz* and *Sz*+<sup>1</sup> for sector *Nz*. *I*∗ *mx* is peak value of three-phase reference current *i* ∗ *x*. The value of *<sup>ξ</sup>k*+<sup>2</sup> *Nz* is between 0 to 1. When *<sup>ξ</sup>k*+<sup>2</sup> *Nz* = 1, current tracking performance is optimal, *<sup>ξ</sup>k*+<sup>2</sup> *Nz* is dropping gradually as the current tracking performance decreases.

#### *3.2. Power Loss Minimization*

The switch power loss generated by switch control signal *Sz* at the (*k* + 2)-th instant is defined as *Pk*+<sup>2</sup> *Sz* , which can be given by:

$$P\_{S\_x}^{k+2} = P\_{S\_z b\_1}^{k+2} + P\_{S\_z b\_2}^{k+2} + P\_{S\_z c\_1}^{k+2} + P\_{S\_z c\_2}^{k+2} \tag{11}$$

where, *Pk*+<sup>2</sup> *Szb*<sup>1</sup> , *Pk*+<sup>2</sup> *Szb*<sup>2</sup> , *Pk*+<sup>2</sup> *Sz <sup>c</sup>*<sup>1</sup> and *<sup>P</sup>k*+<sup>2</sup> *Sz <sup>c</sup>*<sup>2</sup> are switch power losses of switches *Tb*<sup>1</sup> , *Tb*<sup>2</sup> , *Tc*<sup>1</sup> and *Tc*<sup>2</sup> at the (*k* + 2)-th instant under the action of switch control signal *Sz*, they can be expressed as follows:

$$\begin{cases} \begin{aligned} P\_{S\_x X\_1}^{k+2} &= \delta\_X^k [S\_{X\_1}^k(|\dot{r}\_X^k| \times u\_{S\_x X\_1}^{k+1} \times T\_s) + L\_{S\_x X\_1}^{k+1}] \\\ P\_{S\_z X\_2}^{k+2} &= \delta\_X^k [S\_{X\_2}^k(|\dot{r}\_X^k| \times u\_{S\_z X\_2}^{k+1} \times T\_s) + L\_{S\_z X\_2}^{k+1}] \end{aligned} , \quad X = b \text{,c.} \end{cases} \tag{12}$$

where, *i k <sup>X</sup>* is sampling of *iX* at the *<sup>k</sup>*-th instant. *<sup>δ</sup><sup>k</sup> <sup>X</sup>* is flag of *i k <sup>X</sup>*, if *i k <sup>X</sup>* 0, *<sup>δ</sup><sup>k</sup> <sup>X</sup>* = 1; if *i k <sup>X</sup>* < 0, *<sup>δ</sup><sup>k</sup> <sup>X</sup>* = 0. *<sup>S</sup><sup>k</sup> X*1 and *S<sup>k</sup> <sup>X</sup>*<sup>2</sup> are pulse signals of *TX*<sup>1</sup> and *TX*<sup>2</sup> at the *<sup>k</sup>*-th instant, *<sup>S</sup><sup>k</sup> <sup>X</sup>*<sup>1</sup> = 1 when *TX*<sup>1</sup> on, and *<sup>S</sup><sup>k</sup> <sup>X</sup>*<sup>1</sup> = 0 when *TX*<sup>1</sup> off, which also beseem to *S<sup>k</sup> <sup>X</sup>*<sup>2</sup> and *TX*<sup>2</sup> . *<sup>u</sup>k*+<sup>1</sup> *SzX*<sup>1</sup> and *<sup>u</sup>k*+<sup>1</sup> *SzX*<sup>2</sup> are on-state voltage drops of *TX*<sup>1</sup> and *TX*<sup>2</sup>

at the (*k* + 1)-th instant corresponding to switch control signal *Sz*, they are assumed to be constant values, which can be found in [25]. *Lk*+<sup>1</sup> *SzX*<sup>1</sup> and *<sup>L</sup>k*+<sup>1</sup> *SzX*<sup>2</sup> are on-off losses of *TX*<sup>1</sup> and *TX*<sup>2</sup> at the (*k* + 1)-th instant corresponding to switch control signal *Sz*, they can be given by:

$$L\_{S\_z X\_m}^{k+1} = \begin{cases} E\_{\text{on}}, & S\_{zX\_m}^{k+1} - S\_{X\_m}^k = 1 \\ 0, & S\_{zX\_m}^{k+1} - S\_{X\_m}^k = 0 \\\ E\_{off'}, & S\_{zX\_m}^{k+1} - S\_{X\_m}^k = -1 \end{cases}, \quad X = b, c; \ m = 1, 2. \tag{13}$$

where, *Eon* and *Eoff* are on and off power loss of switch, they are assumed to be constant values, which can be found in [25]. *<sup>S</sup>k*+<sup>1</sup> *zXm* is pulse signal of *TXm* at the (*<sup>k</sup>* + 1)-th instant corresponding to switch control signal *Sz*.

The switch power loss objective function is designed as:

$$g\_{N\_z}^{k+2} = \frac{P\_{S\_z}^{k+2} + P\_{S\_{z+1}}^{k+2}}{8} \tag{14}$$

where, *<sup>g</sup>k*+<sup>2</sup> *Nz* is average switch power loss at the (*<sup>k</sup>* + 2)-th instant under the action of the two adjacent switch control signals *Sz* and *Sz*+<sup>1</sup> for sector *Nz*. During the the *k*-th sampling period, two adjacent switch control signals of each sectors are orderly used to calculate value of switch power loss objective function *<sup>g</sup>k*+<sup>2</sup> *Nz* .

The switching states of *b* and *c* phases can be obtained according to Equation (15):

$$\lg[S\_b^{k+1}, S\_c^{k+1}] = \min\_{\substack{\imath\_{N\_2}^{k+2} \ e \ (0.05, 1) \\ z = 1, 2, 3, 4}} \{ g\_{N\_2}^{k+2} \} \tag{15}$$

where, *Sk*+<sup>1</sup> *<sup>b</sup>* and *<sup>S</sup>k*+<sup>1</sup> *<sup>c</sup>* are switching states of *<sup>b</sup>* and *<sup>c</sup>* phases in the three-phase four-switch converter at the (*k* + 1)-th instant. On the condition that current tracking performance greater than 95%, the switches that generating lowest switch power loss are selected to operate during every sampling period, then switch power loss can be reduced.

The flowchart of proposed power loss decrease method based on FSMPC with delay compensation is shown in Figure 4.

**Figure 4.** Flowchart of the FSMPC with delay compensation.

#### **4. Experimental Results**

In this section, the power loss decrease method for motor emulator based on reducing switch count and FSMPC with delay compensation is verified on a hardware-in-the-loop platform as shown in Figure 5. The corresponding component parameters are indicated in Table 2. The platform consists of a physical controller, real-time simulator, and PC. Physical controller adopts TMS320F28335 control chip with high processing capacity and rich interface resources to realize real-time control of voltage source. The real-time simulator includes DS1007CPU board and DS5203FPGA board, the former is used for real-time calculation of reference current setter and predictive controller, and the latter is used for real-time simulation of motor model, coupled load network and three-phase four-switch converter. The PC collects real-time data from model by real-time simulation software, and monitors running state of observation point.

**Figure 5.** Experimental platform.


**Table 2.** Parameters of the experimental platform.

#### *4.1. Motor Emulators with Different Switch Counts*

On the condition that high power motor is operating with reference load current set 60 A/20 Hz and low power motor is operating with reference load current set 7 A/30 Hz, respectively. The comparison of current tracking performance and switch power loss for traditional six-switch motor emulator and proposed four-switch motor emulator without power loss minimization control are displayed in this section.

For the high power motor, the experimental waveforms of *a*-phase reference current, *a*-phase load current of six-switch motor emulator, and *a*-phase load current of four-switch motor emulator are shown in Figure 6a. Based on these conditions, the experimental waveforms of average three-phase current residual of between reference current and load current of six-switch and four-switch motor emulator are shown in Figure 6b, respectively. The experimental waveforms of average three-phase current THD (total harmonic distortion) of reference current, load current of six-switch and four-switch motor emulator are shown in Figure 6c, respectively. The switch power loss during entire simulation period of six-switch and four-switch motor emulator are shown in Table 3. Similarly, the experimental waveforms for the low power motor are shown in Figure 7a–c and Table 4.


**Table 3.** Switch power losses of traditional six-switch and proposed four-switch motor emulator for high power motor.

**Table 4.** Switch power losses of traditional six-switch and proposed four-switch motor emulator for low power motor.


As shown in Figure 6a, comparing to the zero-crossing time of reference current, the zero-crossing time of six-switch motor emulator is delayed by about 30 us, which is expressed as *t<sup>T</sup> <sup>n</sup>* , and the zero-crossing time of four-switch motor emulator is delayed by about 35 us, which is denoted as *tP <sup>n</sup>* . From Figure 6b, average three-phase current residual of six-switch motor emulator is about 1.1A, current tracking accuracy is 98.2% according to (16). Average three-phase current residual of four-switch motor emulator is about 1.3 A, current tracking accuracy is 97.8% according to (17). In Figure 6c, the average THD of three-phase reference current is 1.30%, and average THD of three-phase load current of six-switch and four-switch motor emulator are about 1.7% and 1.80%, respectively. From Table 3, comparing to a traditional six-switch motor emulator, although the average switch power loss has increased, the sum of switch power loss decreases 23.81%, according to (18).

$$
\varepsilon^T = \frac{\dot{\imath}^R - \Delta \dot{\imath}^{RT}}{\dot{\imath}^R} \times 100\% \tag{16}
$$

where *ε<sup>T</sup>* is current tracking accuracy of traditional six-switch motor emulator, *i <sup>R</sup>* is reference current, Δ*i RT* is average three-phase current residual between reference current and load current of traditional six-switch motor emulator.

$$
\varepsilon^P = \frac{\dot{i}^R - \Delta \dot{i}^{RP}}{\dot{i}^R} \times 100\% \tag{17}
$$

where *ε<sup>P</sup>* is current tracking accuracy of proposed four-switch motor emulator, *i <sup>R</sup>* is reference current, Δ*i RP* is average three-phase current residual between reference current and load current of proposed four-switch motor emulator.

$$
\sigma = \frac{P\_{\text{sum}}^T - P\_{\text{sum}}^P}{P\_{\text{sum}}^T} \times 100\% \tag{18}
$$

where *σ* is decrease percent of total switch power loss, *P<sup>T</sup> sum* is sum of switch power loss of traditional six-switch motor emulator, *P<sup>P</sup> sum* is sum of switch power loss of proposed four-switch motor emulator.

**Figure 6.** Waveforms of traditional six-switch and proposed four-switch motor emulator for high power motor.

**Figure 7.** Waveforms of traditional six-switch and proposed four-switch motor emulator for low power motor.

As shown in Figure 7a, comparing to the zero-crossing time of reference current, the zero-crossing time of six-switch motor emulator is delayed by about 30 us, which is expressed as *t<sup>T</sup> <sup>n</sup>* , and the zero-crossing time of four-switch motor emulator is delayed by about 35 us, which is denoted as *t<sup>P</sup> n* . From Figure 7b, average three-phase current residual of six-switch motor emulator is about 0.1 A, current tracking accuracy is 98.6%. Average three-phase current residual of four-switch motor emulator is about 0.12 A, current tracking accuracy is 98.3%. In Figure 7c, the average THD of three-phase reference current is 2.1%, and average THD of three-phase load current of six-switch and four-switch motor emulator are about 2.9% and 3.3%, respectively. From Table 4, comparing to traditional six-switch motor emulator, although the average switch power loss has increased, the sum of switch power loss decreases 20.7%. The experimental results have shown that the proposed four-switch motor emulator decrease effectively switch power loss on the premise of ensuring current tracking effect of motor emulator for the high and low power motor.

#### *4.2. Current Tracking Performance Based on FSMPC and FSMPC with Delay Compensation*

On the condition that high power motor is operating with reference load current set 60 A/20 Hz and low power motor is operating with reference load current set 7 A/30 Hz, respectively. The comparison of current tracking performance and switch power loss based on FSMPC and FSMPC with delay compensation on the condition without power loss minimization control are displayed in this section.

For the high power motor, the experimental waveforms of *a*-phase reference current, *a*-phase load current based on FSMPC, and *a*-phase load current based on FSMPC with delay compensation are shown in Figure 8a. With these conditions, the experimental waveforms of average three-phase current residual of between reference current and load current based on FSMPC and FSMPC with delay compensation are shown in Figure 8b, respectively. The experimental waveforms of average three-phase current THD of reference current, load current based on FSMPC and FSMPC with delay compensation are shown in Figure 8c, respectively. The switch power loss results during entire simulation period based on FSMPC and FSMPC with delay compensation are shown in Table 5. Similarly, the experimental waveforms for the low power motor are shown in Figure 9a–c and Table 6. Comparison of based on FSMPC and FSMPC with delay compensation for high and low power motor are shown in Table 7.


**Table 5.** Switch power losses based on FSMPC and FSMPC with delay compensation for high power motor.

**Figure 8.** Waveforms based on FSMPC and FSMPC with delay compensation for high power motor.

**Figure 9.** Waveforms based on FSMPC and FSMPC with delay compensation for low power motor.

As shown in Figure 8a, comparing to the zero-crossing time of reference current, the zero-crossing time of load current based on FSMPC is delayed by about 45 us, which is expressed as *t<sup>T</sup> <sup>n</sup>* , and the zero-crossing time of load current based on FSMPC with delay compensation is delayed by about 35 us, which is denoted as *t<sup>P</sup> <sup>n</sup>* . From Figure 8b, average three-phase current residual based on FSMPC is about 1.9 A, current tracking accuracy is 96.8%. Average three-phase current residual based on FSMPC with delay compensation is about 1.3 A, current tracking accuracy is 97.8%. In Figure 8c, the average THD of three-phase reference current is 1.30%, and average THD of three-phase load current based on FSMPC and FSMPC with delay compensation are about 2.4% and 1.80%, respectively. From the Table 5, the sum and average switch power loss based on FSMPC and FSMPC with delay compensation are almost equal.


**Table 6.** Switch power losses based on FSMPC and FSMPC with delay compensation for low power motor.

As shown in Figure 9a, comparing to the zero-crossing time of reference current, the zero-crossing time of load current based on FSMPC is delayed by about 45 us, which is expressed as *t<sup>T</sup> <sup>n</sup>* , and the zero-crossing time of load current based on FSMPC with delay compensation is delayed by about 35 us, which is denoted as *t<sup>P</sup> <sup>n</sup>* . From Figure 9b, average three-phase current residual based on FSMPC is about 0.17 A, current tracking accuracy is 97.5%. Average three-phase current residual based on FSMPC with delay compensation is about 0.12 A, current tracking accuracy is 98.3%. In Figure 9c, the average THD of three-phase reference current is 2.1%, and average THD of three-phase load current based on FSMPC and FSMPC with delay compensation are about 3.2% and 4.3%, respectively. From the Table 6, the sum and average switch power loss based on FSMPC and FSMPC with delay compensation are almost equal. The experimental results have shown that, for the high and low power motor, the residual between load current and reference current is reduced and current tracking accuracy is improved by applying FSMPC with delay compensation, when compared with FSMPC.


**Table 7.** Comparison of based on FSMPC and FSMPC with delay compensation for high and low power motor.

#### *4.3. Motor Rotor Broken Bar Fault*

When the motor is operating under rotor broken bar fault with the reference current for high power motor set 60 A/20 Hz and low power motor set 7 A/30 Hz respectively, and fault level set 20%. The comparison of current tracking performance and switch power loss for proposed motor emulator without and with power loss minimum control are displayed in this section.

For the high power motor, the experimental waveforms of *a*-phase reference current, *a*-phase load current of proposed motor emulator without and with power loss minimization control are shown in Figure 10a. Based on these conditions, the experimental waveforms of average three-phase current residual of between reference current and load current of without and with power loss minimization control are shown in Figure 10b, respectively. The experimental waveforms of average three-phase current THD of reference current, load current with or without power loss minimization control are shown in Figure 10c, respectively. The switch power loss results during entire simulation period of proposed motor emulator without and with power loss minimization control are shown in Table 8. Similarly, the experimental waveforms for the low power motor are shown in Figure 11a–c and Table 9.


**Table 8.** Switch power losses of motor rotor broken bar fault for high power motor.

As shown in Figure 10a, when the motor is operating under rotor broken bar fault, comparing to the zero-crossing time of reference current, the zero-crossing time of load current without power loss minimization control is delayed by about 40 us, which is expressed as *t<sup>P</sup> <sup>n</sup>* , and the zero-crossing time of load current with power loss minimization control is delayed by about 50 us, which is denoted as *t<sup>P</sup> y* . From Figure 10b, average three-phase current residual of without and with power loss minimization control are about 2.0 A and 2.2 A, and current tracking accuracy are 96.6% and 96.3%. In Figure 10c, the average THD of three-phase reference current is 19%, and average THD of three-phase load current of without and with power loss minimization control is 22% and 24%, respectively. From Table 8, consideration of power loss, the sum and average switch power loss of the latter have both decreased by 22.74% than the former.

**Table 9.** Switch power losses of motor rotor broken bar fault for low power motor.


(**c**)Average THD of three-phase currents

**Figure 10.** Waveforms of rotor broken bar fault for high power motor. 228

(**c**)Average THD of three-phase currents

**Figure 11.** Waveforms of rotor broken bar fault for low power motor. 229

As shown in Figure 11a, when the motor is operating under rotor broken bar fault, comparing to the zero-crossing time of reference current, the zero-crossing time of load current without power loss minimization control is delayed by about 40 us, which is expressed as *t<sup>P</sup> <sup>n</sup>* , and the zero-crossing time of load current with power loss minimization control is delayed by about 50 us, which is denoted as *t<sup>P</sup> y* . From Figure 11b, average three-phase current residual of without and with power loss minimization control are about 0.15 A and 0.18 A, and current tracking accuracy are 97.8% and 97.4%. In Figure 11c, the average THD of three-phase reference current is 25%, and average THD of three-phase load current of without and with power loss minimization control is 30% and 35%, respectively. From Table 9, consideration of power loss, the sum and average switch power loss of the latter have both decreased by 21.47% than the former, respectively. The experimental results have shown that, for the high and low power motor, the proposed power loss decrease method can reduce effectively switch power loss on the premise of ensuring the current tracking effect of the motor emulator when the motor is operating under rotor broken bar fault.

#### *4.4. Motor Speed Suddenly Alteration*

When the motor is operating under speed suddenly alteration with speed set 1250 rpm to 2500 rpm for high power motor and speed set 1000 rpm to 1800 rpm for low power motor respectively, as show in Figures 12a and 13a. The comparison of current tracking performance and switch power loss for proposed motor emulator without and with power loss minimization control are displayed in this section.

For the high power motor, the experimental waveforms of *a*-phase reference current, *a*-phase load current of proposed motor emulator without and with power loss minimization control are shown in Figure 12b. Based on these conditions, the experimental waveforms of average three-phase current residual of between reference current and load current of without and with power loss minimization control are shown in Figure 12c, respectively. The experimental waveforms of average three-phase current THD of reference current, load current of proposed motor emulator without and with power loss minimization control are shown in Figure 12d, respectively. The switch power loss results during the entire simulation period of the proposed motor emulator without and with power loss minimization control are shown in Table 10. Similarly, the experimental waveforms for the low power motor are shown in Figure 13b–d and Table 11.


**Table 10.** Switch power losses of speed suddenly alteration for high power motor.

As shown in Figure 12b, when the motor is operating under speed sudden alteration, comparing to the zero-crossing time of reference current, the zero-crossing time of load current without power loss minimization control is delayed by about 40 us, which is expressed as *t<sup>P</sup> <sup>n</sup>* , and the zero-crossing time of load current with power loss minimization control is delayed by about 60 us, which is denoted as *t<sup>P</sup> y* . From Figure 12c, average three-phase current residual of without and with power loss minimization control are about 2.0 A and 2.2 A, and current tracking accuracy are 96.6% and 96.3%. In Figure 12d, the average THD of three-phase reference current is 1.7%, and average THD of three-phase load current of without and with power loss minimization control is 1.9% and 2.0%, respectively. From Table 10, consideration of power loss, the sum and average switch power loss of the latter have both decreased by 20.83% than the former.

**Figure 12.** Waveforms of speed suddenly alteration for high power motor.

**Figure 13.** Waveforms of speed suddenly alteration for low power motor.


**Table 11.** Switch power losses of speed suddenly alteration for low power motor.

As shown in Figure 13b, when the motor is operating under speed suddenly alteration, comparing to the zero-crossing time of reference current, the zero-crossing time of load current without power loss minimization control is delayed by about 40 us, which is expressed as *t<sup>P</sup> <sup>n</sup>* , and the zero-crossing time of load current with power loss minimization control is delayed by about 60 us, which is denoted as *t<sup>P</sup> y* . From Figure 13c, average three-phase current residual of without and with power loss minimization control are about 0.16 A and 0.19 A, and current tracking accuracy are 97.7% and 97.3%. In Figure 13d, the average THD of three-phase reference current is 2.0%, and average THD of three-phase load current of without and with power loss minimization control is 3.2% and 4.0%, respectively. From Table 11, consideration of power loss, the sum and average switch power loss of the latter have both decreased by 20.88% than the former, respectively. The experimental results show that, for the high and low power motor, the proposed power loss decrease method can reduce effectively switch power loss on the premise of ensuring the current tracking effect of the motor emulator, when the motor is operating under speed suddenly alteration.

#### **5. Conclusions**

A power loss decrease method based on FSMPC with delay compensation for a reduced switch count motor emulator is proposed in this paper. In the proposed motor emulator topology, converter consists of four active switches and two capacitors. Within the power loss decrease method based on FSMPC with delay compensation, an objective function is designed to select the two adjacent switch control signals that generating lowest switch power loss while keeping satisfied current tracking performance. The simulation and experiment results show the feasibility and effectiveness of the proposed method which achieving minimum power loss and ensuring current tracking performance greater than 95%. Besides, they also testify that the current can track stator current accurately and rapidly when the motor operating on the cases, namely in the normal state, or the fault state or the speed suddenly alteration. A real-time platform of a motor emulator for the presented method has been built to provide a reliable environment and offers more authentic data for motor fault injection, diagnosis, and tolerance research.

**Author Contributions:** conceptualization, R.Q. and C.Y. (Chunhua Yang); methodology, R.Q. and H.T.; software, R.Q.; validation, R.Q. and T.P.; formal analysis, C.Y. (Chunhua Yang); investigation, C.Y. (Chao Yang); resources, C.Y. (Chunhua Yang); data curation, H.T.; writing—original draft preparation, R.Q.; writing—review and editing, C.Y. (Chunhua Yang) and Z.C.; visualization, R.Q.; supervision, Z.C.; project administration, T.P.; funding acquisition, C.Y. (Chao Yang).

**Acknowledgments:** This research was supported by the National Natural Science Foundation of China (No. 61490702, 61773407, 61621062 and 61803390), by the Key Laboratory of Energy Saving Control and Safety Monitoring for Rail Transportation (No. 2017TP1002), by the Program of the Joint Pre-research Foundation of the Chinese Ministry of Education (No. 6141A02022110), by the General Program of the Equipment Pre-research Field Foundation of China (No. 61400030501), by the Hunan Provincial Innovation Foundation for Postgraduate (No. CX20190064), by the Fundamental Research Funds for the Central Universities of Central South University (No. 2018zzts592).

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **References**


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