**2. Power Circuit and Operation Modes of Transformer and Switch Capacitor Based Boost Converter (T & SC-BC)**

A conventional boost converter with SC or Voltage Doubler (VD) is shown in Figure 5a. A circuit connection of capacitor *C*1, *C*<sup>0</sup> and diode *D*2, *D*<sup>0</sup> forms a SC stage or VD stage. A transformer is employed in the SC stage to provide a T & SC stage for high voltage conversion. The power circuit of the proposed T & SC-BC is shown in Figure 5b. The proposed T & SC-BC is designed by using a conventional/traditional boost converter by employing a T & SC stage at the output side. In Figure 5, inductor *L*1, switch *S*, diode *D*<sup>1</sup> and capacitor *C*<sup>01</sup> form a conventional boost converter. The input supply is directly connected to the conventional boost converter. Capacitor *C*1, *C*2, diode *D*0, *D*<sup>2</sup> and transformer form the newly designed T & SC stage. *LP* is the primary winding of the transformer whose one terminal is connected via capacitor *C*<sup>1</sup> at the inductor of conventional boost converter or at the drain terminal of a switch and the other terminal is directly connected at the cathode of diode *D*<sup>1</sup> or at output capacitor *C*<sup>01</sup> of the conventional boost converter. *LS* is the secondary winding of the transformer whose one terminal is directly connected to the anode of diode *D*<sup>2</sup> and another terminal connected to capacitor *C*2.

**Figure 5.** Power circuit of converter (**a**) Conventional boost converter with Switched Capacitor or Voltage Doubler stage and (**b**) Proposed Transformer and Switched Capacitor Based Converter.

The operation of the proposed T & SC-BC is divided into two main modes; one when switch *S* is turned ON and another when switch *S* is turned OFF. These two modes are divided into five submodes to explain the CCM operation of the proposed T & SC-BC in detail. The CCM characteristic waveforms with the five sub-modes are shown in Figure 6.

**Figure 6.** Characteristic waveforms of the proposed T & SC-BC in CCM Mode. (Mode-1: time *ta* to *tb*, Mode-2: time *tb* to *tc*, Mode-3: time *tc* to *td*, Mode-4: time *td* to *te* and Mode-5: time *te* to *tf*).

#### *2.1. Mode-1 (Time ta–tb)*

In Mode-1, switch *S* is turned OFF and inductor *L*<sup>1</sup> is demagnetized. Thus, the energy stored in the inductor *L*<sup>1</sup> is transferred to capacitor *C*<sup>01</sup> through diode *D*1. The energy of capacitor *C*1, *C*2, transformer windings is also transferred through diode *D*<sup>0</sup> to the output capacitor *C*0. The equivalent circuit of the proposed converter for this mode is shown in Figure 7a. In this mode diode *D*1, *D*<sup>0</sup> are operated in forward biased condition whereas diode *D*<sup>2</sup> are operated in reverse biased condition.

$$\begin{array}{c} \text{Loop}-1 \rightarrow V\_{in} - V\_{L1} - V\mathbf{C}\_{01} = \mathbf{0} \\ \text{Loop}-2 \rightarrow V\_{in} - V\_{L1} + V\mathbf{C}\_{1} - V\_{LP} - V\mathbf{C}\_{01} = \mathbf{0} \\ \text{Loop}-3 \rightarrow V\_{LS} + V\mathbf{C}\_{2} - V\_{\text{CO}} + V\mathbf{C}\_{01} = \mathbf{0} \end{array} \tag{2}$$

**Figure 7.** Equivalent circuit of proposed converter when switch *S* is in OFF state (**a**) Mode-1 (Time *ta–tb*); and (**b**) Mode-2 (Time *tb–tc*).

#### *2.2. Mode-2 (Time tb–tc)*

In Mode-2, switch *S* is turned OFF and inductor *L*<sup>1</sup> is still demagnetized but the energy stored in the inductor *L*<sup>1</sup> is not directly transferred to capacitor *C*<sup>01</sup> through diode *D*<sup>1</sup> (diode *D*<sup>1</sup> is acting as an open circuit) but rather transferred through the windings. The energy of capacitor *C*1, *C*2, transformer windings is also transferred through diode *D*<sup>0</sup> to output capacitor *C*0. The equivalent circuit of proposed converter for this mode is shown in Figure 7b. In this mode diode *D*<sup>0</sup> are operated in forward biased condition whereas diode *D*1, *D*<sup>2</sup> are operated in reverse biased condition.

$$\begin{aligned}Loop-1 &\rightarrow V\_{in} - V\_{L1} + VC\_1 = V\_{LP} + VC\_{01} \\Loop-2 &\rightarrow V\_{LS} + VC\_2 = V\_{CO} - VC\_{01} \end{aligned} \quad \text{(3)}$$

#### *2.3. Mode-3 (Time tc–td)*

In Mode-3, switch *S* is turned ON and inductor *L*<sup>1</sup> is magnetized through switch *S*. The energy of capacitor *C*1, *C*2, transformer windings is transferred through diode *D*<sup>0</sup> to output capacitor *C*<sup>0</sup> but the diode *D*<sup>0</sup> current start decreasing and current slope (*di*/*dt*) is limited by the transformer. Hence, the diode reverse current recovery problem is decreased. The equivalent circuit of the proposed converter in this mode is shown in Figure 8a. In this mode diode *D*<sup>0</sup> are operated in forward biased condition whereas diodes *D*1, *D*<sup>2</sup> are reverse biased.

$$\begin{array}{c} Loop-1 \rightarrow V\_{in} - V\_{L1} = 0\\ Loop-2 \rightarrow V\mathcal{C}\_1 - V\_{LP} - V\mathcal{C}\_{01} = 0\\ Loop-2 \rightarrow V\_{LS} + V\mathcal{C}\_2 + V\mathcal{C}\_{01} = V\_{CO} \end{array} \tag{4}$$

**Figure 8.** Equivalent circuit of proposed converter when switch *S* is in ON state (**a**) Mode-3 (Time *tc–td*); (**b**) Mode-4 (Time *td–te*); and (**c**) Mode-5 (Time *te–tf*).

#### *2.4. Mode-4 (Time td–te)*

In Mode-4, switch *S* is turned ON and inductor *L*<sup>1</sup> is continuously magnetized through switch *S*. The energy of the transformer windings *Ls* is transferred to capacitor *C*<sup>2</sup> through diode *D*2. The energy conversion takes place in a resonant approach and the leakage inductance confines the current. The output capacitor *C*<sup>0</sup> provides energy to load. At the end of the mode capacitor *C*<sup>2</sup> is fully charged and diode *D*<sup>2</sup> is blocked. The equivalent circuit of proposed converter for this mode is shown in Figure 8b. In this mode diode *D*<sup>2</sup> are operated in forward biased condition whereas diode *D*1, *D*<sup>0</sup> are operated in reverse biased.

$$\begin{aligned}Loop-1 &\rightarrow V\_{in} - V\_{L1} = 0\\Loop-2 &\rightarrow VC\_1 - V\_{LP} - VC\_{01} = 0\\Loop-3 &\rightarrow VC\_2 = -V\_{LS} \end{aligned} \tag{5}$$

#### *2.5. Mode-5 (Time te–tf)*

In Mode-5, switch *S* is turned ON and inductor *L*<sup>1</sup> is continuously magnetized through switch *S*. The energy of transformer windings *Ls* is not transferred to capacitor *C*<sup>2</sup> due to diode *D*<sup>2</sup> is in reverse biased. The output capacitor *C*<sup>0</sup> provides energy to load. The equivalent circuit of proposed converter for this mode is shown in Figure 8c. In this mode no diodes are operated in forward biased condition whereas diodes *D*0, *D*1, *D*<sup>2</sup> are in reverse biased condition.

$$\begin{array}{l}Loop-1 \rightarrow V\_{in} - V\_{L1} = 0\\Loop-2 \rightarrow V\mathbf{C}\_{1} = V\_{LP} + V\mathbf{C}\_{01} \end{array} \tag{6}$$

The voltage conversion ratio (*Vo*/*Vin*) and Drain to Source voltage of switch (*VDS*) of conventional boost converter with VD (power circuit of converter shown in Figure 5a) is calculated by Equation (7), where *T* is the total time of one switching cycle. The voltage conversion ratio (*Vo*/*Vin*) and (*VDS*/*Vin*) of conventional boost converter with VD is shown graphically in Figure 9a. From graph it is observed that drain to source switch voltage is exactly half of the output voltage (for example at *D* = 0.75, *Vo*/*Vin* = 8 and *VDS*/*Vin* = 4). Hence the drain to source voltage rating of the switch must be above four times of input to operate converter at 75% duty cycle.

$$\begin{array}{c} \frac{V\_o}{V\_{in}} = \frac{2}{1 - D} = \frac{2T}{T - t\_{on}}\\ V\_{DS} = \frac{1}{1 - D} V\_{in} = \frac{V\_o}{2} = \frac{T}{T - t\_{on}} V\_{in} \end{array} \tag{7}$$

**Figure 9.** *Cont*.

**Figure 9.** Graphical plot (**a**) voltage conversion ratio (*Vo*/*Vin*) and Drain to Source switch voltage (*VDS*) of conventional Boost converter with Voltage Doubler (*VD*) versus duty cycle (*D*); (**b**) Drain to Source switch voltage (*VDS*) of proposed T & SC-BC versus duty cycle (*D*); and (**c**) Relation between voltage conversion ratio (*V*o/*Vin*), turns ratio, and duty cycle of proposed T & SC-BC.

The voltage conversion ratio (*Vo*/*Vin*) and Drain to Source voltage of switch (*VDS*) of the proposed T & SC-BC are calculated by Equation (8), where *T* is the total time of one switching cycle. The relation of *VDS*/*Vin* with duty cycle (*D*) is graphically shown in Figure 9b. The relation of voltage conversion ratio (*Vo*/*Vin*), turns ratio (*k*), and duty cycle (*D*) of the proposed T & SC-BC is shown graphically in Figure 9c. From the graphs it is observed that voltage conversion ratio is linearly increased with duty cycle and turns ratio. It is observed that the voltage conversion ratio is 16.67 at *D* = 0.784 when *k* = 2.6. The voltage conversion ratio is 60 at *D* = 0.9 when *k* = 5. It is also investigated that the drain to source switch voltage is exactly equal to the drain to source of a traditional boost converter with VD.

$$\begin{array}{c} \frac{V\_o}{V\_{in}} = \frac{1+k}{1-D} = \frac{(1+k)T}{T-t\_{on}}\\ V\_{DS} = \frac{1}{1-D}V\_{in} = \frac{V\_o}{1+k} = \frac{T}{T-t\_{on}}V\_{in}\\ k = \frac{\text{Turns of secondary winding of transformer } (N\_{LS})}{\text{Turns of primary winding of transformer } (N\_{LP})} \end{array} \tag{8}$$

#### **3. Steady State Analysis of Transformer and Switch Capacitor Based Boost Converter (T & SC-BC)**

In this section a steady state analysis of the proposed T & SC-BC is explained and the conversion losses, efficiency and voltage conversion ratio are calculated. In order to analyze the T & SC-BC, we consider the T & SC is working in steady state and the following assumptions are considered throughout the switching: (i) ripple free DC Source (*Vin*) (ii) diode *D*<sup>1</sup> semiconductor loss is *VD*1; (iii) forward conduction loss of diode *D*<sup>1</sup> is modelled by ON-state resistance *RD*<sup>1</sup> (efficiency of diode is 100% if *VD*<sup>1</sup> and *RD*<sup>1</sup> = 0); (iv) *RS* is ON-state resistance of controlled switch. *RL*<sup>1</sup> is internal resistance of winding of inductor *L*1; (v) *fs* is switching frequency (vi) ripple across capacitor is very small (vii) T & SC cell losses include copper loss, iron loss and diode conduction loss (viii) *R*T&SC is the equivalent resistance of the T & SC cell. The steady state equivalent circuits of the T & SC-BC ON and OFF state are shown in Figure 10a,b respectively.

Consider *iL*1, *is* and *ic*<sup>01</sup> current is flowing through inductor *L*1, switch *S* and capacitor *C*<sup>01</sup> respectively. *IL*1, *Is* and *IC*<sup>01</sup> average current is flowing through inductor *L*1, switch *S* and capacitor *C*<sup>01</sup> respectively.

**Figure 10.** Equivalent circuit of T & SC-BC (**a**) ON state and (**b**) OFF state.

When switch is in ON state, diode *D*<sup>1</sup> is in reversed biased and inductor is charged by input supply *Vin*:

$$\begin{aligned} \label{eq:1} V\_{\text{in}} - v\_{L1} - i\_{\text{in}} \mathcal{R}\_{L1} - i\_{\text{s}} \mathcal{R}\_{\text{s}} &= 0 \; \_{i\_{\text{in}}} = i\_{\text{s}}\\ v\_{L1} = V\_{\text{in}} - i\_{\text{in}} (\mathcal{R}\_{L1} + \mathcal{R}\_{\text{s}}) &\approx V\_{\text{in}} - I\_{\text{in}} (\mathcal{R}\_{L1} + \mathcal{R}\_{\text{s}})\\ i\_{\text{c}}(t) &= -V\_{\text{c01}} / \mathcal{R}\_{T \text{\&SC}} \end{aligned} \tag{9}$$

when switch is in OFF state, diode *D*<sup>1</sup> is conduct and inductor is discharged to charge capacitor *C*01:

$$\begin{aligned} V\_{in} - v\_{L1} - i\_{in}R\_{L1} - i\_{D1}R\_{D1} - V\_{D1} - V\_{c01} &= 0, i\_{in} = i\_{D1} \\ v\_{L1} = V\_{in} - i\_{in}(R\_{L1} + R\_{D1}) - V\_{D1} - V\_{c01} &\approx V\_{in} - I\_{in}(R\_{L1} + R\_{D1}) - V\_{D1} - V\_{c01} \\ i\_{\mathbf{c}}(t) = i\_{in} - V\_{c01}/R\_{T\mathbf{\hat{c}}\mathbf{\hat{SC}}} \end{aligned} \tag{10}$$

Inductor volt second balance method and capacitor charge method is used to calculate the voltage conversion ratio equation:

$$\begin{aligned} V\_{\text{c01}} &= (\frac{1}{1-D})(V\_{in} - (1-D)V\_{D1})(\frac{(1-D)^2 R\_{\text{TdcSC}}}{(1-D)^2 R\_{\text{TdcSC}} + R\_{\text{L1}} + DR\_{\text{s}} + (1-D)R\_{D1}}) \\ &\frac{V\_{\text{c1}}}{V\_{in}} = (\frac{1}{1-D})(1 - \frac{(1-D)V\_{D1}}{V\_{in}})(\frac{1}{1 + \frac{R\_{L1} + DR\_{\text{s}} + (1-D)R\_{D1}}{(1-D)^2 R\_{\text{TdcSC}}}}) \end{aligned} \tag{11}$$

$$V\_o = V\_{c01}(1+k) - \text{losses of transformer} \tag{12}$$

$$\begin{split} V\_{o} &= (1+k)(\frac{1}{1-D})(V\_{in} - (1-D)V\_{D1})(\frac{(1-D)^2R\_{T\&SC}}{(1-D)^2R\_{T\&SC} + R\_{L1} + DR\_{s} + (1-D)R\_{D1}})\\ &\frac{V\_{o}}{V\_{in}} = (1+k)(\frac{1}{1-D})(1 - \frac{(1-D)V\_{D1}}{V\_{in}})(\frac{1}{1 + \frac{R\_{L1} + DR\_{s} + (1-D)R\_{D1}}{(1-D)^2R\_{T\&SC}}}) \end{split} \tag{13}$$

$$\text{Conversion Losses} = (\frac{1+k}{1-D}) \frac{(1-D)V\_{D1}}{V\_{in}} (\frac{1}{1 + \frac{R\_{L1} + DR\_s + (1-D)R\_{D1}}{(1-D)^2 R\_{TdsC}}}) \tag{14}$$

$$\eta, efficiency = \frac{\left(1 - \frac{(1 - D)V\_{D1}}{V\_{in}}\right)}{1 + \frac{R\_{L1} + DR\_{\theta} + (1 - D)R\_{D1}}{(1 - D)^2 R\_{ThSc}}}\right\}\tag{15}$$

If all the components efficiency is 100% (ideal components) then:

$$\text{Losses} = 0, \,\eta = 100\% \, and \frac{V\_o}{V\_{in}} = (1+k)(\frac{1}{1-D})\tag{16}$$

The ideal voltage conversion ratio of T & SC-BC is given in Equation (16).

#### **4. Comparison of Proposed Transformer and Switch Capacitor Based Boost Converter (T & SC-BC) with Newly Addressed DC-DC Converters**

In this section the proposed T & SC-BC is compared with recently addressed DC-DC converters. Recently addressed converters are discussed in Section 1 of the article. In Table 1, the converter comparison is summarized in terms of voltage conversion ratio, number of inductors, number of switches, and number of diodes. First, it is observed that voltage conversion ratio of single switch

*n*-stage CBC is depends on the number of cascaded stages (*n*) and duty cycle. To design single switch *n*-stage CBC [30], *n*-number of inductors, *n*-number of capacitors and 2*n* − 1 number of diodes along with single switch is required. Second, it is observed that voltage conversion ratio of single switch boost converter with voltage multiplier is depends on the odd and even number of voltage multiplier stage and duty cycle. To design single switch boost converter with voltage multiplier, 2 inductors, 2*n* + 1 number of capacitors and 2*n* number of diodes along with single switch is required. Third, it is observed that voltage conversion ratio of coupled inductor based step-up converter is depends on the coupling coefficient of coupled inductor (*k* = *n*2/*n*1) and duty cycle. To design coupled inductor based step-up converter, 3 inductors (1 without coupling and 2 with coupled), 3 capacitors and 3 diodes along with single switch is required. Fourth, it is observed that voltage conversion ratio of Quadratic Boost Converter (QBC) with coupled inductor is depends on the coupling coefficient of coupled inductor (*k=n*2*/n*1) and duty cycle. To design Quadratic Boost Converter (QBC) with coupled inductor, 3 inductors (1 without coupling and 2 with coupled), 3 capacitors and 4 diodes along with single switch is required. Fifth, it is observed that to design conventional boost converter with VD 1 inductor, 3 capacitors, 1 switch and 3 diodes are required. Sixth, it is observed that voltage conversion ratio of proposed converter (T & SC-BC) is depends on the transformer turns ratio (*k*) and duty cycle. To design proposed converter (T & SC-BC), 1 inductor, 1 transformer, 4 capacitors and 3 diodes along with single switch is required.



*n* = Number of stages and *k* = Turns ratio.

Thus from Table 1 it is seen that the proposed converter required less components and has a higher voltage conversion ratio compared to the other discussed converters. In Table 2 the cost of the power circuit of the proposed T & SC-BC and recently addressed converters (discussed in Section 1) is tabulated and it is observed that the proposed converter requires less cost.

**Table 2.** Comparison of the proposed T & SC-BC with recent DC-DC converters in terms of cost.


*C*<sup>s</sup> = Cost of single switch, *C*<sup>L</sup> = Cost of single inductor, *C*<sup>C</sup> = Cost of single capacitor, *C*<sup>D</sup> = Cost of single diode, *C*<sup>T</sup> = Cost of Transformer, *C*CL = Cost of two inductor with couple effect.

The plots of the voltage conversion ratio of a single switch CBC and single switch boost converter with voltage multiplier versus duty cycle considering the number of stages, *n* = 1 to 5 is depicted in Figure 11a,b respectively. It is observed that the voltage conversion ratio increases with the increase in the number of cascaded stages, but the quasi-linear region of the converter decreases. The plot of the voltage conversion ratio of the coupled inductor based step-up converter and QBC with coupled inductor versus duty cycle considering coupling coefficients, *k* = 1 to 5 is depicted in Figure 11c,d respectively. It is observed that the voltage conversion ratio is greatly increased with the increase in coupling coefficient (*k*), but the quasi-linear region of the converter decreases.

**Figure 11.** Plot of Voltage conversion ration versus Duty cycle (**a**) single switch *n*-stage CBC; (**b**) Single switch boost converter with voltage multiplier; (**c**) Coupled inductor based step-up converter; (**d**) Quadratic Boost Converter (QBC) with coupled inductor; (**e**) Conventional boost converter with Switched Capacitor (SC) or Voltage Doubler (VD) stage; and (**f**) Proposed Transformer and Switched Capacitor Based Converter (T & SC-BC).

The voltage conversion ratio and capacitor voltage plot of a conventional boost converter with or without SC or VD stage is depicted in Figure 11e. It is observed that the conversion ratio is double with the voltage doubler compared to without the voltage doubler but the quasi-linear region is slightly reduced. The voltage conversion ratio plot of the proposed T & SC-BC versus duty cycle considering transformer ratio, *k* = 1 to 5 is depicted in Figure 11f. It is observed that the voltage conversion ratio is greatly increased with the increase in number of the transformer ratio (*k*) but the quasi-linear region of the converter is decreased.

In Figure 12a, the plot of *VCn/Vin* (ratio of capacitor voltage to input voltage) versus duty cycle for a single switch *n*-stage CBC is shown considering stages *n* = 1 to 5. It is observed that the capacitor rating increases with the increase in stages and duty cycle. Thus, a single switch *n*-stage CBC requires more rated capacitors compared to a single switch *n* − 1 stage CBC. In Figure 12b the plot of *VCn*1*/Vin* and *VCn*2*/Vin* (ratio of capacitor voltage to input voltage) versus duty cycle for a single switch boost converter with voltage multiplier is shown considering stage *n* = 1 to 5. It is observed that the rating of the capacitor increases with the increase in voltage multiplier stages and duty cycle. In Figure 12c the plot of *VC*2*/Vin* (ratio of capacitor voltage to input voltage) versus duty cycle for a coupled inductor-based step-up converter is shown with coupling coefficients *k* = 1 to 5. It is observed that the capacitor voltage is independent of the coupling coefficient but depends upon the duty cycle.

In Figure 12d the plot of *VC*02*/VC*<sup>01</sup> (ratio of capacitor *C*<sup>02</sup> voltage to capacitor *C*<sup>01</sup> voltage) versus duty cycle for the QBC with coupled inductor is shown with coupled coefficients *k* = 1 to 5. It is observed that the capacitor voltage depends on the coupling coefficient and also on the duty cycle. Thus, the rating of the capacitor is increased with an increase in coupling coefficient (*k*) and duty cycle (*D*). In Figure 12e the plot of *VC*01*/Vin* (ratio of capacitor *C*<sup>01</sup> voltage to input voltage (*Vin*)) versus duty cycle for the proposed T & SC-BC with transformer turn ratio *k* = 1 to 5. It is observed that the capacitor voltage is independent of the transformer ratio but depends upon the duty cycle. T & SC-BC is compared with recently addressed DC-DC converters (discussed in Section 1) in terms of the voltage conversion ratio (*Vo*/*Vin*) and the comparison plot is shown in Figure 12f. It is observed that the proposed T & SC-BC provides higher voltage conversion ratios compared to other DC-DC converters. T & SC-BC is compared with recently addressed DC-DC converters in term of *VDS*/*Vin* (ratio of Drain to source voltage and input voltage) and the comparison plot is shown in Figure 12g and also tabulated in Table 3. It is observed that the proposed converter has a smaller *VDS*/*Vin* ratio (ratio of Drain to Source voltage with respect input voltage), hence low rating components are suitable to design the T & SC-BC compared to recently proposed DC-DC converters (discussed in Section 1). Also in Table 3, T & SC-BC is compared in terms of efficiency; power range and output ripple with recent DC-DC converters.

**Figure 12.** *Cont*.

**Figure 12.** (**a**) Plot of (*VCn/Vin*) versus duty cycle for single switch *n*-stage CBC; (**b**) Plot of *VCn*1*/Vin* and *VCn*2*/Vin* versus duty cycle for single switch boost converter with voltage multiplier; (**c**) Plot of *VC*2/*Vin* versus duty cycle for coupled inductor based step-up converter; (**d**) Plot of *VC*02*/VC*<sup>01</sup> versus duty cycle for QBC with coupled inductor; (**e**) Plot of *VC*01*/Vin* versus duty cycle for proposed T & SC-BC; (**f**) Comparison of T & SC-BC and recently addressed DC-DC converter (discussed in Section 1) in terms of voltage conversion ratio (*Vo*/*Vin*); and (**g**) Comparison of T & SC-BC and recently addressed DC-DC converter (discussed in Section 1) in term of *VDS*/*Vin* (ratio of Drain to source voltage and input voltage) with considering *n* = 3 and *k* = 3. (*A*: single switch *n*-stage CBC, *B*: single switch boost converter with voltage multiplier, *C*: coupled inductor based step-up converter, *D*: QBC with coupled inductor, *E*: Traditional Boost Converter, *F*: Traditional Boost Converter with Voltage Doubler (VD), *G*: Proposed T & SC-BC).


**Table 3.** Comparison of the proposed T & SC-BC with recently addressed DC-DC converters in terms of switch drain to source voltage.

#### **5. Simulation and Experimental Results**

To verify the proposed converter functionality, the proposed converter is simulated in Matrix Laboratory (MATLAB) and the parameters are tabulated in Table 4. The components are chosen and designed according to Equations (17)–(24).

$$Duty\ cycle, D = \frac{V\_O - V\_{in}(1+k)}{V\_O} = \frac{250 - 15(1+2.6)}{250} = 0.784\ or\ 78.4\% \tag{17}$$

$$\text{Switch Voltage}, V\_{DS} = \frac{V\_{\text{in}}}{1 - \frac{T\_{ON}}{T}} = \frac{V\_{\text{in}}}{1 - fT\_{ON}} = \frac{V\_{\text{in}}}{1 - D} = \frac{15}{1 - 0.784} = 69.44\, V \approx 70\, V \tag{18}$$

$$\begin{aligned} \label{eq:1} \quad Diode \ D\_0 \; Voltage, \; V\_{D0} &= \frac{n\_{IS}}{n\_{LP}} \times \frac{V\_{in}}{1 - \frac{T\_{ON}}{I}}\\ = \frac{kV\_{in}}{1 - fT\_{ON}} = \frac{kV\_{in}}{1 - D} = \frac{2.6 \times 15}{1 - 0.784} = 180.5V \approx 181V \end{aligned} \tag{19}$$

$$\text{Diode } D\_1 \text{ Voltage, } V\_{D1} = \frac{V\_{in}}{1 - \frac{T\_{ON}}{T}} = \frac{V\_{in}}{1 - fT\_{ON}} = \frac{V\_{in}}{1 - D} = \frac{15}{1 - 0.784} = 69.44V \approx 70V \tag{20}$$

$$\begin{aligned} \label{eq:1} \text{Diode } D\_2 \text{ Voltage, } V\_{D2} &= \frac{\eta\_{LS}}{\eta\_{LP}} \times \frac{V\_{\text{in}}}{1 - \frac{T\_{\text{ON}}}{T}}\\ = \frac{kV\_{\text{in}}}{1 - fT\_{\text{ON}}} = \frac{kV\_{\text{in}}}{1 - D} = \frac{2.6 \times 15}{1 - 0.784} = 180.5 V \approx 181 V \end{aligned} \tag{21}$$

$$\text{Inductor}, L\_1 = \frac{V\_{in} \times \frac{T\_{\text{ON}}}{T}}{\Delta i L\_1 \times f} = \frac{V\_{in} \times DT}{\Delta i L\_1} = \frac{15 \times 0.784}{5 \times 20000} = 117.6 \mu H \tag{22}$$

$$\text{Transformer primarily}, \text{Vinding}, L\_P = \frac{V\_{\text{in}} \times \frac{T\_{\text{ON}}}{T}}{\Delta i L\_1 \times \frac{1}{T}} = \frac{V\_{\text{in}} \times DT}{\Delta i L\_1} = \frac{15 \times 0.784}{5 \times 20000} = 117.6 \mu H \tag{23}$$

$$\text{Transformer secondary winding}, L\_S = k^2 \times \frac{V\_{\text{in}} \times \frac{T\_{\text{ON}}}{T}}{\Delta i L\_1 \times \frac{1}{T}} = k^2 \times \frac{V\_{\text{in}} \times DT}{\Delta i L\_1} = 794.97 \mu H \tag{24}$$

The capacitors value of the proposed converter is calculated with the help of parameters voltage ripple through capacitors, switching frequency (*fs*), current through capacitor and turn ratio of transformer (*k*). In Figure 13a the output voltage and input voltage waveform is depicted. It is observed that a constant 250 V is achieved with an input voltage of 15 V, hence the conversion ratio is 16.67.

The transient period analysis is investigated and it is observed that the time constant (*τ*) of output and input voltage waveforms is 0.006 s. The output and input voltage at 0.006 s is 157.5 V (63% of 250 V) and 9.45 V (63% of 15 V), respectively. It is observed that a constant 250 V is achieved at 0.035 s (approximately). In Figure 13b the output voltage and current waveform are depicted. It is observed that the time constant (*τ*) of output voltage and current waveform is 0.006 s.


**Table 4.** Simulation parameters of the proposed T & SC-BC.

The output voltage and current at 0.006 s is 157.5 V and 0.126 A (63% of 0.2 A), respectively. It is observed that a constant 0.2 A is achieved at 0.035 s (approximately). In Figure 13c the output power waveform is depicted and it is observed that the output power at 0.006 s is 19.84 W. It is observed that a constant 50 W power is achieved at 0.035 s (approximately). In Figure 13d, the inductor (*L*1) current waveform is depicted with gate pulse of the switch and slope of the waveforms is calculated by Equation (17). It is observed that the inductor (*L*1) current slope is positive when switch *S* is in ON state and slope is negative when switch *S* is in OFF state. In Figure 13e, the switch drain to source voltage (*VDS*) waveform is shown and nearly 70 V appears across the switch when it is in OFF state. A fluctuation is observed in the switch voltage due to the voltage across diode *D*<sup>1</sup> in the sub-modes. The voltage across capacitor *C*1, *C*<sup>2</sup> and *C*<sup>01</sup> is depicted in Figure 13f and it is observed that the voltage across capacitor *C*<sup>01</sup> is 70 V (approximately). The voltage across diode *D*0, *D*<sup>1</sup> and *D*<sup>2</sup> is depicted in Figure 13g and it is observed that diode *D*<sup>0</sup> is in forward biased when switch *S* is in OFF state. It is also that the voltage across *D*<sup>1</sup> is less than the voltage across diode *D*<sup>0</sup> and *D*2. The proposed T & SC boost converter is implemented and the details of parameters or components are provided in Table 5. The experimental setup of the proposed converter is shown in Figure 14. The output voltage and input voltage waveforms are shown in Figure 15a,b. It is observed that 249.6 V is achieved from 15.1 V input supply.

$$\begin{array}{c} \frac{di\_{L1}}{dt} = \frac{VL\_{\text{ION}}}{L\_1} = Positive\,Slope\\ \frac{di\_{L1}}{dt} = \frac{VL\_{\text{IOFF}}}{L\_1} = Negative\,Slope \end{array} \tag{25}$$

**Figure 13.** *Cont*.

**Figure 13.** Simulation result of the proposed T & SC-BC (**a**) Output and input voltage waveform; (**b**) Output voltage and current waveform; (**c**) Output power waveform; (**d**) Inductor *L*<sup>1</sup> current waveform and gate pulse (*VGS*); (**e**) Drain to Source switch voltage (*VDS*) waveform; (**f**) Voltage waveform across capacitor *C*1, *C*<sup>2</sup> and *C*01*;* and (**g**) Voltage waveform across diode *D*0, *D*<sup>1</sup> and *D*2.


**Table 5.** Parameters and component details of the prototype of the proposed T & SC-BC.

**Figure 14.** Experimental setup of the proposed T & SC Boost Converter.

**Figure 15.** Experimental result (**a**) Output voltage waveform and (**b**) Input voltage waveform.

#### **6. Future Extension and Combination of the Proposed T & SC-BC Topology with a Voltage Multiplier**

To obtain a high voltage, the proposed T & SC-BC also provides a suitable solution by combining the features of a voltage multiplier. The power circuit of the proposed T & SC-BC with voltage multiplier is depicted in Figure 16. The voltage conversion ratio is analyzed and provided in Equation (26). The voltage across a switch is not affected by the voltage multiplier. The voltage multiplier level can be increased without disturbing the main power circuit of the T & SC to raise the voltage conversion ratio more.

$$\begin{array}{c} V\_{\text{Uni}} = \frac{1+k}{1-D} = \frac{(1+k)T}{1-t\_{\text{in}}}, \frac{V\_{\text{CO}}}{V\_{\text{in}}} = 2 \times \frac{1+k}{1-D} = 2 \times \frac{(1+k)T}{1-t\_{\text{in}}}\\ \frac{V\_{\text{CO}}}{V\_{\text{in}}} = 3 \times \frac{1+k}{1-D} = 3 \times \frac{(1+k)T}{1-t\_{\text{in}}},\\ \frac{V\_{\text{CO2}-1}}{V\_{\text{in}}} = \frac{V\_{\text{P}}}{V\_{\text{in}}} = N(\frac{1+k}{1-D}) = N\frac{(1+k)T}{T-t\_{\text{in}}}\\ V\_{\text{DS}} = \frac{1}{1-D}V\_{\text{in}} = \frac{V\_{\text{C}\perp}}{1+k} = \frac{V\_{\text{O}}}{N(1+k)} = \frac{T}{T-t\_{\text{in}}}V\_{\text{int}}\\ k = \frac{\text{Turns of secondary winding of transformer } (\text{N}\_{\text{L}})}{\text{Turns of primary winding of transformer } (\text{N}\_{\text{L}})}\\ N = \text{number of voltage multiplier stage} \end{array} \tag{26}$$

**Figure 16.** Power circuit of T & SC-BC with voltage multiplier (VM).

#### **7. Conclusions**

A new Transformer and Switch Capacitor-Based Boost Converter (T & SC-BC) is articulated for high-voltage/low-current renewable energy source applications. Conventional boost converter, transformer and switched capacitors functions are combined to design the proposed T & SC-BC for high voltage conversion ratio. A (1 + *k*)/(1 − *D*) voltage conversion ratio (*Vo*/*Vin*) is achieved from the proposed converter where, *k* is the turns ratio of the transformer and *D* is the duty cycle. Conspicuous features of the proposed T & SC-BC are: (i) high voltage conversion ratio (*Vo*/*Vin*); (ii) continuous input current (*Iin*); (iii) single switch topology; (iv) single input source; (v) low Drain to Source voltage (*VDS*) rating of the switch; and (vi) single inductor and single untapped transformer. The proposed T & SC-BC topology has low drain to source switch voltage, low stress on output diodes and requires less components to achieve high voltage compared to recently addressed DC-DC converters. Moreover the cost of the proposed T & SC-BC topology is less and it is also suitable for combination with a voltage multiplier to achieve more voltage at the output. The proposed converter is designed for 50/3 voltage conversion ratio at 78.4% duty cycle and the turns ratio is 2.6. Simulation and experimental results are provided which validate the functionality, design and concept of the proposed approach.

**Author Contributions:** All authors contributed equally for the final decimation of the research article in its current form.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **References**


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