**1. Introduction**

AC-DC power converters are typically used in Plug-in Electric Vehicles (PEVs) that require high reliability, reduced total harmonic distortion (THD) of the drawn currents and output regulation to charge batteries or supercapacitors with high performance and satisfy stringent power quality and density standards [1–3]. Electric Vehicle (EV) systems need to consider power quality regulations that typically include the harmonic emission during the charging and transient states, which have been analyzed with different standards and methods as the works described in [4,5]. Moreover, high-frequency switching techniques can increase the power quality, density and energy transfer reliability of AC-DC power converters without altering the basic topology configuration, keeping output controllability and reliability [6]; however, high AC line currents, drawn by the converter to rapidly charge the storage devices distributed along the traction DC link of the EV, may endanger the EV charger operator or impair the charger connector and, therefore, the supply drawn currents are limited to gain reliability causing slow energy transfer [7].

An available method of ensuring operator reliability with high currents, obtaining a simple way of connecting the charge uses wireless power transfer [8–10]. This is a twofold method, since the technique commonly uses a transformer to effectively isolate the power transfer from the user, and provides possible circuit splitting since the transformer is operated as an intermediary between two modules. For example, the converter presented in [11] uses a Medium-Frequency-Transformer for wind power conversion applications; however, the system uses an indirect matrix converter with three output phases that increases the circuit complexity and the magnetic components. EVs typically us two modules, where the first module is located on a charging station and the other on board the vehicle, improving the power density of the converter and increasing the EV distance range since the on-board

section may be free of heavy devices [12]. The use of a single-phase high-frequency transformer was proposed in [13] as a wireless device to convert power from the utility to a DC-link capacitor bank; however, the circuit incurs in the use of several power stages required to generate high-frequency power signals from the utility supply to the transformer, limiting the efficiency of the converter and causing high complexity.

This paper presents the principle of operation of a modular AC-DC converter with Zero-Voltage Transition (ZVT), whose aim is to produce high-quality current waveforms, output regulation and soft switching of the semiconductor devices through the use of an off-board current-feed matrix converter and an on-board high-frequency H bridge, in such a way that the size of the converter located inside the vehicle becomes reduced in contrast with other topologies, [14–16]. The method potentially exhibits the following advantages: first, the current-feed matrix converter is used for straightforward generation of low-ripple, AC line currents without the need of several power stages; second a high-frequency transformer is used to isolate the matrix converter from the H bridge and regulate the output voltage; and third, the circuit uses a ZVT technique together with Space Vector Pulse Width Modulation (SVPWM) to achieve soft commutation of the power semiconductors and generate high-quality sinusoidal currents. Simulation results obtained in Saber with a 5 kW model are provided in the article, demonstrating the correspondence with the developed theoretical background and idealized waveforms to verify its feasibility.

#### **2. ZVT AC-DC Converter**

#### *2.1. Circuit Description*

The topology arises from the idea of splitting a conventional active rectifier in two modules as is shown in Figure 1. The off-board module of the converter is a three-phase current fed matrix converter that generates a single phase high-frequency current. This converter is intended to be located outside the electric vehicle in the charging station. The matrix converter has six bi-directional switches (*Q*1*–Q*6) and is fed by the line current of inductors *L*. The primary side of a high-frequency transformer is connected at the output of the matrix converter to allow wireless power transfer between the matrix converter and the second module.

**Figure 1.** (**a**) Conventional active rectifier; (**b**) Circuit diagram of the proposed modular AC-DC converter.

The on-board module uses the secondary side of the high-frequency transformer and a series inductor, *Ls*, partially formed by the transformer leakage inductance and an additional inductor, together with an H bridge to regulate the output voltage, *Vo*. The H bridge inverts the output voltage with a phase-shifted Pulse Width Modulation (PWM) technique, such that a quasi-square with a ±*nVo* amplitude is generated on the primary side of the transformer, *vprim.* In this way, the conventional SVPWM technique is modified to obtain three-level PWM voltage waveforms which are used to control the line currents together with the supply voltage.

#### *2.2. Principle of Operation*

The control strategy used in the AC-DC converter is based in a SVPWM technique allowing DC output voltage regulation using an index modulation, being easy to implement with a fast response compared to other methods of PWM [17–19]. The conventional SVPWM technique is modified with a ZVT strategy, in such a way that the semiconductor devices are soft switched. The fundamental of operation of the SVPWM technique with ZVT is described below assuming negligible output voltage ripple and lossless components. Figure 2a–c show the active rectifier switching states, *Sa*, *Sb* and *Sc*, of a conventional SVPWM scheme for one switching period in the first sector, which ranges from 0◦ to 60◦, where 1 and 0 indicate on and off states respectively. These switching states are splitted to define the switching states of the H bridge and those of the matrix converter.

**Figure 2.** Derivation of the transistor switching states of the modular active rectifier of Figure 1b together with their voltage converter waveforms: (**a**) switching state *Sa*; (**b**) switching state *Sb*; (**c**) switching state *Sc*; (**d**) switching state *Sx*; (**e**) switching state *Sy*; (**f**) voltage *vxG*; (**g**) voltage *vyG*; (**h**) voltage *vsec*; (**i**) switching state *Sam*; (**j**) switching state *Sbm*; (**k**) switching state *Scm*; (**l**) voltage *vacG*; (**m**) voltage *vbcG*; (**n**) voltage *vccG*.

The H-bridge switching states *Sx* and *Sy* are presented in Figure 2d,e, with a duty cycle of 50% and a short-circuit period, *TSV0H*, that generates the voltages *vxG* (Figure 2f), and *vyG* (Figure 2g) referred to the *G* node of the DC rail. The H-bridge voltage (Figure 2h), *vxy* = *vxG* − *vyG*, clamps the secondary side of the transformer to zero Volts when the H bridge is in the short-circuit state. During the first semi cycle, Δ*T*/2, the voltage in the secondary side of the transformer, *vsec*, is clamped to *Vo* and the switching states of the matrix converter legs, *Sam, Sbm* and *Scm* (Figure 2i–k) are equal to *Sa*, *Sb* and *Sc* respectively. When *Sa*, *Sb* and *Sc* are equalized in the three inverters legs, a short-circuit occurs; which is caused in the modular version through the H bridge during *TSV0H*, such that the matrix converter retains the last switching state combination. During the second semi cycle, a mirrored state sequence occurs, since the output voltage in the H bridge becomes *v*sec = −*Vo* and the switching states in the matrix converter are the complement of *Sa*, *Sb* and *Sc*. The H-bridge short-circuit is caused again and the matrix converter retains the last switching states when *Sa*, *Sb* and *Sc* are equal. In this way, the neutral combination is again caused by the H bridge instead of the matrix converter.

The matrix converter voltages referred to the DC rail node *G*, *vacG*, *vbcG* and *vccG* are shown in Figure 2l–n, which are the product of the primary voltage *vprim* (*vprim* = *nvsec*) and the individual switching state of each leg. When the short-circuit is caused by the H bridge, the matrix converter voltages are clamped to zero Volts.

#### *2.3. SVPWM Technique*

Six active voltage space vectors, *sv*<sup>1</sup> to *sv*6, are obtained at the central nodes of the matrix converter shown in Figure 1b by using six switching states combinations, *SQ***<sup>1</sup>** to *SQ***6**, which are listed in Table 1, with respect to the states of *Sam*, *Sbm* and *Scm*. These space vectors are plotted in the bi-dimensional *α*-*β* plane of Figure 3 using the Clarke transform [20]. *sv*<sup>1</sup> to *sv*<sup>6</sup> are generated using the switching states of the matrix converter together with its output voltage ±*nVo.* A neutral space vector, *sv*0, is produced by using any state combination of the matrix converter together with the H-bridge short-circuit. *sv*<sup>0</sup> is located at the origin of the *α*-*β* plane.


**Table 1.** Switching states vectors of matrix converter.

An arbitrary averaged voltage vector, *vcav* = *Vcpk*Ŀ*θc*, can be generated at the converter input using a Volts-seconds balance to control the input line currents together with the supply voltages. Since the matrix converter output voltage reverses its biasing during half of the switching cycle, the Volts-seconds balance utilises the operating sector and its opposite sector of the *α*-*β* plane. For example, during the first semi cycle of a switching period in sector *S*1, *vcav* is determined by:

$$
\omega\_{\rm env} = a\_1 s v\_1 + a\_2 s v\_2 + a\_0 s v\_0 \tag{1}
$$

where *α*<sup>1</sup> = *Tsv*<sup>1</sup> <sup>Δ</sup>*<sup>T</sup>* , *α*<sup>2</sup> = *Tsv*<sup>2</sup> <sup>Δ</sup>*<sup>T</sup>* and *α*<sup>0</sup> = *Tsv*<sup>0</sup>*<sup>H</sup>* <sup>Δ</sup>*<sup>T</sup>*

2 2 2 Whereas, during the second semi cycle, *vcav* is defined by:

.

$$
\omega\_{\rm env} = a\_4 s v\_4 + a\_5 s v\_5 + a\_0 s v\_0 \tag{2}
$$

where *α*<sup>4</sup> = *Tsv*<sup>4</sup> <sup>Δ</sup>*<sup>T</sup>* 2 , *α*<sup>5</sup> = *Tsv*<sup>5</sup> <sup>Δ</sup>*<sup>T</sup>* 2 , since *vprim* = −*nVo*.

The same procedure applies for the rest of the sectors. Table 2 summarizes the switching states according to the sector location of *θ<sup>c</sup>* together with the biasing of *vprim*.

**Figure 3.** Space Vector Bi-dimensional plane.


**Table 2.** Switching states vectors.

*vxy* and *vsec* are shown in Figure 4a,b respectively for straight comparison to describe the generation of the secondary transformer current, *iLS*, shown in Figure 4c. During the first semicycle, *iLS* is assumed positive together with *vsec* clamped to *Vo*. The slope of *iLs* is negative since the converter voltage is greater than the AC supply voltage even when the matrix converter switches from *SQ*<sup>1</sup> to *SQ*2; whilst during the H-bridge short circuit the matrix switching state *SQ*<sup>2</sup> is retained, such that the slope of *iLS* is inverted. A current reversal occurs in *iLs* since *vxy* is clamped to −*Vo* and *vsec* to zero during an overlap period *Tovl* that is calculated with Equation (3):

$$T\_{ovL} = \frac{nI\_{primpk}L\_s}{V\_o} \tag{3}$$

where *Iprimpk* is the peak magnitude of the current in the primary side of the transformer, *iprim*.

In this way, the ZVT is performed in the semiconductor devices during the current reversal to obtain soft commutation. The overlap period finishes when *iLS* reaches the same magnitude with an opposite sign, such that the first semi cycle becomes to an end. The second semi cycle is a mirror of the first since the complementary switching states of *SQ*<sup>1</sup> and *SQ*2, *SQ*<sup>4</sup> and *SQ*<sup>5</sup> respectively, are used to operate the matrix converter and because the H bridge has clamped *vxy* to −*Vo*.

*iLs* is equal to *niprim*, where *iprim* depends on the switching of the line currents. Table 3 lists the equivalence of *iprim* respective to the line currents and the matrix switching states.

**Figure 4.** Ideal wavfeorms: (**a**) Voltage *vxy*; (**b**) voltage *vsec*; and (**c**) current through the transformer, *iLS*.


**Table 3.** *iLS* magnitude for each switching state.

#### **3. ZVT AC-DC Converter**

A block diagram for the AC-DC operation of the circuit of Figure 1b is shown in Figure 5. In this figure *θ<sup>c</sup>* and the index modulation, *Ma*, are the inputs required for the SVPWM scheme. Since the converter of Figure 1b is divided into two parts, a sequenced operation is used and described below:


**Figure 5.** Block diagram for AC-DC operation of the modular converter of Figure 1b.

#### *3.1. H-Bridge and Matrix Converter Switching States*

The derivation of the H-bridge and matrix converter control switching states is described using the block diagram of Figure 6, which are obtained from the switching states of the conventional active rectifier, as described in Section 2.2. Firstly, *Sa*, *Sb* and *Sc* are generated using *θ<sup>c</sup>* and *Ma*. The conventional SVPWM active periods, *Ta*, *Tb* and *Tc*, are compared with a high-frequency carrier triangular waveform to produce three digital signals, *PWMa*, *PWMb* and *PWMc*, which are shown in Figure 7. These signals are multiplexed with respect to the sector location to derive the switching states *Sa*, *Sb* and *Sc,* (Figure 7e–g). The H-bridge switching states, *Qa*, *Qc*, *Qb* an *Qd,* are obtained with a sequential circuit using *Sa*, *Sb* and *Sc* as inputs.

**Figure 6.** Block diagram to generate the switching states for the matrix converter and the H bridge.

Other set of multiplexers are utilized to derive three digital signals, *Sa'*, *Sb'* and *Sc'*, that produce the active switching states by using off and on states instead of the short and long pulse trains of *PWMa* and *PWMc* respectively, as is shown in Figure 7h–j. *Sa'*, *Sb'* and *Sc'* are also multiplexed with respect to the sector location and are processed to derive the switching state of each matrix converter leg. The digital circuit to generate the matrix converter control signals for the first leg, *Q*1*a*, *Q*1*b*, *Q*4*<sup>a</sup>* and *Q*4*b*, is shown at the right-hand of Figure 6. This circuit commutates the switching states to the opposite side of the *α*-*β* plane, sending the complement states when *vsec* is clamped to negative voltage. The same circuit is used to generate the control signals for the second and third matrix converter legs.

**Figure 7.** Generation of PWM signals, and conventional active rectifier switching states. (**a**) High-frequncy triangular carrier signal; (**b**) digital signal *PWMa;* (**c**) digital signal *PWMb*; (**d**) digital signal *PWMc*; (**e**) switching state *Sa*; (**f**) switching state *Sb*; (**g**) switching state *Sc*; (**h**) digital signal *S'a*; (**i**) digital signal *S'b*; (**j**) digital signal *S'c*.

#### *3.2. Neutral-to-Active Switching Transition in the Matrix Converter*

Since each bi-directional switch in the matrix converter is built with two semiconductor devices with a common collector configuration that allows the current flow in both directions, an overlap in all the matrix converter legs is required to commutate the flowing of current in one direction to the opposite direction during the negative biasing of *vsec*. Figure 8 shows the switching sequence of *Q*1*a, Q*1*<sup>b</sup>* and *Q*4*a, Q*<sup>4</sup>*<sup>b</sup>* to turn off *Q*<sup>1</sup> and turn on *Q*4*.*

**Figure 8.** Switching sequence in the on-to-off transition from neutral-to-active switching state. (**a**) initial current flow; (**b**) overlap time; (**c**) current flow in the opposite direction.

In Figure 8a, *Q*1*<sup>a</sup>* and *Q*1*<sup>b</sup>* are conducting the current in the blue or red arrow direction, *iQ*1. When *Q*<sup>1</sup> and *Q*<sup>4</sup> are commutated to the on and off states respectively, *Q*1*<sup>b</sup>* is turned off and *Q*4*<sup>b</sup>* is turned on when the current is flowing in the blue arrow direction; and *Q*1*<sup>a</sup>* is turned off and *Q*4*<sup>a</sup>* is turned on when the current is flowing in the red arrow direction (Figure 8b). Finally, when the current flow stops due to the biasing inversion of *vsec* through the corresponding arrow, the transistors of *Q*<sup>4</sup> are turned on, (Figure 8c), and, therefore, the current in *Q*4, iQ4, flows in the opposite direction through the matrix converter leg.

The logic circuit that generates the overlap in the first matrix converter leg is included in the right-hand of Figure 6. This diagram shows the zero crossing detector signals *Cz*<sup>1</sup> and *Cz*<sup>2</sup> that are used to indicate the end of the overlap.
