*3.2. PLLs*

The PLL consists of a phase comparator and a PI controller. The phase comparator determines the phase error ε which is provided in input to the PI. A reference frequency ω*IC* and the output of the PI are summed in order to evaluate the grid voltage frequency ωˆ. The feed-forward action allows to improve the PLL dynamic performance. Later the grid voltage angle θˆ is calculated by the information of the grid voltage frequency. The phase comparator operation can be based on a reference signal provided by the ZCD of the input grid voltage, by the arctangent function of by the Park transform.

In case of ZCD PLL, the ZCD discussed in the previous subsection is employed to extract the phase reference for the phase comparator [42,68]. As described before, also this synchronization system is not proper to track the grid voltage in case of abrupt variations. However, the ZCD PLL provides better performance than the ZCD technique since the estimated angle θˆ is controlled in closed loop.

Both the arctangent function-based PLLs and the Park transform-based PLLs require a voltage orthogonal system. In case of the arctangent function-based PLL [42,64], the phase reference for the phase comparator is extracted calculating the arctangent by *e*α and *e*β information. The disadvantage is that the arctangent function is not easy to implement.

In Figure 4 there is shown the structure of a PLL-based on the Park transform which represents the most adopted solution.

**Figure 4.** Phase-locked loop (PLL) structure based on the Park transform.

A coordinate transformation from αβ to dq is usually adopted to process DC signals instead of AC signals. The grid voltage phase angle is extracted synchronizing the grid voltage vector with the dq rotating reference frame. Forcing the q-axis voltage reference to zero, the lock with the grid voltage is ensured [69]. The error signal is processed by a PI. The output of the PI controller is the grid frequency. The estimated frequency is integrated; hence the grid voltage phase angle is measured, and the result is provided in input to the αβ-dq transformation block. As shown in Figure 4, the phase detection is based on the Park transform [70] while the PI controller acts as a filter which determines the dynamics of the phase lock. For this reason, the PI controller parameters are chosen considering the tradeoff between filtering performance and fast dynamics [46].

All the PLLs described up to now need a LPF as in case of the ZCD synchronization method. It occurs to extract the fundamental frequency ˆ *f* of the original signal *e* which is commonly affected by harmonic disturbances. Neglecting the LPF, the detailed structure of the PLL based on the Park transform is depicted in Figure 5 for a better understanding of how the phase comparator is obtained through the use of the Park transform.

**Figure 5.** Detailed PLL structure based on the Park transform.

In case of single-phase systems, the orthogonal voltage system has to be artificially generated [21,71] and it represents the main challenge for the grid voltage monitoring. The orthogonal signal generator (OSG) is in charge of the orthogonal voltage system realization. One of the most advanced technique adopts the second order generalized integrator (SOGI) [72,73]. The OSG based on the SOGI filter allows also to extract the fundamental component of the grid voltage, for this reason the LPF used to extract ˆ *f* can be avoided in case of the SOGI PLL. The OSG based on the SOGI filter is shown in Figure 6.

The grid voltage *e* is transformed in two sinusoidal signals denoted as *e'* and *qe'*. *e'* and *qe* are phase shifted of π/2. The sinusoidal signal *e'* is in phase with the grid voltage *e*. In addition, *e'* and the first harmonic component of the grid voltage exhibit the same magnitude.

**Figure 6.** Orthogonal signal generator (OSG)–second-order generalized integrator (SOGI) standard structure.

The SOGI acts like an infinite gain band-pass filter whose transfer function is defined as:

$$H\_{\rm SOGI}(s) = \frac{\omega\_n s}{s^2 + \omega\_n^2} \tag{1}$$

where ω*<sup>n</sup>* represents the undamped natural frequency of the SOGI which should coincide with the estimated frequency (ω*<sup>n</sup>* = ωˆ).

The performances of all the single-phase PLLs based on a OSG are particularly affected by the voltage offset commonly introduced by the measurement equipment and by the signal processing operation [27]. The frequency of the error derived by the grid voltage offset is the same of the grid voltage waveform. The PLLs based on a OSG are not properly designed to provide rejection to the voltage offset. However, since the PI controller acts as a filter, the PLL controller parameters could be tuned in order to achieve filtering of the voltage offset. It would modify the bandwidth of the overall system, but, unfortunately, it would impact considerably the dynamic performances of the PLL. In [71] the performances of single-phase PLLs based on different OSGs are compared and a guideline for the PLLs parameters tuning is proposed.
