**2. Materials and Methods**

So far, most of the investigations of conductive DWs in LNO have been performed using scanning probe microscopy techniques, such as piezo-response force microscopy (PFM) and conductive-type atomic force microscopy (cAFM), on thick single crystals [15,16] These were backed up by inclination measurements using three-dimensional optical microscopy techniques, such as Cherenkov second-harmonic generation microscopy [17–19] multiphoton microscopy [20–22] and optical coherency microscopy [23], which confirmed the stable inclined DW formation as well as ferroelectric lithography [24]. Furthermore, transmission electron microscopy measurements prove the stable inclination on the atomic scale [25,26].

We investigated single-crystalline congruent thin-film lithium niobate, displaying a single ferroelectric domain after preparation. The samples were fabricated by a modified ion-slicing technique on 6" wafers [27]. Within the process, a platinum electrode is deposited onto the handling wafer before the wafer bonding. The thickness of the layer was set to be 600 nm by chemical-mechanical polishing and checked by ellipsometry. This enables electrical read-out, yet still preserving the single-crystalline and single domain configuration. High-resolution XRD measurements confirmed the high quality of the films oriented along (001). Electrodes with sizes of A <sup>≈</sup> 20,000 <sup>μ</sup>m2, consisting of Cr/Au with a thickness of 100 nm, were evaporated and lithographically structured to enable the electrical characterization.

The bare film was further investigated by scanning probe microscopy to identify the formation of conductive DWs. Hereby, full-metal Pt AFM tips were applied. The domain patterns were written at a constant voltage of 65 V. To identify the locally written domain pattern we used piezo-response force microscopy (PFM). Conductive AFM (cAFM) was performed at bias voltages up to 10 V.

The local I–V-curves reveal a strong unipolar conductance, which enables erasing the conductive domain walls by applying an external counter-bias. We investigated whether a similar conductive DW formation is possible in a parallel plate capacitor structure using homogeneous electrodes. Hence, we deposited Cr/Au electrodes with a size of A <sup>≈</sup> 20,000 <sup>μ</sup>m<sup>2</sup> and a thickness of 100 nm on a LNO film with a thickness of 600 nm and Ti/Pt back electrode.

## **3. Results**

#### *3.1. Conductive AFM Investigation*

DWs were probed by cAFM to investigate the emergence of DW conductivity in these congruent LNO films. In Figure 1a,b a comparison of piezoresponse force microscopy (PFM) and subsequent cAFM measurements is given on the previously created domain pattern, which reveals a perfect match between the derived DWs from PFM and the conductive areas in the films. To further explore the conduction properties of CDWs in LNO thin films, local I–V measurements were carried out. The local current detected for a range of bias voltages is given in Figure 1c,d. Spot 1 is taken as reference and shows only a slight increase in conductivity over as long as about 500s at a voltage of 10 V (<10−<sup>2</sup> nA). At the DW position, however, there is a strong nonlinear increase in current with applied voltage. At all points, a significant increase over several orders of magnitude (at least three) can be observed, which sufficiently separates these states from the background. The temporal stability measurements show a small increase in current over time. An example is given in Figure 1e. Local probe measurements on these CDWs reveal a stable conductance after 3 h with a minute increase over the measurement of 5% between 1 h and 3 h, hence influences by drift can be ruled out for the given shorter-term measurement.

**Figure 1.** DW conductance in the congruent LNO thin films: (**a**) domain configuration by PFM; (**b**) cAFM scan at a bias voltage of 3 V; (**c**) Local I–V measurements on conductive DWs at four marked spots; (**d**) logarithmic plot of the detected current; (**e**) temporal development of the current at spot 4 at an external bias voltage of 10 V.

## *3.2. Phase-Field Simulation*

The formation of inclined DWs is generally encountered as the reason for conductive DWs in LNO. Yet, the stable formation of such inclined DWs is still a topic of current research. We applied phase field simulations, as they can provide further evidence for the existence and stability of CDWs in ferroelectric thin films. Phase field simulations have been used to study the domain pattern formation in many proper ferroelectrics, including BTO, BFO, and PZT [28]. In this study, we have modeled the temporal evolution of ferroelectric domains in LNO thin films in response to the electrical field created by a biased probe tip. In the simulations, the voltage is ramped up to a given bias voltage. A domain nucleus is formed (shown in Figure 2a), which grows into the single-crystalline film. Due to the external bias field, canted polarization states with in-plane polarization components are created. Afterwards, the inverted domain reaches the rear surface and grows sideways until an equilibrium is reached. When the bias voltage is released, the switched domain relaxes. We observe a stable CDW formation with a non-zero inclination angle, dependent on the maximum bias voltage applied. Since the gradient energy coefficients, which determine the DW width and energy, are rarely reported for LNO, we use the value estimated by Scrymgeour et al. [29]. We notice that increasing the gradient coefficients leads to a disappearance of the DW inclination, suggesting that the stability of inclined DWs in LNO may be attributed to its relatively small gradient energy.

**Figure 2.** (**a**) Three-dimensional phase field simulation of CDW formation under an AFM tip for a 20 nm thick lm at 20 V. -1 Nucleation, -2 through domain formation until equilibrium under external bias, -3 equilibrium domain after removal of bias. (**b**,**c**) evolution of inclination angle for film thicknesses, d, of 50 nm and 20 nm respectively; (**d**) equilibrium inclination angle after removal of bias as a function of applied field; (**e**) measured current Iread at a bias voltage of 10 V for domains written at various writing voltages Vwrite, for comparison PFM scans; (**f**) extracted maximum domain wall current.

The gradient coefficients of uniaxial LNO and LTO are significantly smaller than for other perovskite ferroelectrics. Previous reports on 180◦DW conductance in ferroelectric thin films supports our conjecture. For example, the reported DW inclination in as-poled LTO bulk material was apparently larger [15,30]. Still, it has to be noted that the coefficients are not well known and effects from gradient energy anisotropy and carrier generation could be significant.

The evolution in DW inclination for various tip voltages is given for films of a thickness of 20 nm and 50 nm in Figure 2b,c. In all given cases, a non-zero inclination can be observed after the external bias field is completely removed. The extracted final inclination angle is plotted over the homogenized applied external field. We can observe a decrease in inclination with larger applied external field. A similar behavior in the extracted DW conductance can prove a link between the degree of inclination of a DW and its conductance. To compare the theoretical prediction with the experimental condition, domains were written with a domain size of d = 500 nm at various tip voltages. The written domains are visualized by PFM in Figure 2e. The conductivity extracted by cAFM shows a decrease in current for larger applied writing voltage. In Figure 2f the extracted maximum current values at the DW are given. A similar behavior of the current as a function of the simulated inclination angle can be observed. This is in agreement with previous theoretical assumptions [8] that the DW conductance of inclined DWs is proportional to its inclination and follows σ = *2PS* sin α.

## *3.3. Resistive Switching Investigations*

To further analyze the properties of the conductance, I–V measurements were conducted in plate-electrode condition, schematically sketched in Figure 3a under the assumption of inclined domain wall generation at nucleus sites, which would result in strong conductance changes upon reach of the local coercive voltage. Indeed, we can observe a very strong increase over five orders of magnitude in current at a very defined set voltage *Vset* = 21.05 V with an accuracy of Δ*Vset*/*Vset* = 10<sup>−</sup>3, which is proven to be the local coercive voltage from PFM measurements. This value of *Vset* is not only reproduced for a single device, but also for 50 individual devices on a single wafer, which clearly underlines the very precise and reproducible behavior of single-crystalline resistive switching devices. Up to a voltage of −3 V, a very symmetric current–voltage relation can be observed. Yet, for larger negative biases, the absolute value of the current saturates and is not stable anymore but reduces with time. The given cycles in Figure 3d are obtained with a cycle frequency of 1.5 mHz. The observed behavior is very similar to back-switching observed upon current injection from the top electrode at small voltages confirmed by PFM. Hence, we suppose, upon the application of a negative bias, insulating straight or tail-to-tail DWs are formed or domain inversion is invoked; thus, there is no complete conductive channel anymore, which prohibits a current flow.

**Figure 3.** Investigation of the switching behavior, endurance, stability, and tunability of resistive switching of the Pt/LNO/Cr/Au stack with a contact area of 2000 μm2. (**a**) film stack configuration (**b**) PFM scan of a written domain (**c**) cAFM scan at a bias voltage of 3V; (**d**) full I-V cycle (f = 1.5 mHz) with a very defined set voltage Vset = 21.05 V (DVset/Vset~10<sup>−</sup>3), hence a comparably small electric field Eswitch,off = 0.3 MV/cm and strongly rectifying behavior without significant leakage upon an electric field of Eswitch,off = 3.4 MV/cm with a resistance of >20 TW, (**e**) switch-on I-V cycle with constant switch-off voltage Vswitch,off = −210 V, (**f**) endurance of high resistance and low-resistance state (HRS, LRS, respectively) over at least 10<sup>5</sup> cycles with a resistance window of >104 and a read voltage of 10 V, (**g**) time stability of low resistant state over 104 s, which yields an 80% reliability over 108 s or 3 years, (**h**) probability of the current in HRS and LRS at 10 V for 50 tested devices on the same single crystalline thin-film (**i**) tunability of readout current Iread,on under modulation of writing time twrite and writing voltage Vwrite. The read-out current Iread,on reduces for larger writing voltages Vwrite,on. Iread,on is the average value over 100 writing cycles each.

Before switching the resistance state, one can observe no current larger than 10 pA, which is the lower limit for current detection of the applied source-meter. Further measurements with a further electrometer revealed an even smaller upper current limit of 200 fA at a voltage of −200 V, which corresponds to a resistance of at least 1 PΩ up to a bias voltage of −200 V or an electric field of 3.4 MV/cm, which underlines that leakage is negligible in the films. This similarly holds for positive

read-out voltages in the high resistance state (HRS). Hence, the HRS is expected to have a resistance of at least 25 TΩ, with the low resistance state at around 10 MΩ; hence, we observe a huge resistance change over seven orders of magnitude. By setting the switch, no overshoot is present; thus the HRS setting is self-limiting. In Figure 3e the half cycle I–V-curves are shown upon the boundary condition, the current having reduced to 10−<sup>8</sup> A at <sup>−</sup>210 V. We can observe the reproducible set voltage. However, below this specific voltage, a slight increase in current can be observed. In general, this current, which deviates from the first cycle, is smaller the lower the current at *V* = −210 V. It saturates after several cycles. Several reasons are possible, e.g., deep traps, which are incorporated into the film upon large current flow. Hence, for endurance testing high voltage treatment was kept as short as possible. In Figure 3f the endurance upon such cycling is shown. The resistance is measured after every cycle. The LRS is created on application of *Vset* = 21.1 V. The system is released into the HRS upon application of *V* = −210 V. This results in a very enduring resistive switching device over at least 10<sup>5</sup> cycles. The states can be read out without destruction. The temporal stability of the LRS is given in Figure 3g. As is visible, the conductance is very stable over at least 104 s. Hence, assuming an exponential decrease and a minimum current of 80%, a stability over 108 s or 10 years can be predicted. Similar measurements with an AFM tip revealed the stability of the current on CDWs over at least 3 h, which is about the longest time to measure due to probe drift. The statistical results given in Figure 3h show a sufficiently high margin for the application as a nonvolatile memory.

Under the application of larger set voltages and shorter pulses being applied among domain formation, the domain wall is expected to straighten, which would result in a decrease in conductance. Indeed, this can be seen as given in Figure 3i. Particularly, the fact that stronger applied electric fields result in reduced conductivity is very unusual and supports the conductance measured to be derived by inclined domain walls.

This proof of high endurance, high on/off current switching, high retention and the tenability among programming makes charged domain walls an interesting tunable nonvolatile memory.
