**1. Introduction**

Fractional calculus, an important branch of mathematics, was born in 1695 and appeared almost simultaneously to classic calculus. Fractional calculus, in a narrow sense, mainly includes fractional differentials and fractional integrals, and it broadly includes fractional differences and fractional sum quotients. Since the theory of fractional calculus has been successfully applied to various fields in recent years, people have gradually discovered that fractional calculus can describe some non-classical phenomena in the fields of natural science and engineering applications. The current popular areas of fractional calculus include fractional numerical algorithms and fractional synchronization.

The successful development of a memristor has provided a new avenue for electronic technology and information technology, and it is expected to realize new functions. Their non-volatility makes memristors play a key role in memory, neural networks, and pattern recognition. Chua firstly defined a memristor (MR) in 1971 [1], and HP Labs reported the successful fabrication of nanoscale memristive devices [2]. A memristor is the fourth two-terminal fundamental circuit element with information storage ability and, as such, has attracted immense worldwide interest from both industry and academia [3]. Applications of MRs are used in many fields such as filter design, programmable logic, biological systems, and neural systems such as neural synaptic weighting with a pulse-based memristor circuit [4], Boolean logic operations and computing circuits based on memristors [5], and the voltage–current relationship of active memristors and frequency [6]. A generalized boundary condition memristor model was proposed in [7]. Research on a coupling behavior-based series-parallel flux-controlled memristor has been also conducted [8–10]. Two types of nanoscale nonlinear memristor models and their series-parallel circuit have been investigated [11], as have the characteristics of a memristor and its application in the circuit design [12–17]. First order mem-circuits have been studied [18]. Research on the equivalent analysis circuit of a memristors network [19], memristor-based

adaptive coupling for consensus and synchronization [20–22], and coupling as a third relation in memristive systems have been proposed [23–30]. However, there is less research on fractional-order memristor, and there has been no literature physical background. In this paper, the analytical solution of parameter expression is derived by using a fractional-order memristor model in Section 2. The properties of fractional-order memristor is studied in Section 3, The results reflect that the resistance value of a fractional-order memristor can be affected by fraction-order, frequency, the switch resistor ratio, average mobility, and so on; additionally, the circuit of *M*α serially connected and connected in parallel with *M*<sup>α</sup>, *L* and *C* are also studied separately. Finally, the conclusion is presented in Section 4.

#### **2. The Fractional Derivative**

The α order Caputo derivative is defined as:

$$D\_t^a \mathbf{x}(t) = \frac{1}{\Gamma(m-a)} \int\_0^t \frac{\mathbf{x}^{(m)}(\tau)}{(t-\tau)^{1+a-m}} d\tau. \tag{1}$$

where *m* = [α] + 1 and <sup>Γ</sup>(*m*) is the Euler's gamma function; when α ∈ (0, <sup>1</sup>):

$$D\_t^a e^{\lambda t} = \lambda^a e^{\lambda t}.\tag{2}$$

Then, we obtain:

$$D\_t^a \epsilon^{i\omega t} = (i\omega)^a \epsilon^{i\omega t}.\tag{3}$$

The real part and imaginary part of the sine and cosine functions can be obtained by separating Equation (3).

Some basic properties of Caputo fractional calculus are as follows.

$$\text{(1)}\quad {}\_aD\_t^a[\mu f(t) + \upsilon \garrow (t)] = \mu\_a D\_t^a f(t) + \upsilon\_t D\_t^a \g(t)$$

$$\text{(2)}\quad {}\_aD\_t^\alpha D\_t^\beta f(t) = {}\_aD\_t^\beta D\_t^\alpha f(t) = {}\_aD\_t^{\alpha+\beta} f(t),$$

$$0 < \alpha \stackrel{\cdot}{\underset{a}{\cdot}} \stackrel{\cdot}{D\_t^a} = \frac{\stackrel{\cdot}{\underset{k}{\cdot}} \stackrel{\cdot}{R\_t^{\cdot a}}}{\stackrel{\cdot}{\underset{\cdot}} \stackrel{\cdot}{D\_t^a}} \stackrel{\cdot}{\alpha} > 0$$

In which the constant *K* - 0, and the Caputo FD is *Ca <sup>D</sup>*<sup>α</sup>*tK* = 0, α > 0.

#### **3. The Model of Fractional-Order Memristor**

The structure of an MR and its symbol are shown in Figure 1.

**Figure 1.** The structure and symbol of a memristor (MR). (**a**) The structure and (**b**) the symbol.

The mathematical model are defined as follows

$$w(t) = \mathcal{M}^{\alpha}(\mathbf{x}) i(t). \tag{4a}$$

$$M^{\alpha}(\mathbf{x}) = R\_{\text{ON}}\mathbf{x} + (1 - \mathbf{x})R\_{\text{OFF}}.\tag{4b}$$

$$\mathbf{x}(t) = k\_0 D\_t^{-\alpha} \mathbf{i}(t). \tag{4c}$$

In which *<sup>D</sup>*−α*t* is the α integral of *<sup>x</sup>*(*t*), *<sup>M</sup>*<sup>α</sup>(*x*) is a fractional-order memristor when supposing the input current *<sup>i</sup>*(*t*) = *Im* sin(ω*<sup>t</sup>*), switch resistor *RON* = 100 Ω and *ROFF* = 10 kΩ, the current *Im* = 0.2 mA *D* = 10 nm, the average mobility *uv* = 10−<sup>14</sup> m.s<sup>−</sup>1V−1, the length *x*0 = 0.01, and the frequency ω = 5 rad/s. The transient current curve and the voltage curve of the memristor are shown in Figure 2a,b respectively.

**Figure 2.** (**a**) The transient current curve and (**b**) the transient voltage curve.

The simulation result for when α has different values is shown in Figure 3a. It was found the an MR possesses memristive properties, with pinched hysteresis loops forming inclined "8", and this property can be used to realize signal storage or computing. From Figure 3b, it can be seen that the smaller the value of fractional order, the greater the dynamic range amplitude of the resistance was.

**Figure 3.** (**a**) The curves of *v* − *i* and (**b**) the curves of *<sup>M</sup>*(*t*).

The characteristic curves of a fractional-order memristor with different parameters are shown in Figure 4. From Figure 4a, it can be seen that the difference of resistance decreased as the frequency ω increased. From Figure 4b, it can be seen that the switch resistor increased and the curves of *v* − *i* were inclined to right. From Figure 4c, it can be seen that the difference of resistance increased as the value of μ*v* increased.

**Figure 4.** The *v* − *i* curves of a fractional-order MR (α = 0.98). (**a**) Varied with frequency ω; (**b**) varied with different switch resistance (ROFF/RON); and (**c**) varied with different average mobility values μ*<sup>v</sup>*.

#### **4. The Properties of Fractional-Order Memristor**

The fractional-order memristor in six cases of connection, serially and in parallel, are discussed in this section.

#### *4.1. The Two Fractional-Order Memristors in Serial*

The serial circuit of two fractional-order memristors is shown in Figure 5.

**Figure 5.** Serial circuit of two fractional-order memristors.

By choosing the current *<sup>i</sup>*(*t*) = *Im* sin(ω*<sup>t</sup>*), based on the Caputo differential, Euler's formulas, and the separating variables method, we obtain:

$$
\dot{\mathbf{x}}(t) = kD\_t^{1-a}i(t) = kl[D\_t^{1-a}\sin\omega t].\tag{5}
$$

When *t* >> 1, Equation (11) can be simplified as:

$$
\dot{\alpha}(t) \approx k l \omega^{1-\alpha} \sin(\omega t + \frac{1-\alpha}{2}\pi). \tag{6}
$$

Then, the two sides of Equation (12) can be integrated to get:

$$\mathbf{x}(t) \approx \mathbf{x}(0) + \frac{kI}{\alpha^{\alpha}} [\cos(\frac{1-\alpha}{2}\pi) - \cos(\alpha t + \frac{1-\alpha}{2}\pi)].\tag{7}$$

By choosing the parameters M1(*uv* = 10−<sup>14</sup> m.s<sup>−</sup>1V−1), M2(*uv* = 2 ×10−<sup>14</sup> m.s<sup>−</sup>1V−1), and α = 0.98, one can obtain the curves of *v* − *i* that are are shown in Figure 6.

**Figure 6.** Simulation results of two fractional-order, serially connected memristors *v*(*t*) − *<sup>i</sup>*(*t*) curves.

It was found the two serial MRs also possessed the memristive properties with pinched hysteresis loops behaving as inclined "8", as shown in Figure 6. It can be seen that the values of M1, M2 and M12 are increased with the value of v(t), and the value of M12 is bigger than those of M1 and M2.

#### *4.2. The Circuit of Fractional-Order MR in Parallel*

The circuit of two fractional-order MRs in parallel is shown in Figure 7. According to Equations (4b) and (4c), it be written as:

$$M\_a(\mathbf{x})\dot{\mathbf{x}}(t) = k\_0 D\_t^{-a} M\_a(\mathbf{x}) i(t). \tag{8a}$$

$$M\_{\alpha}(\mathbf{x})\dot{\mathbf{x}}(t) = k\_0 D\_t^{-\alpha} \upsilon(t). \tag{8b}$$

**Figure 7.** Circuit of two fractional-order memristors n parallel.

By choosing the voltage *v*(*t*) = *Vm* sin(ω*<sup>t</sup>*), one can obtain:

$$M\_{a}(\mathbf{x})\dot{\mathbf{x}}(t) = k\_{0}V\_{m}D\_{t}^{1-a}\sin(\omega t)\dot{\mathbf{x}}(t) = kD\_{t}^{1-a}i(t) = kI[D\_{t}^{1-a}\sin\omega t].\tag{9}$$

When *t* >> 1,Equation (11) can be simplified as:

$$M\_a(\mathbf{x})\dot{\mathbf{x}}(t) \approx k\_0 V\_m \omega^{1-\alpha} \sin(\omega t + \frac{1-\alpha}{2}\pi). \tag{10}$$

and

$$\left[R\_{\rm ON}\mathbf{x} + R\_{\rm OFF}(1-\mathbf{x})\right] \cdot (\mathbf{x} - \mathbf{x}\_0) \approx \frac{kV\_m}{a^\mu} [\cos(\frac{1-\alpha}{2}\pi) - \cos(\alpha t + \frac{1-\alpha}{2}\pi)].\tag{11}$$

*Symmetry* **2020**, *12*, 437

$$[(R\_{\rm ON} - R\_{\rm OFF})\mathbf{x}^2 + [(1+\mathbf{x}\_0)R\_{\rm OFF} - R\_{\rm ON}\mathbf{x}\_0]\mathbf{x} = \frac{kV\_{\rm mf}}{\alpha^\mu}[\cos(\frac{1-\alpha}{2}\pi) - \cos(\omega t + \frac{1-\alpha}{2}\pi)] + R\_{\rm OFF}\mathbf{x}\_0. \tag{12}$$

Then, one can set *A* = *RON* − *ROFF*; *B* = (1 + *<sup>x</sup>*0)*ROFF* − *RONx*0; *H* = −*kVm* ω<sup>α</sup> [cos( 1−<sup>α</sup>2 π) − cos(ω*<sup>t</sup>* + 1−<sup>α</sup> 2π)] + *ROFFx*0

and we can obtain:

$$A\mathbf{x}^2 + B\mathbf{x} + H = \mathbf{0}.\tag{13}$$

$$\mathbf{x}\_1 = \frac{-B + \sqrt{B^2 - 4AH}}{2A}; \mathbf{x}\_2 = \frac{-B - \sqrt{B^2 - 4AH}}{2A}. \tag{14}$$

The value of *<sup>M</sup>*α(*x*) can be calculated.

To further study the dynamic behaviors of this MR circuit in parallel, the parameters were configured as the following: the input voltage *v*(*t*) = *Vm* sin <sup>ω</sup>*t*, and the parameters *RON*1 = 100 Ω, *ROFF*1 = 10 kΩ, *Vm* = 3 V, *D* = 10 nm, *uv* = 10−<sup>14</sup> m.s<sup>−</sup>1V−1, *RON*2 = 120 Ω, *ROFF*2 = 18 kΩ, and ω = 5. The simulation result when using these parameters is shown in Figure 8.

**Figure 8.** Simulation results of two memristors connected in parallel with *v*(*t*) − *<sup>i</sup>*(*t*) curves.

It was found the two MRs that were connected in parallel also possessed the memristive properties with pinched hysteresis loops which are hown in Figure 8.

#### *4.3. The Circuit of Fractal-Order Memristor and Capacitor That Are Serially Connected*

The fractional-order memristor *M*<sup>α</sup>(*t*) and serially connected capacitor C are shown in Figure 9. By assume the current *<sup>i</sup>*(*t*) = *Im* sin <sup>ω</sup>*t*, M expresses the memristor, and C is the capacitor.

**Figure 9.** The circuit of the fractional-order memristor and connected serially capacitor.

We can obtain:

$$\begin{array}{ll} v(t) &=& \mathfrak{u}\_{\mathbb{C}}(t) + \mathfrak{u}\_{\mathrm{Ma}}(t) = \mathfrak{u}\_{\mathbb{C}}(t\_{0}) + \frac{1}{\mathbb{C}} \int\_{t\_{0}}^{t} i\_{\mathbb{C}}(t)dt + i\_{\mathrm{Ma}}(t)M\_{\mathrm{a}}(t) \\ &=& \mathfrak{u}\_{\mathbb{C}}(t\_{0}) + \frac{I\cos(\omega t\_{0})}{\mathbb{C}\omega} - \frac{I\cos(\omega t)}{\mathbb{C}\omega} - B\sin(\frac{1-\mathfrak{a}}{2}\pi) + A\sin(\omega t) + B\sin(2\omega t + \frac{1-\mathfrak{a}}{2}\pi). \end{array} \tag{15}$$

where

$$A = (R\_{ON} - R\_{OFF})[\mathbf{x}(0) + \frac{lk}{a^{\mu}}(\cos \frac{1-\alpha}{2}\pi)]I + R\_{OFF}I. \tag{16a}$$

$$B = \frac{(R\_{OFF} - R\_{ON})kl^2}{2\omega^a}.\tag{16b}$$

The simulation result is shown in Figure 10. From Figure 10a, it can be seen as the parameter α decreased, the area of hysteresis loops increased and the difference of resistance increased with same current. From Figure 10b, it can be seen that if the parameters α and *C* were not varied, as ω increased, the area of hysteresis loops decreased. From Figure 10c, it can be seen that if the parameters α and ω were not varied, the area of hysteresis loops was not almost changed and the capacitor has little effect on the circuit.

**Figure 10.** *M*α*C* series circuit and its features. (**a**) Effect of the order α; (**b**) effect of the exciting frequency ω; and (**c**) effect of the capacitance *C*.

#### *4.4. The Circuit of Fractal-Order Memristor and Capacitor That Were Connected in Parallel*

A memristor and a capacitor which were connected in parallel are shown in Figure 11, we can assume that *v*(*t*) = *Vm* sin(ω*<sup>t</sup>*), ω(0) = 0,*Vm* is the voltage magnitude.

**Figure 11.** The circuit of a memristor and a capacitor that were connected in parallel.

By applying Kirchhoff's current law (KCL), the current of circuit can be written as:

$$i(t) = \frac{v(t)}{M^a(t)} + \mathcal{C}\frac{dv(t)}{dt} = \frac{v(t)}{M^a(t)} + \omega \mathcal{C}V\_m \cos(\omega t). \tag{17}$$

Additionally, when the parameters α and ω were chosen as different values, it can be seen the circuit of a memristor and a capacitor that were connected in parallel also possessed the memristive properties with pinched hysteresis loops which are shown in simulations in Figure 12a,b.

**Figure 12.** The response of the circuit of a memristor and a capacitor that were connected in parallel. (**a**) α = 0.98, 0.9, and 0.8; and (**b**) ω = 5, 10, 15 rad/s.

#### *4.5. The Circuit of Fractal-Order Memristor and Inductor That Are Serially Connected*

The circuit of the memristor and serially connected inductor are shown in Figure 13, where we assumed *<sup>i</sup>*(*t*) = *Im* sin(ω*<sup>t</sup>*), ω(0) = 0.

**Figure 13.** The circuit of the memristor and serially connected inductor.

The voltage was:

$$\begin{array}{l} v(t) = \boldsymbol{u}\_{L}(t) + \boldsymbol{u}\_{M\_{a}}(t) = L\frac{d\boldsymbol{i}\_{0}(t)}{dt} + \boldsymbol{i}\_{M\_{a}}(t)M\_{a}(t) \\ = \boldsymbol{I}\boldsymbol{L}\boldsymbol{\omega}\cos(\boldsymbol{\omega}t) + \boldsymbol{A}\sin(\boldsymbol{\omega}t) + \boldsymbol{B}[\sin(2\boldsymbol{\omega}t + \frac{1-\boldsymbol{\alpha}}{2}\boldsymbol{\pi}) - \sin(\frac{1-\boldsymbol{\alpha}}{2}\boldsymbol{\pi})] \\ = \boldsymbol{u}\_{\mathbb{C}}(t\_{0}) + \frac{\boldsymbol{I}\cos(\boldsymbol{\omega}t\_{0})}{\boldsymbol{\triangle\omega}} - \frac{\boldsymbol{I}\cos(\boldsymbol{\omega}t)}{\boldsymbol{\triangle\omega}} - \boldsymbol{B}\sin(\frac{1-\boldsymbol{\alpha}}{2}\boldsymbol{\pi}) + \boldsymbol{A}\sin(\boldsymbol{\omega}t) + \boldsymbol{B}\sin(2\boldsymbol{\omega}t + \frac{1-\boldsymbol{\alpha}}{2}\boldsymbol{\pi}). \end{array} \tag{18}$$

and

$$A = (R\_{\rm ON} - R\_{\rm OFF})[x(0) + \frac{lk}{\alpha^{\alpha}}(\cos \frac{1-\alpha}{2}\pi)]I + R\_{\rm OFF}I. \tag{19a}$$

$$B = \frac{(R\_{OFF} - R\_{ON})kl^2}{2\omega^a}.\tag{19b}$$

The simulation result is shown in Figure 14. From Figure 14a, it can be seen that as the parameters ω and *L* were not varied, because as α decreased, the area of hysteresis loops increased and the difference of resistance increased with the same current. From Figure 14b, it can be seen that if the parameters α and *L* were not varied, as ω increased, the area of the hysteresis loops decreased. From Figure 14c, it can be seen that if the parameters α and ω were not varied, the area of the hysteresis loops was not almost changed, and it is shown that the inductor barely affected the circuit.

**Figure 14.** *M*α*L* series circuit and its features: (**a**) Effect of α on the hysteresis loop; (**b**) effect of ω on the hysteresis loop; and (**c**) effect of *L* on the hysteresis loop.

#### *4.6. The Circuit of Fractal-Order Memristor and Inductor Connected in Parallel*

A memristor and a capacitor that were connected in parallel are shown in Figure 15. By assuming the voltage *v*(*t*) = *Vm* sin(ω*<sup>t</sup>*), ω(0) = 0, *Vm* can be found as the voltage amplitude. By applying Kirchhoff's current law (KCL), the current of circuit can be written as:

$$L\frac{d\dot{q}\_L(t)}{dt} = v(t) = V\_m \sin(\omega t). \tag{20a}$$

$$\text{tri}\_{\text{L}}(t) = \frac{V\_{\text{ml}}}{\omega L} [1 - \cos(\omega t)]. \tag{20b}$$

$$\dot{i}(t) = i\_{\rm Ma}(t) + i\_{\rm L}(t) = \frac{v(t)}{M\_a(t)} + \frac{V\_{\rm m}}{aL}[1 - \cos(\omega t)].\tag{20c}$$

**Figure 15.** The circuit of a memristor and a inductor that were connected in parallel.

The simulation is shown in Figure 16a,b. It can be seen the circuit of the memristor and inductor that were connected in parallel also possessed memristive properties with pinched hysteresis loops. From Figure 16a, it can be seen the area of pinched hysteresis loops increased with α increased. From Figure 16b, it can be seen the area of the pinched hysteresis loops decreased with the ω increased.

**Figure 16.** The response of the circuit of the memristor and inductor connected in parallel. (**a**) α = 0.98, 0.9, and 0.8; and (**b**) ω = 5, 10, 15 rad/s.

## **5. Conclusions**

In summary, this paper has presented a fractional-order memristor model and verifies the three essential characteristics of a fractional-order memristor. In addition, the properties of fractional-order memristor have been described. In a simple memristive series circuit, with a change of the fractional derivative order, the series circuit of a fractional-order memristor and a capacitor or inductor shows a conversion from a pure capacitor circuit to a memristive circuit. The series circuit shows conversions of purely inductive and memristive circuits. Here, analytical solutions were derived by a fractional-order memristor, the properties of fractional-order memristor model parameters were obtained, and simulation results were given. The results showed that material properties determine the order of the fractional derivative, so the best memory capacity of a physical memristor can be achieved by finding materials that are compatible with the excitation frequency.

**Author Contributions:** Conceptualization, S.F.W. and A.Y.; methodology, S.F.W; software, S.F.W.; validation, S.F.W. and A.Y.; formal analysis, S.F.W.; investigation, S.F.W.; resources, S.F.W.; data curation, S.F.W.; writing—original draft preparation, S.F.W.; writing—review and editing, S.F.W.; visualization, S.F.W.; supervision, S.F.W.; project administration, S.F.W.; funding acquisition, A.Y. All authors have read and agreed to the published version of the manuscript.

**Funding:** This work was supported by the Foundation of The University Synergy Innovation Program of Anhui Province under Grant GXXT-2019-019 and Key R&D Projects of Anhui Science and Technology Department under Grand 201904f06020022.

**Conflicts of Interest:** The authors declare that there is no conflict of interest regarding the publication of this paper.
