**1. Introduction**

The photovoltaic (PV) generation is emerging as a future energy system because of its installation convenience, no-noise, infinite, and eco-friendly characteristics [1–4]. It is classified into the centralized power system and the distributed power system depending on the scale of solar power generation [5]. The centralized power system has a simple circuit structure with PV strings as the input energy source, but it has a disadvantage that the power generation is considerably lowered when some panels of the PV string are shaded. On the other hand, in the distributed power system, the optimal power extraction is possible because the maximum power point tracking (MPPT) control can be applied to each PV panel with a micro-inverter connected. So, it can minimize the loss of power generation caused by the shading effect. However, one micro-inverter is required for each PV panel, so implementation of this strategy is expensive. Therefore, many attempts have recently been made to lower the cost of micro-inverters.

In general, considering the cost, micro-inverters have been designed to use circuit architectures with a flyback converter [6–10], which provides galvanic isolation with fewer switches than other designs. Although the flyback converter has the advantage of circuit simplicity and low cost, the design must use a transformer with a high turns ratio to achieve a high voltage-conversion ratio from low dc voltage on a single PV panel. In the transformer, the high turns ratio causes a large leakage inductance which increases the stress on semiconductor switches. Moreover, due to low utilization of the transformer, this topology is most suitable for low-power applications <200 W. Recently, multi-phase interleaved technology has been applied to solar power generation from PV panels that output ≥320 W, but this technology requires large and expensive components.

This paper proposes a low-cost, slim, single-stage micro-inverter to drive a 320-W-class PV panel. The proposed micro-inverter has an interleaved structure based on the boost half-bridge (BHB) converter [11] with a cascaded voltage doubler. The interleaved BHB has an inversely-coupled inductor for the voltage step-up operation. The coupled inductor can reduce input ripple current and can be reduced in size. The voltage doubler increases the ac output voltage from the interleaved converter. Therefore, the transformer can have a lower turns ratio in the interleaved BHB than in a flyback converter and can be reduced in size. In the proposed micro-inverter, semiconductor switches achieve turn-on zero-voltage-switching (ZVS) and turn-off zero-current-switching (ZCS) by exploiting the resonance between the leakage inductance of the transformer and output capacitors of the voltage doubler, without additional components.

This paper also presents two advanced control algorithms. First, a variable switching frequency control scheme was implemented to reduce total harmonic distortion (THD) by reducing output ripple current. Then an advanced burst control scheme was implemented to improve power-conversion efficiency at light loads. By distributing output current temporally at light loads, input ripple voltage can be reduced. Therefore, the size of decoupling capacitors is reduced and MPPT efficiency is improved compared with the conventional burst control [12,13]. Section 2 describes the circuit structure and operating principles of the proposed micro-inverter, Section 3 gives the proposed control schemes, Section 4 shows experimental results using a 320-W prototype micro-inverter, and Section 5 concludes the paper.

#### **2. Circuit Structure and Operating Principles of the Proposed Micro-inverter**

The proposed micro-inverter (Figure 1) consists of an interleaved boost converter, a full-bridge converter, and a voltage doubler. The portion that is composed of the interleaved boost and full-bridge converters is based on a boost half-bridge topology. The interleaved boost converter consists of an inversely-coupled inductor *LB*, four switches *S*1–*S*4, and a storage capacitor *CS*. The full-bridge converter consists of a transformer *T*1 and the same four switches *S*1–*S*4 as the interleaved boost converter. The voltage doubler has four switches *S*5–*S*8 and two capacitors *C*1 and *C*2.

**Figure 1.** The circuit structure of the proposed micro-inverter.

In the proposed interleaved boost converter, two inductors *L*1 and *L*2 form *LB* (Figure 2) by using a single magnetic core instead of two separate magnetic cores used in the conventional interleaved boost converter [14]. *LB* has a turns ratio of 1:1; *L*1 and *L*2 each have self-inductance *L*. The mutual inductance *M* between *L*1 and *L*2 is represented as:

$$M = kL,\ (k < 0),\tag{1}$$

where *k* is the coupling coefficient. The voltage drops of *L*1 and *L*2 are given, respectively, by

$$
v\_1 = L\frac{di\_1}{dt} - M\frac{di\_2}{dt},\tag{2}$$

and

$$
v\_2 = L\frac{di\_2}{dt} - M\frac{di\_1}{dt}.\tag{3}$$

Using Equations (2) and (3) and *vm* = −*Md*(*<sup>i</sup>*<sup>1</sup> + *<sup>i</sup>*2)/*dt* yields

$$
\upsilon\_1 - \upsilon\_{\text{ff}} = (L + M)\frac{d i\_1}{dt} \tag{4}
$$

and

$$
v\_2 - v\_m = (L+M)\frac{di\_2}{dt}.\tag{5}$$

*S*1, the body diode of *S*2, and *L*1 form one boost power stage. *S*3, the body diode of *S*4 and *L*2 form the other boost power stage. The two boost power stages form an interleaved boost converter and two outputs operate out of phase. When *S*1 or *S*3 is turned on, voltage *vIN* is applied to *L*1 or *L*2, respectively. When *S*1 or *S*3 is turned off, voltage *vIN* − *vCs* is applied to *L*1 or *L*2, respectively. The energy accumulated during the on-state for each boost power stage is transferred into *CS*. There are four cases of the voltage *v*1 of *L*1 and the voltage *v*2 of *L*2 depending on the states of *S*1 and *S*3. Using Equations (4) and (5), the equivalent inductance for each case is obtained (Table 1). *M* < 0 in Equation (1), so Table 1 demonstrates that appropriate design of the inversely coupled inductor can reduce the input ripple current of the micro-inverter [15].

**Figure 2.** The equivalent circuit of the inversely coupled inductor *L*B.


**Table 1.** Equivalent inductances in the interleaved boost converter.

The full-bridge converter shares four switches *S*1–*S*4 with the interleaved boost converter, and its input power comes from *CS*. The leakage inductance *Llk* of *T*1 and capacitors *C*1 and *C*2 in the voltage doubler form an LC resonant circuit. The LC resonant current flows through the primary and secondary sides of *T*1 with turns ratio *n*1:*n*2. This current causes the body diode of each switch to conduct before the turn-on gate signal is applied, thus achieving zero-voltage-switching (ZVS) for *S*1–*S*4.

In the voltage doubler, *S*5–*S*8 rectify current on the secondary side of *T*1. When grid voltage is positive, both *S*5 and *S*8 are turned on, and both *S*6 and *S*7 act as diodes. When grid voltage is negative, both *S*6 and *S*7 are turned on, and both *S*5 and *S*8 act as diodes. The energy transferred to the voltage

doubler through *T*1 is stored in *C*1 and *C*2. *C*1 and *C*2 are connected in series, and the output voltage of the micro-inverter is the sum of the voltage *vC*1 of *C*1 and the voltage *vC*2 of *C*2.

In the proposed micro-inverter, variable-switching-frequency control is used, and the output voltage is a sinusoidal grid voltage. However, for simplicity, the analysis is based on the assumption that the micro-inverter generates a constant output voltage with a fixed switching frequency at a certain point in the analysis. In addition, the electrical losses of all components are ignored, and the following conditions are assumed: <sup>2</sup>*π*-*Llk*(*<sup>C</sup>*1 + *<sup>C</sup>*2) > *DTs* and *n*<sup>2</sup>*Lm* >> *Llk*, where *Lm* is the magnetizing inductance and *Ts* is the switching period. The operation cycle *S*1–*S*4 is the same regardless of the polarity of the grid voltage, so the analysis considers only positive grid voltage.

The operating waveforms (Figure 3) of the proposed micro-inverter depend on the duty ratio *D*. First, operational states are analyzed for *D* ≤ 0.5 (Figures 3a and 4).

**Figure 3.** Operating waveforms of the proposed micro-inverter for (**a**) *D* ≤ 0.5 and (**b**) *D* > 0.5.

**Figure 4.** Operating modes when *D* ≤ 0.5.

State 1 (*<sup>t</sup>*0–*<sup>t</sup>*1): At *t* = *t*0, *S*1 is turned on, *vDS*1 = 0, and *iSW*1 < 0. *S*4 remains in the turn-on state, and both *S*2 and *S*3 remain in the turn-off state. For *T*1, the voltage *vLm* across *Lm* is equal to *vCs*, and the secondary voltage *vs* proportional to the turns ratio *n*1:*n*2 is generated on the secondary side of *T*1. The magnetizing current *iLm* is increased and is given by:

$$i\_{Lm}(t) = i\_{Lm}(t\_0) + \frac{v\_{\mathbb{C}s}}{L\_{\mathbb{m}}}(t - t\_0). \tag{6}$$

Resonance is generated by *Llk* on the secondary side of *T*1 and capacitors *C*1 and *C*2, and the state equation is given by

$$L\_{lk}\frac{di\_s}{dt} = n\upsilon\_{Lm} - \upsilon\_{C1\prime} \tag{7}$$

$$
\dot{q}\_s = \mathbb{C}\_1 \frac{dv\_{\mathbb{C}1}}{dt} - \mathbb{C}\_2 \frac{dv\_{\mathbb{C}2}}{dt} = (\mathbb{C}\_1 + \mathbb{C}\_2) \frac{dv\_{\mathbb{C}1}}{dt}.\tag{8}
$$

Using Equations (7) and (8), the secondary current *is* of *T*1 is obtained as

$$i\_s(t) = \frac{n\upsilon\_{Lm} - \upsilon\_{C1}}{Z\_r} \sin[\omega\_r(t - t\_0)],\tag{9}$$

where

$$Z\_r = \sqrt{\frac{L\_{\rm lk}}{C\_1 + C\_2}}\tag{10}$$

is the resonant impedance and

$$
\omega\_{\mathcal{V}} = \frac{1}{\sqrt{L\_{lk}(\mathbb{C}\_1 + \mathbb{C}\_2)}} \tag{11}
$$

is the resonant angular frequency.

> From Equations (6) and (9), the primary current *ip* of *T*1 is obtained as

$$\dot{v}\_p(t) = \dot{v}\_{Lm}(t\_0) + \frac{v\_{\mathbb{C}s}}{L\_m}(t - t\_0) + \frac{n^2 v\_{Lm} - n v\_{\mathbb{C}1}}{Z\_r} \sin[\omega\_r(t - t\_0)].\tag{12}$$

From Table 1, the currents *iL*1 and *iL*2 of the coupled inductor are obtained as

$$i\_{L1}(t) = i\_{L1}(t\_0) + \frac{v\_{IN}}{L\_{eq1}}(t - t\_0), \quad i\_{L2}(t) = i\_{L2}(t\_0) + \frac{v\_{IN} - v\_{\mathbb{C}s}}{L\_{eq1}}(t - t\_0). \tag{13}$$

State 2 (*<sup>t</sup>*1–*<sup>t</sup>*2): At *t* = *t*1, *S*1 is turned off and *S*4 remains in the turn-on state. Both *S*2 and *S*3 remain in the turn-off state. This interval is a dead time to prevent shoot-through before *S*2 is turned on. During this state, the drain-source voltage of *S*1 increases from 0 V to *vCs* and that of *S*2 decreases from *vCs* to 0 V by charging and discharging parallel capacitance across each switch, respectively.

State 3 (*<sup>t</sup>*2–*<sup>t</sup>*3): At *t* = *t*2, *S*2 is turned on, *vDS*2 = 0, and *iSW*2 < 0. *S*4 remains in the turn-on state, and both *S*1 and *S*3 remain in the turn-off state. For *T*1, the voltage *vLm* across *Lm* is 0 V and the voltage *vlk* across *Llk* is –*vC*1. The amplitude of *iLm* remains unchanged during state 3 as:

$$i\_{Lm}(t) = i\_{Lm}(t\_2) = i\_{Lm}(t\_0) + \frac{v\_{Cs}}{L\_m}(t\_2 - t\_0). \tag{14}$$

*is* begins to decrease because the energy stored in *Llk* is transferred to *C*1, and is given by

$$i\_s(t) \cong i\_s(t\_2) - \frac{v\_{\subset 1}}{L\_{lk}}(t - t\_2) = \frac{nv\_{Lm} - v\_{\subset 1}}{Z\_r} \sin[\omega\_7(t\_2 - t\_0)] - \frac{v\_{\subset 1}}{L\_{lk}}(t - t\_2). \tag{15}$$

From Equations (14) and (15), *ip* is obtained as

$$i\_p(t) = i\_{Lm}(t\_0) + \frac{v\_{\mathbb{C}s}}{L\_m}(t\_2 - t\_0) + \frac{n^2 v\_{Lm} - n v\_{\mathbb{C}1}}{Z\_{\mathbb{F}}} \sin[\omega\_r(t\_2 - t\_0)] - \frac{n v\_{\mathbb{C}1}}{L\_{\mathbb{I}k}}(t - t\_2). \tag{16}$$

From Table 1, *iL*1 and *iL*2 are obtained as

$$i\_{\rm L1}(t) = i\_{\rm L1}(t\_2) + \frac{v\_{IN}}{L\_{\rm eq3}}(t - t\_2), \quad i\_{\rm L2}(t) = i\_{\rm L2}(t\_2) + \frac{v\_{IN} - v\_{\rm Cs}}{L\_{\rm eq3}}(t - t\_2). \tag{17}$$

State 4 (*<sup>t</sup>*3–*<sup>t</sup>*4): At *t* = *t*3, *S*4 is turned off and *S*2 remains in the turn-on state. Both *S*1 and *S*3 remain in the turn-off state. This time interval is a dead time to prevent shoot-through before *S*3 is turned on. During this state, the drain-source voltage of *S*4 increases from 0 V to *vCs* and that of *S*3 decreases from *vCs* to 0 V.

The proposed micro-inverter has an interleaved structure, so both the operating principle of the next half cycle for *D* ≤ 0.5 and the operating principle for *D* > 0.5 are the same as the above analysis except for the switches used. Thus, further analysis for the others is not given.

The voltage gain *Gv* of the proposed micro-inverter is twice the product of the boost converter voltage gain and the full bridge converter voltage gain:

$$G\_v = \frac{V\_{grid}}{V\_{IN}} = 2 \cdot \frac{1}{1 - D} \cdot 2nD = \frac{4nD}{1 - D}.\tag{18}$$

## **3. The Proposed Control Schemes**

The main controller (Figure 5) for the proposed micro-inverter takes as analog-to-digital inputs the grid voltage *vgrid*, the grid current *ig*, the input voltage *VIN* and the input current *IIN*. The MPPT controller is based on the perturb and observe (P&O) MPPT algorithm [16]. This controller determines the amplitude of the reference grid current *Ig\_ref* by using *IIN* and *VIN* to maximize solar power generation. In the P&O MPPT algorithm used (Figure 6), *Ig*\_*ref* is increased if Δ*PIN* > 0 and Δ*VIN* > 0 or if Δ*PIN* < 0 and Δ*VIN* < 0. *Ig*\_*ref* is decreased if Δ*PIN* > 0 and Δ*VIN* < 0 or if Δ*PIN* < 0 and Δ*VIN* > 0. This process is repeated until the maximum power point (MPP) is reached, i.e., Δ*PIN* = 0.

**Figure 5.** Block diagram of the main controller for the proposed micro-inverter.

**Figure 6.** The perturb and observe MPPT algorithm.

The phase-locked loop (PLL) generates the phase information |*sin θ\**| by using *vgrid*. In the PLL, virtual voltage *vq*1 is derived from *vgrid* for phase detection.

$$v\_{q1}(s) = G\_{PLL}(s)v\_{grid}(s) = V\_{grid}(-\frac{1}{s+\omega} + \frac{s}{s^2+\omega^2} + \frac{\omega}{s^2+\omega^2}),\tag{19}$$

where *GPLL*(s) is PLL gain and *Vgrid* is the amplitude of *vgrid*.

From the inverse Laplace transform of *vq*1(s),

$$v\_{q1}(t) = V\_{grid}(-e^{\omega t} + \cos\omega t + \sin\omega t) \approx V\_{grid}(\cos\omega t + \sin\omega t),\tag{20}$$

where *ωt* is the actual phase of the grid.

> Using equation (20), the other virtual voltage *vq*2 is obtained as

$$
\upsilon\_{q2}(t) = \upsilon\_{q1}(t) - \upsilon\_{grid}(t) = V\_{grid} \sin \omega t. \tag{21}
$$

*vgrid* and *vq*2 are transformed into the synchronous reference frame as follows:

$$
\begin{bmatrix} \upsilon'\_{g\bar{r}d} \\ \upsilon'\_{q2} \end{bmatrix} = \begin{bmatrix} \cos\theta^\* \sin\theta^\* \\ -\sin\theta^\* \cos\theta^\* \end{bmatrix} \begin{bmatrix} \upsilon\_{g\bar{r}d} \\ \upsilon\_{q2} \end{bmatrix} \tag{22}
$$

where *θ\** is a phase output from the PLL. From Equation (22),

$$\left|\boldsymbol{v}^{\varepsilon}\_{\mathcal{J}^{\rm rid}} = V\_{\mathcal{J}^{\rm rid}} \cos(\omega t - \theta^{\*}) \approx V\_{\mathcal{J}^{\rm rid}}\right. \tag{23}$$

$$
\sigma^{\varepsilon}\_{q2} = V\_{\text{grid}} \sin(\omega t - \theta^\*) \approx V\_{\text{grid}} (\omega t - \theta^\*). \tag{24}
$$

The PLL generates *θ\** to follow ωt through PI control inside the PLL. The reference current signal *ig\_ref* is the product of *Ig\_ref* and |*sin θ\**|:

$$i\_{\mathbb{g}\\_ref} = I\_{\mathbb{g}\\_ref} \left| \sin \theta^\* \right|. \tag{25}$$

The proportional-integral (PI) controller determines the duty ratio variation Δ*D* by using the difference between *ig\_ref* and |*ig*| as follows:

$$
\Delta D = K\_P(i\_{\text{g.ref}} - \left| i\_{\text{g}} \right|) + K\_I \sum (i\_{\text{g.ref}} - \left| i\_{\text{g}} \right|) \tag{26}
$$

Δ*D* compensates for the voltage drop of *Llk*, so that *ig* follows *ig\_ref*. The nominal duty ratio

$$D\_{\rm ll} = \frac{\left| v\_{grid} \right|}{G\_v} = \frac{\left| v\_{grid} \right|}{4nV\_{\rm Cs}} \tag{27}$$

provides stable system dynamics for nonlinear sinusoidal waves which are difficult to control using only Δ*D*. The total duty ratio

$$D = D\_n + \Delta D = \frac{|v\_{grid}|}{4nV\_{\mathbb{C}s}} + K\_P(i\_{\mathbb{g}\dots ref} - |i\_{\mathbb{g}}|) + K\_I \sum (i\_{\mathbb{g}\dots ref} - |i\_{\mathbb{g}}|) \tag{28}$$

where *Dn* is duty ratio generated by the grid voltage and Δ*D* is a duty ratio variation generated by the grid current. *D* is given to the pulse-width-modulation (PWM) controller. The PWM controller generates gate signals for switches to track the reference power.

Operating modes (Figure 7) depend on the grid current level when grid voltage is positive. When *ig* is low, the proposed micro-inverter operates in discontinuous conduction mode (DCM) because *ig* becomes zero before the end of the switching cycle with the period *Ts*. When *ig* is high, continuous conduction mode (CCM) is applied.

If a fixed switching frequency is used for the operating modes, especially the DCM mode, two problems occur: (1) High grid current ripples at low grid currents increase total harmonic distortion (THD); (2) as the output power decreases, the total DCM operating time can increase over the total CCM operating time, and the power conversion efficiency of the micro-inverter can be reduced by high current stress. To solve these problems, this paper proposes two advanced control schemes: Variable-switching-frequency (VSF) control and the advanced burst (AB) control.

**Figure 7.** Operating modes depending on the grid current level during the positive grid voltage.

## *3.1. Variable Switching Frequency Control*

During *Ts*, *is* of *T*1 in DCM and CCM modes vary with *D* (Figure 8). As *D* decreases, the energy stored in *Llk* decreases, so time required to demagnetize *Llk* decreases. Therefore, the micro-inverter is operated in DCM mode. From Equations (9) and (15), the operating condition for DCM is given by

**Figure 8.** Secondary current *is* of the transformer *T*1 depending on the operating mode.

Existing methods to optimize the DCM mode duration have drawbacks. One method is to increase the value of *Llk*; a large *Llk* increases the inductive energy and increases the demagnetizing time, but this solution requires a large transformer with a large number of windings. Another solution is to increase the switching frequency *fs*; this approach can also increase the power density, but high *fs* causes high switching loss. Thus, this paper presents VSF control, which minimizes switching loss without increasing the transformer size. VSF control varies *fs* depending on the magnitude |*ig*| of the grid current.

Fixed-switching-frequency (FSF) control and VSF controls have distinct attributes (Figure 9). FSF control changes only *D* depending on *vgrid* (Figure 9a). In contrast, VSF control changes both *D* and *fs* depending on *vgrid* (Figure 9b). When *vgrid* is near zero, the switching loss is very small because *ig* is close to zero. Therefore, when VSF control is used, *fs* is increased to the maximum switching frequency *fmax* and the time interval between demagnetizings of Llk is reduced (Figure 9b). As *vgrid* increases, *fs* is decreased to the minimum switching frequency *fmin* to reduce switching losses. *fs* is given by

$$f\_s = f\_{\text{max}} - (f\_{\text{max}} - f\_{\text{max}}) \frac{v\_{\text{grid}}}{V\_{\text{grid}}} \tag{30}$$

where *Vgrid* is the peak value of *vgrid.*

**Figure 9.** (**a**) Fixed and (**b**) variable switching frequency controls.
