*2.2. Unified Topology Model*

Figure 6 shows four modes under USPWM based on the conventional H4 full-bridge topology. As shown in (4), the CM voltage, *V*cm, is half the input voltage in PC and NC modes, equaling either input voltage *V*PN or zero in PF mode and NF mode.

**Figure 6.** Four modes of H4 topology under USPWM. (**a**) PC mode; (**b**) NC mode; (**c**) PF mode; (**d**) NF mode.

The CM voltage is not constant at switching frequency, which results in high-frequency leakage current.

$$V\_{\rm cm} = \frac{V\_{\rm AN} + V\_{\rm BN}}{2} = \begin{cases} = \frac{V\_{\rm PN}}{2} & \text{PC mode or NC mode} \\ = V\_{\rm PN} \text{ or } 0 & \text{PC mode or NC mode} \end{cases} \tag{4}$$

To minimize the leakage current, the CM voltage must be kept constant. In PC and NC modes, the CM voltage is equal to half of the DC voltage. Thus, the main objective is to keep the CM voltage also being clamped to half of the input voltage in both freewheeling modes (PF and NF).

$$V\_{\rm cm} = \frac{V\_{\rm AN} + V\_{\rm BN}}{2} = \begin{cases} = \frac{V\_{\rm PN}}{2} & \text{PC mode or NC mode} \\ \cong \frac{V\_{\rm PN}}{2} & \text{PC mode or NC mode} \end{cases} \tag{5}$$

A unified topology model in PF and NF modes, as shown in Figure 7, is proposed [50]. All switches that connect points P and N are <sup>o</sup>ff. A controllable branch BCA ˆ is added to flow positive current in PF mode, as shown in Figure 7c, and another controllable branch ADB ˆ flowing negative current is added in NF mode in Figure 7d. The voltage *V*AB = 0 in PF and NF modes. To regulate the leakage current, a unified topology model should be constructed according to the following four rules in PF and NF modes:

Rule #1. Turn off all the connections to points P and N.

All switches connected to the positive DC bus (point P) and the negative DC bus (point N) must be o ff in the PF and NF intervals.

Rule #2. Short-circuit terminals A and B to ge<sup>t</sup> *V*AB = 0.

A, B is short-circuited through one controllable branch in PF and NF modes. One switch and one diode connected in series are used for bidirectional voltage stress and output current flow, respectively. For example, switch TPF and diode DPF are connected in series for positive current flowing from point B to point A. Switch TNF and diode DNF are connected in series for negative current flowing from point A to point B.

Rule #3. Low cost implementation to satisfy Rule #2.

For low cost, the switches which are not connected to points P and N are on to provide output current flow path in PF and NF modes.

Rule #4. Combine PF and NF modes, and cut o ff the redundant components.

One PF mode and one NF mode implementation are combined to form a topology. The components which are connected in parallel are merged into one as best as they can be. For example, if an extra diode is connected in parallel with the body-diode of a switch, the former is saved to reduce cost, i.e., two switches in parallel are replaced by one switch.

Based on these rules, a systematic methodology called the "MN principle" is proposed, and will be discussed in the following subsection.

**Figure 7.** Four modes based on the unified topology under USPWM. (**a**) PC mode; (**b**) NC mode; (**c**) PF mode; (**d**) NF mode.
