**1. Introduction**

Power electronic converters play a critical role in the energy industry due to their ability to optimally control and condition the power they deliver to a load. In addition, they are required to control and condition the power they draw from energy sources to support their optimal operation. This is achieved by compliance to EMI and harmonic standards such as EN6100-3-2 and efficiency standards such as 80Plus [1]. Soft-switching technologies are a primary enabler for improving efficiency by minimizing switching losses and reducing EMI and harmonics by "soft" ending the edges of the switching transitions [2–12]. References [8] and [9] report soft-switching techniques that includes zero-voltage-switching (ZVS) and zero-current-switching (ZCS). Three-phase rectifiers with active power-factor-correction (PFC) control achieve an improved power factor and lower harmonic content [10–13]. Active PFC rectifiers using a boost (current source) front end achieve better input current wave-shaping and lower harmonic distortion compared to their buck-derived counterparts [14]. Three single-phase PFC rectifiers are used in [15] to synthesize a three-phase PFC rectifier. Reference [16] reports the use of space vector modulation (SVM) to achieve a high power factor in a three-phase six-switch rectifier. Soft-switching techniques employed in three-phase rectifiers are reported in [17–19] to improve efficiency and EMI performance. Soft-switching using a passive lossless snubber is presented in [17]. Although this approach can improve the efficiency, the circuit suffers from higher component stress. In [18], an active snubber is used to achieve soft-switching at the expense of higher control complexity and switching stress in the auxiliary switch. In [19–22], the zero-voltage-transition and control technique was applied in a three-phase PFC rectifier. Although the main switches can achieve ZVS at turn-on, the auxiliary switch was hard-switched operated at turn-off.

A conventional three-phase six-switch PFC rectifier is shown in Figure 1. A novel soft-switched three-phase active rectifier using an active auxiliary circuit is proposed in this paper. The principal performance improvement is the achievement of ZVS at turn-on for the six rectifier switches and ZCS at turn-off for the one auxiliary switch. A detailed description of the operation of the proposed soft-switched rectifier is presented in Section 2. Validation of the design through simulation and experimental results are shown in Section 3 followed by concluding remarks in Section 4.

**Figure 1.** A conventional three-phase six-switch power-factor-correction (PFC) rectifier.

#### **2. Proposed Three-Phase Six-Switch Soft-switching PFC Rectifier**

The proposed three-phase six-switch soft-switching PFC rectifier is shown in Figure 2. The circuit inside the dotted box is a soft-switching assist circuit to achieve ZVS in the main switches and ZCS in the auxiliary switch. The soft-switching assist circuit consists of the auxiliary switch *SA*, resonant inductor *LR*, transformer *Tr*, barrier diode *DR1*, clamp circuit *RC–DC–CC*, and resonant capacitor (the capacitance employs the parasitic capacitance of main switch).

**Figure 2.** The circuit of the proposed soft-switching PFC rectifier.

Three phase line voltages *VRN*, *VSN*, *VTN* for a balanced three-phase system are shown in Figure 3. The 60◦ symmetry in the three-phase voltages is evident from Figure 3. The operation of the three-phase PFC using the 60◦ symmetry is described in detail in [11].

**Figure 3.** The line cycle in three-phase balance power system.

In order to simplify the analysis, Interval 1 (0◦–60◦) can be selected for the analysis of the switching cycles as the operation over the rectifier is identical in the other 60◦ segments. The following assumptions are made to support the operating analysis:


Under the assumptions listed above, the simplified circuit diagram is shown in Figure 4 and the voltage polarity and current direction for each main component are defined.

**Figure 4.** The simplified circuit of the proposed soft-switched rectifier.

A detailed description of circuit operation is provided in this section. The key waveforms of the circuit for Interval 1 are shown in Figure 5, and equivalent circuits for each operating mode are shown in Figure 6. There are 12 operating modes to be analyzed over a switching cycle.

#### *2.1. Mode 0: (t* - *T0)*

This mode is based on the analysis of the switching cycle in Interval 1 (*VRN* > 0, *VTN* > 0, and *VSN* < 0). Before *T0*, as in Figure 6a, the diode *D*1, *D*6, and *D*5 are in the state of conduction. The main switches *S*1 to *S*6 and auxiliary switch *SA* are turned off. The currents *iR* and *iT* flow through diode *DB* to the load and return to the AC source as the current *iS*. Under this condition, the voltage across the active rectifier bridge is *VX* = *VO*.

**Figure 5.** The key waveforms of the proposed soft-switched rectifier.

*2.2. Mode 1 (T0 < t* - *T1)*

At *T0*, the auxiliary switch *SA* is turned on to go into Mode 1. The current *i*1 of resonant inductor *LR* starts to increase, and current *i*1 flows through the primary winding *N*1 of the transformer *Tr*. The induced current *i*2 and excitation current *im* outflow through secondary coil *N*2, as shown in Figure 6b. The voltage on the seconding winding *N*2 is the output voltage *VO*. The voltage *V*1 and *V*2 across the windings of transformer *Tr* are obtained as follows:

$$V\_2 = V\_O \tag{1}$$

$$V\_1 = \frac{N\_1}{N\_2} V\_2 = nV\_O \tag{2}$$

The current in the resonant inductor *i*1 increases linearly with the slope given by

$$\frac{di\_1}{dt} = \frac{V\_O - V\_1}{L\_R} = \frac{V\_O - nV\_O}{L\_R} = (1 - n)\frac{V\_O}{L\_R} \tag{3}$$

Similarly to *i*1, the excitation current *im* also displays a linear increase, and the slope is

$$\frac{di\_m}{dt} = \frac{V\_O}{L\_m} \tag{4}$$

When the current *i*1 ascends to *iS* current, this mode ends. The time interval is given as below:

$$t\_{01} = \frac{\dot{t}\_s}{V\_o(1-n)L\_R} \tag{5}$$

**Figure 6.** Operation modes of the proposed soft-switched rectifier.

*2.3. Mode 2 (T1 < t* - *T2)*

At *t* = *T*1, the DC link diode current *ib* reaches zero. The reverse recovery current of diode *DB* flows through diode *DB* in a negative direction. The resonant inductor current keeps increasing, as shown in Figure 6c.

*2.4. Mode 3 (T2 < t* - *T3)*

At *t* = *T*2, the parasitic capacitance of diode *Db* along with the resonant capacitor *CR*, which includes the parasitic capacitor of the main switches and the resonant inductor *LR*, start resonating, as

shown in Figure 6d. When the equivalent voltage *VX* of the main switch is decreased to zero at *t* = *T*3, the mode ends. The equivalent voltage *VX* and resonant current *i*1 are shown in Equations (6) and (7).

$$V\_X = V\_O - (1 - n)V\_O(1 - \cos(\omega\_R t))\tag{6}$$

$$i\_1 = i\_s + i\_{RR} + \frac{(1 - n)V\_{\mathcal{O}}}{Z\_{\mathcal{C}}} \sin(\omega\_R t) \tag{7}$$

$$\mathbf{C}\_{R} = \mathbf{C}\_{2} + \mathbf{C}\_{3} + \mathbf{C}\_{4} \tag{8}$$

$$
\omega\_R = \frac{1}{\sqrt{L\_R \left(\mathbf{C}\_R + \mathbf{C}\_b\right)}}\tag{9}
$$

$$Z\_{\mathbb{C}} = \sqrt{\frac{L\_{\mathbb{R}}}{\mathbb{C}\_{\mathbb{R}} + \mathbb{C}\_{b}}} \tag{10}$$

#### *2.5. Mode 4: (T3 < t* - *T4)*

When *t* > *T*3, the bridge rectifier voltage *VX* is decreased to zero and the auxiliary switch *SA* continues to conduct. The corresponding equivalent circuit is shown in Figure 6e. The body diodes *D*4, *D*3, and *D*2 of the main switches *S*4, *S*3, and *S*2 are conducting. Turning on the main switches *S*4, *S*6, and *S*2 when the bridge voltage reaches zero achieves ZVS turn-on. The detection circuitry to turn on the main switches at zero voltage also enables the minimization of duty-cycle loss and, thus, loss of efficiency. After the main switches turn on at ZVS, the resonant inductor current *i*1 decreases linearly with the slope given by Equation (11). When the current of the main switches *S*4 and *S*2 reaches zero at *t* = *T*4, the mode ends.

$$\frac{di\_1}{dt} = -\frac{nV\_O}{L\_R} \tag{11}$$

#### *2.6. Mode 5: (T4 < t* - *T5)*

As shown in Figure 6f, when *t* > *T*4, then *S*4, *S*6, and *S*2 keep conducting. The current *il* is continuously decreased to zero until *t* = *T*5.

#### *2.7. Mode 6: (T5 < t* - *T6)*

When *t* > *T*5, the input currents *iR* and *iT* flow through the main switches *S*4 and *S*2, as shown in Figure 6g. When the current *ia* flows through the auxiliary switch *SA*, it consists mostly of the magnetizing current, *im*, of the transformer. If the magnetizing inductance *Lm* is designed to be relatively large, the current i*a* of the auxiliary switch *SA* is extremely close to zero. When *T*5 < *t* - *T*6, the auxiliary switch is set to be turned off so that it can effectively achieve the purpose of ZCS.

#### *2.8. Mode 7: (T6 < t* - *T7)*

When *t* = *T*6, the auxiliary switch *SA* is turned off, as shown in Figure 6h. Subsequently, the magnetizing current *im* of the transformer charges the parasitic capacitance *Coss1* of the auxiliary switch *SA* so that the auxiliary switch voltage will increase continuously.

#### *2.9. Mode 8: (T7* - *t* - *T8)*

At *t* = *T*7, the auxiliary switch voltage *VSA* increases to *VO* + *VC* and the clamp diode *DC* is conducting. The magnetizing current *im* discharges through the clamp circuit *DC*–*VC*, as shown in Figure 6i. The slope of the excitation current in this mode is given by

$$\frac{d\dot{i}\_m}{dt} = -\frac{V\_\odot}{L\_m} \tag{12}$$

*2.10. Mode 10: (T8* - *t* - *T9)*

At *t* = *T*8, the magnetizing current *im* is decreased to zero which resets the transformer, as shown in Figure 6j.

*2.11. Mode 10: (T9 < t* - *T10)*

At *t* = *T*9, the main switch *S*4 is turned off. The input current *iR* charges the parasitic capacitance of the main switch *S*4 and the equivalent voltage *VX* of the main switch is increased, as shown in Figure 6k.

*2.12. Mode 11: (T10* - *t* - *T11)*

At *t* = *T*10, the equivalent voltage *VX* of the main switch is increased to *VO* and the diode *DB* is conducting as shown in Figure 6l. Subsequently, the antiparallel diode *D*1 of the main switch *S*1 is conducting. The input current *iR* flows through diodes *D*1 and *DB* and flows back from *iS* through the load.

*2.13. Mode 12: (T11* - *t* - *T12)*

At *t* = *T*11, the main switch *S*2 is turned off. The input current *iT* starts to charge the parasitic capacitance of the main switch *S*2, as shown in Figure 6m.
