*5.1. Basic System Operation*

Referring to Figure 3d, simulations were carried out to verify the feasibility of the proposed SSBBI in PSIM software. The key simulation parameters were: Output power *Po* = 200 W, input voltage *Vin* = 48 V, output voltage *vo* = 110 V/60 Hz, switching frequency *fs* = 20 kHz, tapped-inductor magnetizing inductance *Lm* = 150 μH, turns ratio *n* = 1.5, and output capacitance *Co* = 2 μF. Several control strategies can be applied to control the proposed SSBBI. Initially, to validate the basic operational principle, the simple open-loop SPWM was used. Simulation results are shown in Figure 7, which demonstrates that the SSBBI can generate the desired output voltage. This provides proof of concept of the proposed circuit family for single-stage microinverter applications.

Furthermore, as can be observed in Figure 7a, the circuit simulation results (key waveforms) were in a close agreemen<sup>t</sup> with the analytical results in Figure 5. The gate-driving signals are further shown in Figure 7b to demonstrate the controllability of the converter. Moreover, the output voltage of the proposed inverter is given in Figure 7c, as well as the voltage across the switches. It can be observed in Figure 7c that the SSBI can produce high-quality sinusoidal outputs, and the voltage stresses on the switches were also in consistency with the analysis. Additionally, the currents flowing through the power devices under the 200-W output power are presented in Figure 7d, which again agrees with the theoretical analysis presented in Section 4.

**Figure 7.** Key simulation waveforms of the proposed SSBBI: (**a**) Driving signal and currents on the switching period scale; (**b**) driving signals for switches; (**c**) *Vds* of the switches in one leg, input, and output voltage; (**d**) switch currents on the output period scale.

The analytical results were further verified by simulations. Key simulated waveforms of the proposed topologies in Figure 3a–c are shown in Figure 8. It is observed in Figure 8 that all the topologies of the proposed family can generate a good-quality sinusoidal output voltage. Simulations also support the theoretically predicted results of the current stress analysis. When comparing the performance of the topologies in Figure 3a–c with the SSBBI, it can be seen that the four topologies had similar high-quality output voltage waveforms and the comparable current stress at the same output power. However, the SSBBI had the lowest semiconductor count and the easier driver implementation, which proved again the competitiveness of the SSBBI in the family.

**Figure 8.** Simulation waveforms of the input voltage, output voltage, and switches' current of the variant topologies: (**a**) Figure 3a, (**b**) Figure 3b, (**c**) Figure 3c.

#### *5.2. Comparison of the Proposed Single-Stage, Buck-Boost Inverter Family*

To better appreciate the merits of the proposed single-stage inverter family, a detailed comparison of the proposed topologies is conducted in this section. The voltage conversion ratio of the proposed family and its derivation under the assumption of the CCM operation is summarized in Table 5. The benchmarking of the proposed topologies' voltage conversion ratio with the same turns ratio *n* = 2 is further shown in Figure 9a and with the same duty ratio *D* = 0.5 in Figure 9b. According to Table 5 and Figure 9, the SSBBI had the largest voltage gain in the family. The peak voltage stress analysis was performed and is summarized in Table 6. Lastly, Tables 7 and 8 present the results of the peak current and the RMS current stress analysis of semiconductor devices. As can be seen from Tables 6–8, the voltage and current stresses of the SSBBI were comparable to other topologies in the family. Moreover, as mentioned previously, the SSBBI component count was lower by one or two diodes. Thus, the SSBBI had the optimum circuit composition and characteristics in the family.

**Table 5.** Comparison of the voltage conversion ratio of the proposed topologies.


**Figure 9.** Comparison of the voltage conversion ratio, *M*, of the proposed single-stage inverter family: (**a**) As function of the duty ratio *D* (for *n* = 2), (**b**) as function of the turn ratio *n* (for *D* = 0.5).

**Table 6.** Comparison of the voltage stress.



**Table 7.** Comparison of the peak current stress.



## **6. Experimental Results and Discussion**

## *6.1. Experimental Results of SSBBI*

A 100-W laboratory prototype of the proposed SSBBI was built and tested. The key operation parameters were: Input voltage, *Vin* = 48 V; output voltage, *vo* = 110 V/60 Hz; and switching frequency, *fs* = 20 kHz. The prototype's view and the components arrangemen<sup>t</sup> are shown in Figure 10. The board was designed larger to reserve additional space needed for experimenting with various snubbers and control schemes. The main components of the prototype are summarized in Table 9. The tapped inductor was designed according to the design guide provided by Magnetics-Inc [31], including the magnetic core, the turns, and the wire. A dSPACE system was used to implement the control for the quick experimental study of the SSBBI.

**Figure 10.** Photo of the experimental prototype of the proposed SSBBI.


**Table 9.** Main components of the prototype of the proposed SSBBI.

Experimental results are shown in Figures 11 and 12. Figure 11 presents the gate-driving signals for switches at the line period scale and at the switching period scale, respectively. The output voltage and the switch voltage are shown in Figure 12. Observations in Figure 12 clearly indicate that the output voltage was sinusoidal. The THD of the experimental output voltage was around 5% with the open-loop control. This verified that the experimental SSBBI prototype operated according to the theoretical expectations. That is, the proposed SSBBI can achieve the inversion and produce a high-quality sinusoidal output.

**Figure 11.** SSBBI's driving signals: (**a**) At the line period scale, (**b**) during positive half-line cycle (at switching period scale), (**c**) negative half-line cycle (at switching period scale).

**Figure 12.** Experimental waveforms of *Vds*2, *Vds*1, *Vin*, and *vo*: (**a**) At the line period scale, (**b**) at the switching period scale.

In addition, as shown in Figure 12, when zooming into the switch voltage waveform, it was revealed that a voltage spike appeared at the instant of the switch turning <sup>o</sup>ff. This is typical for converters with coupled inductors [32]. For the first version of the prototype, a simple RCD snubber was used to verify the basic operation principle of the proposed topologies. The efficiency of 75% was achieved with 100-W output power, where the RCD snubber accounted for a large portion of the total power losses. Moreover, the voltage spike can be suppressed with an appropriate snubber arrangemen<sup>t</sup> and design to capture and recycle the leakage energy to achieve much higher efficiency according to the analysis. Snubber details and verification are the subjects of the follow-up research work. What is more, the voltage gain was slightly lower than the theoretical one due to the power losses. With the planned regenerative snubber, the power losses will be less and, thus, the practical voltage gain should be closer to the theoretical one. Overall, the simulation and experimental results were in agreemen<sup>t</sup> with the theoretical analysis. Thus, the effectiveness of the proposed inverter family was verified, which had the merits of single-stage conversion, low component count, and easy implementation. These advantages are significant from PV applications, while the efficiency should be further enhanced.

#### *6.2. Comparison of the SSBBI and the State of the Art*

After the preliminary experimental test of the SSBBI prototype, the non-optimized performance of the SSBBI could be compared with its counterparts. The comparison results are shown in Table 10. According to Table 10, it is known that the SSBBI had the lowest semiconductor count, almost half of its counterparts. The lower component count makes the SSBBI a simple structure, requiring simpler driving and auxiliary power supplies. These advantages will lead to lower cost, which is a practical concern for the microinverters.


**Table 10.** Comparison of the SSBBI with the state of the art.

The efficiency performance of the SSBBI was not outperforming, as mentioned previously. With the theoretical analysis and simulations, the power losses on the RCD snubber were around 15%. Thus, with a proper regenerative snubber, the efficiency will be more than 85% as predicted, where component optimization can further be applied to improve the efficiency. Nevertheless, the efficiency of 85% will be reasonable for a 100-W, single-stage, buck-boost inverter and comparable with the experimental efficiency in [25].
