*4.5. Resampling*

As previously described, to correctly measure a synchrophasor, the input signals must be synchronously sampled with the UTC. In the considered prototype, the sampling time instants are asynchronous with UTC, so they cannot be used directly for synchrophasor calculation for different reasons: (1) the number of samples is different from nominal value (128 samples) in each 20 ms frame, (2) the actual number of samples that corresponds to 20 ms is not an integer number of samples and (3) the first sample of each frame is not aligned with an event of TB. Therefore, the desynchronized acquired signal is resampled with linear interpolation: we can calculate an approximation of the synchronized sample by interpolating the two acquired samples that are closer to the desired time position. Obviously, a more complex interpolation technique can improve the overall accuracy of the instrument. The first step for the resampling is to put in relation the desynchronized and synchronized time instants. The synchronized time instants *ts*(*i*) can be easily obtained starting from TB events, with a uniform spacing of *Tc* = 20 ms/128 (see Figure 9). The desynchronized time instants, *td*(*j*), are spaced of sampling period *Ts*[*k*] estimated in the *k*-th frame. The data needed for estimating *Ts*[*k*] are collected by the TB ISR in CI and they are placed in a dedicated queue. In particular, CI includes:


**Figure 9.** Resampling of voltage signal; actual samples are interpolated in desired instants of time.

So *Ts*[*k*] can be estimated as:

$$T\_s[k] = \frac{L\_{tick}[k] - L\_{tick}[k-1]}{N[k]} = \frac{1}{f\_s[k]} \tag{5}$$

where *fs*[*k*] is the sampling frequency estimated in the *k*-th frame. With this information, it is possible to find out what are the nearest acquired samples, by calculating where the synchronized samples should be "virtually" located in the acquisition buffer. These "virtual locations" of the i-th synchronized sample, *ni*, come out by dividing the synchronized time instants, *ts*(*i*) = *i*·20 ms, by the measured sampling period, *Ts*[*k*]:

$$m\_i = \frac{t\_s(i)}{T\_s[k]} = i \cdot \frac{20 \text{ ms}}{T\_s[k]} = m\_i.d\_i \tag{6}$$

where *ni* are not-integer indexes, with an integer part, *mi*, and a decimal part, *di*. Thus, the i-th synchronized sample should have been acquired between the actual acquired samples, that are at indexes *mi* and *mi* + 1 of the buffer, with a normalized distance from the former of 0.*di* and with a distance

from the latter of 1 − 0.*di* (see Figure 4). Therefore, an estimation of the *i*-th synchronized sample, *sR*(*i*), can be calculated as average of two nearest samples weighted according relative distances thus:

$$s\_{\mathbb{R}}(i) = s(m\_i) \cdot (1 - 0.d\_i) + s(m\_i + 1) \cdot 0.d\_i \tag{7}$$

where *s*(*mi*) and *s*(*mi* + 1) are two subsequent acquired samples, closest to the *i*-th synchronized time instants (see Figure 9). With this approach, 512 synchronized samples are calculated so that, the first half is taken before, and the other half is taken after each synchronized TB event.

#### *4.6. Synchrophasor Calculation*

To estimate the synchrophasor, di fferent techniques were proposed [13–19] in scientific literature. Most of them are eligible to be implemented in the proposed prototype; for this paper, the technique based on interpolation in the frequency domain is chosen [14]. The algorithm starts with calculating Discrete Fourier Transform (DFT) of resampled values. These samples are synchronous with absolute time but, in general, asynchronous with respect to the power system frequency. Thus, none of the calculated spectral components exactly matches with the fundamental components of the acquired signals. Nevertheless, its actual amplitude, phase angle and frequency can be evaluated by interpolating the obtained spectral components. This procedure can be adopted on the assumption of negligibility of the spectral leakage e ffects due to other sinusoidal components and due to spectral replica at negative frequency. This assumption can be made adopting an opportune window like Hanning window that has good performance, relatively to attenuation of spectral leakage [14]. For the case at hand, the e ffect of negative replica results to be prevalent and iterative estimation procedure was adopted to make this effect negligible.

#### *4.7. Execution Times*

All the execution times of the di fferent routines of the implemented firmware have been measured. In particular, the maximum reporting rate has been considered, that is 50 Hz, and an observation interval of four cycles of nominal power frequency (50 Hz) has been used. Each execution time has been measured in this way: a digital pin of the microcontroller has been set to high value just before the execution of the specific routine and again set to low value just after the routine execution; the duration of the obtained pulse was measured with the 12-bit Lecroy MDA810 digital storage oscilloscope. The results are as follows: (1) PID routine takes 1.6 μs every 1 s, (2) TB routine takes 2.5 μs every 20 ms (50 times a second), (3) oversampling and averaging take 3 μs every 156 μs (6400 times a second), (4) extraction from queue routine takes 2.2 μs every 20 ms (50 times a second), (5) time domain interpolation takes 6.8 ms every 20 ms (50 times a second), (6) IpDFT takes 560 μs every 20 ms (50 times a second). Summarizing, the total execution time is 7.8 ms for the two channels, i.e., quite lower than 20 ms, which is the time interval between two reporting instants.

#### **5. Experimental Results**

The realized PMU prototype has been tested with a high performance PMU calibrator, the Fluke 6135A/PMUCAL.

A metrological characterization of the calibrator has been performed, by some of the authors, in [38]. It is able to give reliable results down to values of 0.012% for TVE, 0.6 mHz for Frequency Error (FE) and 0.07 Hz/s for Rate of change of Frequency Error (RFE), in the various test conditions of [2,3].

The presented prototype has been tested in several testing conditions, both for class P as well as for class M PMUs, as prescribed in [2,3], for rated voltage of 230 V and rated current of 10 A. The chosen testing conditions are:

1. Sinewaves with o ff-nominal frequency deviations within ±2 Hz (class P) and ±5 Hz (class M);


Results of the experimental tests are summarized in Table 1 (class P) and Table 2 (class M). They were obtained using an observation interval of four nominal 50 Hz cycles and a reporting rate of 50 fps. For sake of brevity, only results relative to voltage channel are presented; similar values have been obtained also for current channel.

**Table 1.** Maximum measured (Meas.) TVE, FE and RFE, and the corresponding limit values, in various testing conditions reported in IEEE Standards for Class P PMUs. The reported results refer to observation intervals of four nominal cycles and reporting rate of 50 fps.


**Table 2.** Maximum measured (Meas.) TVE, FE and RFE, and the corresponding limit values, in various testing conditions reported in IEEE Standards for Class M PMUs. The reported results refer to observation intervals of four nominal cycles and reporting rate of 50 fps.


The IpDFT algorithm generally shows good performance in steady-state conditions, in particular in presence of harmonics and inter-harmonics. Nevertheless, the performance is worse in dynamic conditions (with frequency ramp and especially with amplitude and phase modulations). These results are essentially due to the static phasor model at the base of the IpDFT and become worse with the increase of the time observation window.

However, it can be seen that the TVE, FE and RFE are below the standard limits for practically all the testing conditions, except for the out-of-band interharmonic, where both TVE and FE are over the limit, and for the frequency ramp for class M, where the RFE is slightly worse (0.21 Hz/s) than the limit (0.20 Hz/s).

These results are particularly relevant especially if compared with the results shown in [38], where the experimental characterization of the IpDFT algorithm is performed using a high-performance measuring hardware, constituted by a PXI controller, 16-bit data acquisition system, high accuracy class voltage and current transducers and a synchronization board acting as GPSDO.

The performance here shown is, as expected, worse, due to the intrinsic poor performance of the hardware here used; however, some situations, where errors are near (or over) the limit, are highlighted also in [38], thus depending essentially on the used estimation algorithm.
