**3. Fabrication**

The fabrication processes are depicted in Figure 2a. Polyethylene terephthalate (PET) fabric was used as a substrate. The PET fabric was woven with PET fibers with a diameter of 200 μm. Before starting the processes, the PET fabric was pre-shrunken by heating at 150 ◦C for 3 h to avoid deformation as well as to minimize misalignment due to the shrinkage caused by the subsequent thermal processes. Then, the PET fabric was attached to a carrier glass using UV-detachable glue, and the edge sides of the substrate were strongly fixed on the glass with adhesive tape. This prevented the various chemicals from swelling the fabric during the subsequent processes and also the substrate from being deformed under high-temperature processes.

The rough surface of the PET fabric was smoothed by a special planarization process using a double layer of polyurethane (PU) and photo-acryl (PA) [22,23]. The surface roughness was reduced from 10 μm to 0.3 μm, which was suitable for fabricating devices on, because the high surface roughness was likely to disconnect thin devices, meanwhile, a small surface roughness can be continuously covered with thin OTFT and OLED devices. Subsequently, aluminum was evaporated on the smoothed fabric and patterned by photo-lithography for the gate electrodes of the OTFTs and scan bus lines. In addition, PA was spin coated for the gate dielectric layer of the OTFTs. The performance of the OTFTs strongly depended on the compositional ratio of the solvent in PA solution, and thus, a proper ratio was determined in order to produce a high performance. The results are discussed in the next section. Since the PA had a self-patterning ability, the layer was patterned for the gate area by exposing it to UV through a mask without a photoresist process.

As described in the previous section, the OTFT performance needed to be improved in order to supply a large on-current to the enlarged OLED in the stacked AMOLED. Therefore, the source and drain (S/D) contacts of the OTFTs used hybrid electrodes consisting of carbon nanotubes (CNTs) and Au because they produced the lowest contact resistance (2.9 K·cm) due to the work function modulation of CNTs with the deposition of Au on the CNTs. This resulted in a large on-state current. The detailed structure and the characteristics of the hybrid electrodes can be seen in Reference [24]. A CNT solution was spray-coated on the whole PA layer and then Au was evaporated with a thickness of 5 nm. The S/D electrodes were patterned using a photo-lithography process. By evaporating pentacene through a shadow mask for SW and DR OTFTs, the processes for the OTFTs' pixel circuit layer was completed.

(**a**) 

(**b**) 

**Figure 2.** (**a**) The fabrication processes for the AMOLED panel using the stacked pixel and (**b**) a picture of two AMOLED panels, using the stacked and the side-by-side pixels, fabricated on a polyethylene terephthalate (PET) fabric substrate with the various test elements included.

As described in the previous section, a PL was deposited on the OTFTs' circuit layer to stack the OLED above it. To achieve the requirements as described in the previous section, the PL consisted of three polymer layers, including a water-soluble poly-vinyl alcohol (w-PVA), dichromated-PVA (d-PVA), and a PA. The w-PVA was applied to protect the pentacene OTFTs from being damaged by the organic solvents from the PA. The water solution did not affect the pentacene due to their different hydrophobicity. The d-PVA was used to pattern the w-PVA. The PA protected the double PVA layers and the OTFTs from the effects of the OLED process.

The w-PVA solution was prepared by mixing well 3 wt % PVA molecules with deionized (DI) water. The PVA solution was spin-coated on the panel containing the OTFTs' circuits at 1000 rpm for 20 s and dried for 30 min in air. Subsequently, the d-PVA solution, which was formulated by mixing ammonium dichromate of 0.03 wt % with the w-PVA solution, was spin-coated on the w-PVA film

at 1000 rpm for 20 s and dried for 30 min in air. The total thickness of the PVA double layer was approximately 5 μm. The double PVA layers were exposed to UV for 1 min through a chrome mask and developed using DI water. The developed PVA film was baked at 60 ◦C for 10 min. Additionally, the PA solution with the same mixing ratio as the gate dielectric was spin-coated on the developed PVA film at 1000 rpm for 20 s and softly baked at 90 ◦C for 10 min. The thickness of the PA was about 1 μm. The PA film was patterned via-holes to interconnect the OTFTs to the OLED by exposure to UV for 30 s, developed for 40 s, and then hard-baked at 130 ◦C for 60 min.

Silver was evaporated on the patterned PA layer for the anode electrodes of the OLED, and another PA was spin-coated on the Ag electrodes and patterned to define the OLED area. Subsequently, the OLED layers were sequentially evaporated through a shadow mask, and the transparent cathode electrodes were evaporated above the OLED with 4,4'-bis(N-phenyl-1-naphthylamino) NPB) (40 nm)/Ag (20 nm)/Al (1 nm) layers. Finally, an encapsulation layer consisting of w-PVA and PA was spin-coated on the panel. The final AMOLED panel was detached by exposing it to UV through the carrier glass. Figure 2b shows the detached AMOLED panel picture, including the stacked AMOLED and the side-by-side AMOLED panel for comparison and the various test elements such as the discrete OTFTs, the OLED, and pixels.
