*3.5. Cauer Element Values*

τ

The previously presented heating curves were obtained with the Foster ladder CTMs because of the straightforward implementation of the mathematical formulas to compute thermal responses. However, as demonstrated in [33], the element values of these models cannot have any physical interpretation because they contain a chain of capacitors linking the diode junction to the ambient, which implies an immediate propagation of thermal responses through the entire module. Therefore, the CTMs were converted to the mathematically equivalent Cauer ladders, which have all their capacitors connected to the thermal ground, so their element values can have some physical interpretation. The conversion was carried out using the algorithm proposed in [34]. The CTM element values for the modules with the standard thermal pad and the doubled one are given in Tables 1 and 2 respectively.


**Table 1.** Cauer ladder element values for the standard thermal pad.

**Table 2.** Cauer ladder element values for the double thermal pad.


The largest time constants of around 3 min contribute over 40% of the thermal resistance in the heating device, and they correspond to the heat exchange with the ambient. These time constants are the only ones present in the responses of the remote diodes, and as mentioned before, the one-stage CTMs generated for these remote diodes can be used for simulations of the thermal couplings between the heating diode and other LEDs, as it was proposed for multi-chip modules in [35]. The time constant around a couple of seconds reflects the heat conduction through the MCPCB and it contributes the least portion to the total thermal resistance. The time constant of just over 20 ms models the interface between the package and the board and the thermal capacitance of this stage equal to around 3.5 mJ/K could be possibly attributed to the diode package. Finally, the shortest time constant of just below 200 μs can be associated with the semiconductor die. Then, the resistance is the junction to the solder point one, given in the datasheets (typically 8 K/W for this device), and the thermal capacitance of the die is equal to almost 30 μJ/K. This value corresponds well to the plateau in the thermal structure functions presented in Figure 4a. Comparing the tables for the standard size thermal pad and the doubled one, it is visible that the major difference arises for the time constants around a few seconds, where both the resistance and capacitance values are noticeably lower for the module with the larger thermal pads, hence confirming that the generated heat is more effectively evacuated from the package to the board.
