*5.1. Implementation Flow*

## 5.1.1. Input Vector Dependent Timing and Power Analysis

As explained in Section 4.2, the time and power required by a functional unit to complete an operation execution is different from one instruction to another. Here, we use the flow illustrated in Figure 11a to extract the detailed timing and power information for each instruction. Therefore, for an ALU as a case study the following steps are performed:


The change in the leakage power from one instruction to another is negligible because even the inactive gates that are not part of the propagation paths are leaking. However, if the execution time is different from one instruction to another, the amount of the leakage energy would be different proportionally. The dynamic energy for each instruction is also calculated based on the dynamic power value.

## 5.1.2. Functional Unit Partitioning Flow

Figure 11b shows the overall flow of the proposed functional unit partitioning method applied to an ALU. The flow consists of three distinct steps:


**Figure 11.** Implementation flows of (**a**) instruction multi-cycling, (**b**) functional unit partitioning applied to an ALU. (**a**) Implemented flow for obtaining the timing and power information of each ALU instruction, in the instruction multi-cycling approach. (**b**) Implemented flow of the proposed functional unit partitioning for ALU optimization.
