*Article* **Validation of Forward Voltage Method to Estimate Cracks of the Solder Joints in High Power LED**

**Federica Pinti 1,\* , Alberto Belli <sup>1</sup> , Lorenzo Palma <sup>1</sup> , Massimo Gattari <sup>2</sup> and Paola Pierleoni <sup>1</sup>**


Received: 29 April 2020; Accepted: 27 May 2020; Published: 1 June 2020

**Abstract:** The Light Emitting Diode (LED) has many advantages compared to traditional lamps, such as a long lifetime, color rendering and energy saving. It requires good thermal management, since as the temperature increases, the lifetime decreases. Furthermore, the presence of cracks in the Solder Joint of an LED (SJL) compromises the correct dispersion of heat and causes the joint fatigue. This can lead to a decrease in the lifetime of the assembled LED. In this study, we validated that an SJL can be considered faulty if the Forward Voltage (Vf) acquired before and after thermal cycles increases by more than 2%. The voltage measurement method was validated by comparing the results with the techniques commonly used to evaluate the defects of a solder joint as the X-ray analysis and the metallographic section. The failure analysis results present the probability of failure and the lifetime of the SJL achieved by analyzing the data using the Norris–Landberg Model. The lifetime calculated over 1800 SJLs considered in the validation process is greater than 20 years for 95.9% of the tested LEDs.

**Keywords:** LED; thermal cycling test; accelerated test; solder joint; cracks

#### **1. Introduction**

In the last few decades, the Light Emitting Diode (LED) has become an important competitor for traditional light sources such as incandescent or fluorescent lamps. LED lighting is currently the best light source with respect to its impact on the environment and less consumption of energy with respect to traditional light sources [1,2]. LED technology leads to innovative solutions that traditional lamps can not achieve. It allows the ability to create complex lighting systems for various scenarios, such as smart city [3,4] or smart lighting in the cultural heritage field [5]. Long-term analysis of lighting performance can be conducted by studying lighting parameters, such as luminous flux and the correlated color temperature, which can be controlled and monitored in real time [6]. Despite the investment costs, LEDs offer a longer life and the luminous flux is more constant over time compared to other technologies. In fact, LEDs represent the best solution in interior lighting applications such as homes and offices, and in the automotive sector for high brightness signals such as lights and traffic lights.

In general, different approaches can be used to predict the lifetime of electronic components [7,8]. In lighting, thermal management is the fundamental aspect to guarantee constant yields over time and a high performance of the LED. When temperature increases, several aspects are affected: the light color emitted changes, intensity decreases, and lifetime reduces [9]. Durability and reliability tests, such as thermal and power tests, are generally very expensive, therefore accelerated tests are widely used [10]. Accelerated tests reduce test and response times by accelerating the identification of

design and fatigue defects. Among standard tests proposed to characterize the solder joint fatigue, the Thermal Cycling Test (TCT) is the most widely used by the scientific community [11].

One of the most relevant problems of LED behavior in lighting systems is the solder joint fatigue between Printed Circuit Board (PCB) and the LED [12]. In literature, many works deal with the Solder Joint of LED (SJL) reliability. The main methods of analyzing the solder joint lifetime are based on strain density [13], on junction temperature measurement [14], or on the effect of voids [15].

One of the main challenges in studying the solder joints fatigue is to detect cracks and monitor their propagation [16]. The SJL strongly depends on the different components of the device such as the LED type, the soldering paste, the substrate, and the finish. In particular, cracks develop due to the large variation of the Coefficient of Thermal Expansion (CTE) between LED and PCB. The presence of cracks is quite complicated to characterize as they are difficult to identify through a non-destructive method [17,18]. Scanning Electron Microscopy (SEM), cross scanning, and dye-and-pry cannot be used for in situ monitoring of the cracks because they all are destructive methods [17].

In the study of Zhao et al. [19] a model enables the analysis of the thermal–mechanical performance of solder interconnects. The experiment was conducted under cyclic temperature, taking into account that time and temperature depend on the creep behavior of the interconnected material. They assessed that the fatigue resistance is sensitive for changes in the thickness and meniscus of solder interconnects.

Elger et al. use the transient thermal analysis for the detection of cracks. They developed a method based on thermal analysis. The increase of the thermal resistance between the initial signal and the signal after cycles is correlated with the presence of cracks in the solder joint by cross sections [20]. Other researchers have so far relied on the detection of resistance variation to estimate the presence of cracks. In literature there are different criteria to define the resistance variation, for example the resistance change of 5 ohm [21], an increase of the resistance of 10 ohm [22], and a resistance threshold of 450 ohm [23]. The resistance variation defined in the JESD22-B111 standard is a 1000 ohm resistance threshold lasting 1 μs, or a 100 ohm resistance threshold, if the initial resistance value is less than 85. The solder joint failure described in the IPC/JEDEC-9702 standard is given by a 20% increase in resistance. In the study of Henshall et al. [24] three different electrical fault criteria are compared: 500 ohm threshold, 20% increase in resistance, and infinite resistance. In this study, we conclude that the use of the IPC-9701A standard failure criterion for 20% increase in resistance provides the most sensitive failure measure. Other studies assert that solder joint cracking can be defined by evaluating the increase in the differential voltage [10,25]. Osram Spa defines the 2% increase in the Forward Voltage (Vf), the failure criterion, which corresponds to the 20% increase in resistance [26].

In this paper, we aimed to validate the failure criterion of a 2% increase in the forward voltage as a method to detect cracks in the SJL. It is easy to implement, repeatable, non-destructive, and requires common measuring instruments present in many laboratories. The study presents the experimental protocol, the accelerated test carried out, the failure analysis, and the obtained SJL lifetime.

#### **2. Materials and Methods**

The experimental protocol section consists on the description of the circuits, which are subjected to the TCT and the voltage measurements method. TCT and the oscilloscope test, which is carried out to validate the voltage measurement method, are described. Finally, we present the traditional methods used to evaluate solder defects, the X-ray analysis for voids and cracks, and the metallographic section for a complete analysis of the physical structure of the components.

#### *2.1. Experimental Protocol*

Following the IPC-9701A standard and Osram's directives, an experimental protocol to detect cracks in SJL subjected to the thermal cycling test is proposed. A total of 42 circuits, of which 40 are subjected to thermal test, and 2 are used as a reference, were developed. Each circuit consisted of 45 LEDs arranged in 3 rows by 15 columns as can be seen in Figure 1. In total, 1800 LEDs were used in this study.

The composition of each circuit is defined below:


The instrumentation used consisted of a Source Meter Unit (SMU), a thermometer, and a PC. A software capable of sending commands to the instrument to generate a current pulse and save the voltage measurement was implemented. The Keithley 2400 SMU [27,28] is the unit that sends the current impulse and measures the voltage across the Device Under Test (DUT). The advantage of this instrument is that it allows a simple and compact configuration compared to the use of a separate Digital Multimeter (DMM) and source, and allows for the 4-terminal measurement configuration. The fundamental principle of the 4-wire connection is to supply power to the device and perform the measurement of the Vf through two separate connection lines. Using this configuration, it is possible to connect the measurement cables directly to the ends of the device to measure voltage, thus avoiding the influence of resistive drops on the power supply wires. The connection between the SMU and the DUT consisted of a bed of nails. This is a traditional electronic test fixture made up of 4 spring contacts (spring-loaded pins), which create the electrical connection between the measuring instrumentation and the unit. Figure 1 shows the experimental setup used in this study.

**Figure 1.** Instrumentation used in the experimental protocol. The PC was connected to the Source Meter Unit (SMU) with General Purpose Interface Bus—Universal Serial Bus (GPIB-USB), the SMU and bed of nails were linked with a 4-wire connection, and the bed of nails created the electrical connection with the DUT via 4 spring contacts.

Before subjecting the circuits to TCT, the voltage of each LED was measured at a controlled temperature (25 ◦C), inside a fixed temperature chamber. In order to monitor the temperature, a Fluke 51 thermometer with a type k thermocouple was used. This first measure was fundamental in the failure analysis because it represents the reference value.

The Vf was measured by sending a 20 ms current pulse at 10 mA to each LED. The instrument allowed us to set the integration time of the A/D converter that represents the period of time in which the input signal was measured. The integration time affects the usable digits, the amount of reading noise, and the ultimate reading rate of the instrument. The integration time was divided into three different speeds: the fastest integration time (fast), which results in increased reading noise and fewer usable digits, the slowest integration time (high accuracy), which provides the best noise immunity, and the default setting (normal), which is a compromise between speed and noise. In order to have both good speed and low noise, normal was used, which resulted in a 20 ms pulse. The current value was fixed at 10 mA in order to avoid heating the LED, and the consequently variation of Vf.

In total, 1900 thermal cycles were performed and the test, at every 100 cycles, was suspended to carry out the measurement of Vf [20]. Before measuring, we waited until the circuit temperature reached 25 ◦C inside the fixed temperature chamber.

The failure criterion was an increase of 2% in the forward voltage. For each 100 cycles, the forward voltage measured were compared with the reference value measured before the start of the TCT. A failure was recorded once the following condition was met:

$$Vf(\mathbf{x}) - Vf(0) > 0.05\tag{1}$$

where *Vf* (*x*) is the forward voltage measured at each cycle, and the *Vf* (0) is the reference value. The threshold value of 0.05 V is determined by calculating the 2% of the reference value, considering LEDs have an average Vf of 2.57 V.

The MATLAB programming environment was used to control the instrument, and in data analyzing.

#### *2.2. Thermal Cycling Test*

TCT is important because thermo-mechanical stress is one of the main reason for structural failures, causing the cracking of solder joints between the package and board. LED modules were exposed to temperature tests between −40 to 120 ◦C [29]. Due to differences in thermo-mechanical stress under hot and cold conditions, important information can be obtained. TCT is the process of testing the SJL by subjecting it to temperature conditions in excess of its normal service parameters to uncover faults in a short amount of time. The TCT was performed in a climatic chamber CST 27/2T of Angelantoni test technologies s.r.l. visible in Figure 2. It consisted of two chambers and a transfer carriage, which permits movement of circuits from one chamber to another. Proprietary software allowed us to start the test, set the specifications, and save the acquisition. Once the software started, the oven required 10 min to reach the set temperature. After that the test started. As shown in Figure 3, DUT were kept for 15 min in a cold chamber and 15 min in a hot chamber, the movement occurred through the transfer carriage with a 5 s transfer time. The test continued by alternating between the hot and cold chambers for up to 100 cycles.

In each chamber, an offset of 5 ◦C (recommended value of the oven manufacturer) was set, which guarantees keeping the oven temperature at −40 and 120 ◦C, respectively. This was an important setting because the movement from one chamber to another involves the variation of the temperature. It was possible to view the acquisition of the data through the proprietary software during the test.

**Figure 2.** (**a**) Circuits positioned in the climatic chamber CST 27/2T of Angelantoni test technologies. (**b**) A mechanical transfer carriage moves circuits from one chamber to another.

**Figure 3.** Thermal profile of the Thermal Cycling Test (TCT), which the circuits were subjected to.

#### *2.3. Oscilloscope Test*

In order to validate the experimental protocol, current and voltage were measured at the end of each acquisition to check that they were steady. The instrument used for the measurements is the Oscilloscope LeCroy waverunner LT322 Series (LeCroy, New York, NY, USA). The test was carried out by powering each LED at 10 mA in direct current. Typically, the oscilloscope has 2 type of probes: the voltage probes and the current probes. We connected the voltage probes to the LED and the current probes to the power cable. The oscilloscope displays electrical signal trends over the time. In order to obtain a stable signal, the function trigger set to single modality was used, in order to view only one scan of the signal at a time. The display of the oscilloscope shows in red the trend of the current and in blue the trend of the voltage. When the LED was powered, both signals increased: the current rises from 0 mA to 10 mA and the voltage rises from 0 V to 2.57 V. The transient time was 0.08 ms (80 μs). The delay of SMU between sending the impulse and the voltage measurement response was 1 ms. This value was bigger than the transitional time, therefore, the signals of current and voltage were in a steady state when the measurement was acquired.

#### *2.4. X-ray Analysis*

X-ray analysis is widely used in the electronic field to evaluate solder defects. SJL inspection allows for detecting structural defects of the electronic boards such as missing solder, the presence of voids, and short circuits. In this study, X-ray analysis was performed to obtain a complete analysis of the solder joint and to evaluate the presence of cracks. In order to validate the analysis method, the X-rays of LEDs that have not undergone the TCT were compared with the X-rays of SJL that reached failure.

#### *2.5. Metallographic Section*

The metallography consists in the study of the physical structures of crystals and metal alloys using a microscope. In this way, it is possible to determine the dimensions and the shape of crystals, the distribution of the phases, the direction of the slipping lines, the level of purity, and the presence of contaminations. The metallographic section was divided into six phases:


Metallographic section was used to verify the presence of cracks in the SJL, and to evaluate length and thickness of the cracks. In order to validate the 2% increase of Vf as a method of estimating cracks in the SJL, the metallographic section of the unbroken SJL was compared with the metallographic section of failed SJL.

#### **3. Physics Failure Analysis**

#### *3.1. Weibull Analysis*

The Weibull distribution is a continuous probability distribution, described by two parameters: the scale parameter *η* and the shape parameter *β*. Weibull analysis is a methodology used for performing lifetime data analysis. Weibull distribution defines a failure curve, which is normally used in the industrial environment for all electronic applications.

The Weibull distribution is determined by the following equation:

$$F(t) = 1 - \sigma^{[-\left(t/\eta\right)]^\beta} \tag{2}$$

where *F*(*t*) is the probability of failure at t number of cycles or hours, *β* is the shape parameter or Weibull slope, and *η* the scale parameter or characteristic Weibull lifetime.

#### *3.2. Norris–Landberg Model*

The solder joint fatigue is a low-cycle failure and it originates from the Coffin–Manson model [30]. In fact, almost all lifetime prediction models are derived from Coffin–Manson. The Coffin–Manson model was used to evaluate the growth of cracks in the solder joint, the mechanical failures, the fatigue of the material, and the deformation of the material.

The model is described by the following equation:

$$N(\triangle \epsilon\_{\mathcal{P}})^n = \mathbb{C} \tag{3}$$

where *N* is the number of cycles to failure, *<sup>p</sup>* is the plastic strain range per cycle, *n* is an empirical material constant, and *C* is a proportionality factor. The number of cycles obtained with the Coffin–Manson model depends on the plastic deformation, which increases as the cycles increase. The measurement of this deformation is often difficult to obtain, therefore, other models that consider temperature variation as a fundamental parameter were developed. The Norris–Landberg model assumes that the plastic deformation range is proportional to the temperature excursion range, and introduces two other factors taking into account the cycling frequency and the maximum temperature of the solder paste. In this way, the Acceleration Factor (AF) can be defined as:

$$AF = \frac{N\_{field}}{N\_{test}} = \left(\frac{f\_{field}}{f\_{test}}\right)^{-m} \left(\frac{\triangle T\_{field}}{\triangle T\_{test}}\right)^{-n} \left(e^{\frac{E\_0}{\hbar} \left(\frac{1}{\frac{1}{T\_{max,final}} - \frac{1}{T\_{max,total}}}\right)}\right) \tag{4}$$

where *field* and *test* indicate the real condition and the test condition, respectively. *f* is the cycling frequency expressed by the cycles per day at the *field* and *test* condition, *m* is a cycling frequency exponent and a typical value is about 0.33. *T* is the temperature range during cycles at *field* and *test*, *Tmax* is the maximum temperature of the joint in *field* and *test* condition expressed in Kelvin, *n* is the exponent of the temperature range, a typical value is about 1.9. *Ea* is the activation energy and *K* is the Boltzmann constant, *Ea <sup>K</sup>* is 1414 [30]. SJL lifetime represents the period of time during which the joint guarantees the correct operation. The lifetime can be expressed in different measurement units depending on the system application. In lighting applications, it is common to express the lifetime in hours [31]. To simplify the understanding of the data it is advisable to express lifetime in years, especially in the industrial and commercial environment. The equation below computes the lifetime starting from *Nfield*:

$$Lifetime\_{years} = \frac{N\_{field}}{f\_{field}} \times \frac{1}{365} = \frac{AF \times N\_{test}}{f\_{field}} \times \frac{1}{365} \tag{5}$$

#### **4. Results**

The presence of cracks and the failure of SJL were evaluated considering the 2% increase in Vf with respect to the reference value. In total, at the end of the 1900 cycles, there are 74 faulty SJLs.

Figure 4 shows the number of SJLs that failed as the thermal cycles increase. The first failure was at 1400 cycles with one broken SJL. At 1500 cycles one more SJL failed, and at 1600 cycles, another 10 SJLs failed. At 1900 cycles, the amount of broken SJLs increased to 37. In the last cycle, the number of failure assumed an exponential trend.

Figure 4 was obtained by fitting the data of failed SJLs. The analytical formula, which described the curve, is presented below:

$$N\_{failed}(\mathbf{x}) = 0.00015 \times e^{0.0065 \mathbf{x}} \tag{6}$$

Coefficients are calculated with 95% confidence bound and the *R*<sup>2</sup> value obtained is 0.94.

In order to evaluate the SJL performance it is necessary to determine the probability of reliability and the probability of failure. The reliability R(x) indicates the probability that solder joint has a correct functioning during TCT. The probability of failure determines the probability that solder joint presents cracks. The reliability and probability of failure are described by Equations (7) and (8):

$$R(\mathbf{x}) = \frac{N\_{total} - N\_{failel}(\mathbf{x})}{N\_{total}} \tag{7}$$

$$F(\mathbf{x}) = 1 - R(\mathbf{x}) \tag{8}$$

**Figure 4.** Trend of the failures at each cycle. Markers represent the number of failed determined at each cycle.

As thermal cycles increase, the percentage of reliability decreases, from 1% to 0.96%. Instead, the probability of failure *F*(*x*) increases when thermal cycles increase. At the end of thermal cycles, the unreliability increases up to 0.035% . Figure 5 shows the unreliability assessed through the SJLs that reach the failure during test. This curve is obtained fitting the data of unreliability and the analytical formula of the curve is represented by:

$$F(\mathbf{x}) = 0.00013 \times e^{\mathbf{3}.5\mathbf{x}} \tag{9}$$

Coefficients are calculated with 95% confidence bound and the *R*<sup>2</sup> value obtained is 0.99.

**Figure 5.** Variation of the probability of failure related to the thermal cycles variation.

As we said in the previous chapter, the Weibull distribution is the most used function in the electronic environment to represent faults analysis. Figure 6 represents the acquired data using the Weibull distribution, including Weibull parameters.

**Figure 6.** Graphical representation of data using the Weibull distribution. Purple dots represent the Solder Joints of an LED (SJLs) that reached the failure at every thermal cycle; the red line describes the distribution curve of the faults.

Results refer to the relationship between real condition and test condition. We have chosen a frequency cycling of 6 on–off per day on the basis of the data provided by the company according to the type of LED and the final application of the product. TCT frequency cycling depends on the type of the accelerated test used. In this case, the frequency cycling is of 48 on–off per day. TCT requires that devices remain 15 min inside hot chamber and 15 min inside cold chamber. Each cycle ended in approximately 30 min, therefore, 48 cycles were performed in 24 h corresponding to the number of daily on–offs. Table 1 shows the results obtained from the TCT.


**Table 1.** The first column presents the thermal cycles, the second the number of failed SJLs at each cycle, and the third the total number of failed at each cycle. The fourth column presents the average increase in Forward Voltage (Vf) and the related standard deviation. Last column reports the SJL lifetime.

SJL lifetime represents the estimated number of years in a real installation during which the joint guarantees the correct operation.

At the ends of TCT, the 4.1% of the SJLs have reached failure still providing a SJL lifetime between 17 and 24 years, the remaining 95.9% of the SJLs present a joint lifetime longer than 24 years.

In order to validate the methodology used to identify cracks, X-ray analysis and metallographic section were performed. The X-ray analysis permits us to evaluate the presence and the size of voids inside the solder joint. This type of analysis allows us to visualize the air trapped in the soldering paste. Voids are observable as they have a different color than the surrounding environment, as we can see in Figure 7a. This type of visualization also allows us to distinguish the cracks formed inside the joint [32]. The crack represents a fracture inside the solder paste, which is equivalent to an air passage, and it is easily distinguishable by X-rays. Cracks cause a malfunction of the SJL as electrical continuity is compromised. X-ray analysis is a non-destructive method that allows us to detect cracks which compromise the correct dispersion of heat and cause an increase of Vf. Figure 7a shows the X-ray analysis of a LED not used in TCT. In this figure, it is possible to notice the presence of voids in the SJL. It does not lead to malfunction because the percentage of voids is lower than the percentage defined in the IPC-A-610D standard. Figure 7b, presents the X-ray analysis of a SJL submitted to the TCT, and that reached the failure. Through analysis of the image, it is possible to identify cracks in the solder joint.

**Figure 7.** (**a**) X-ray analysis of an LED that has not undergone TCT, red circles underline the voids present in the joint. (**b**) X-ray analysis of a failed SJL with voids and cracks pointed out by red circles.

The metallographic section is a complete analysis of the physical structure of all components in a circuit. This technique is widely used to evaluate the reliability of the solder joint but has the disadvantage of being a destructive method. In our workn this analysis was used to validate the results obtained by the voltage measurement method. The analysis was made and analyzed using the Axioplan Zeiss microscope. The metallographic section shows the solder joint between LED and PCB. In Figure 8a, a metallographic section of a non-failed SJL is presented. The SJL has no cracks. It guarantees the correct electrical operation without any increase in forward voltage.

Conversely, in failed SJL, the metallographic section shows cracks formed during TCT [17]. Figure 8b presents an example of a broken SJL. Cracks are along the entire joint.

**Figure 8.** (**a**) A metallographic section of an unbroken SJL with no cracks. (**b**) A metallographic section of a broken SJL with evident transverse cracks.

#### **5. Discussion**

The aim of this work was not to characterize the lifetime of the LED but to provide a testing method usable to furnish significant evaluation in lighting applications. In this paper, a validation of 2% failure criterion proposed by Osram was carried out. Results of our paper check the validity of this criterion to detect the presence of cracks in the SJL. At 1900 cycles 4.1% of the considered SJL have an increase of 2% of Vf.

In the analysis of failure, the reliability and the probability of failure were calculated. The analysis demonstrates that the probability of failure grows exponentially related to the thermal cycles variation. As can be seen from Table 1, the Vf increase grows at each cycle with the number of thermal cycles. Results show the correlation between the solder joint fatigue and the number of thermal cycles. The AF was determined using the Norris–Landberg model by which the SJL lifetime is calculated.

The lifetime variation according to the number of cycles and the number of failed SJLs was analyzed. The SJL lifetime increases linearly with the number of thermal cycles, as can be deduced from Equation (5). On the contrary, the trend of the lifetime related to the number of failed SJLs was approximated with the normal distribution.

#### **6. Conclusions**

This paper proposes to validate the criterion of 2% increase in Vf to detect cracks in the SJL. In order to reduce test and response time, an accelerated test was carried out. TCT was chosen because it is the most used test in the scientific community. In total, 1900 thermal cycles were performed and the comparison between Vf and the reference value was calculated. A difference greater than 2% represents the failure criterion for SJL.

In the experimental protocol, 40 circuits with 1800 LEDs were subjected to the TCT and 4.1% of the SJLs failed. The probability of failure obtained has an exponential trend. The SJL lifetime was determined using the Norris–Landberg Model. From obtained results, 95.9% of the considered SJL had a lifetime greater than 20 years. This method was validated by comparing the results of Vf increase with the X-ray analysis and the metallographic section. The comparison allows us to conclude that all the SJLs that showed an increase in Vf actually present cracks.

Obviously, this is not the only parameter to consider in calculating the lifetime of a product, where the overall duration is given by the component with the shortest lifetime; however, the proposed parameter represents a validated method that allows companies to estimate the SJL duration in a short time and to calibrate the guarantees also based on these results.

**Author Contributions:** Formal analysis, F.P.; funding acquisition, M.G. and P.P.; investigation, A.B. and L.P.; methodology, F.P. and A.B.; project administration, M.G. and P.P.; resources, F.P. and L.P.; supervision, P.P.; writing—original draft, F.P.; writing—review and editing, L.P. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research received no external funding.

**Acknowledgments:** The authors are grateful to the iGuzzini Illuminazione S.p.A. (www.iguzzini.com), Silga S.p.a. (www.silga.com), Gitronica S.p.a. (www.gitronica.com) for the opportunity to carry out this research work, they also acknowledge for the technical support of the materials used for experiments.

**Conflicts of Interest:** The authors declare no conflicts of interest.

#### **References**


© 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## *Review* **Two Decades of Condition Monitoring Methods for Power Devices**

**Giovanni Susinni 1, Santi Agatino Rizzo 1,\* and Francesco Iannuzzo <sup>2</sup>**


**Abstract:** Condition monitoring (CM) of power semiconductor devices enhances converter reliability and customer service. Many studies have investigated the semiconductor devices failure modes, the sensor technologies, and the signal processing techniques to optimize the CM. Furthermore, the improvement of power devices' CM thanks to the use of the Internet of Things and artificial intelligence technologies is rising in smart grids, transportation electrification, and so on. These technologies will be widespread in the future, where more and more smart techniques and smart sensors will enable a better estimation of the state of the health (SOH) of the devices. Considering the increasing use of power converters, CM is essential as the analysis of the data obtained from multiple sensors enables the prediction of the SOH, which, in turn, enables to properly schedule the maintenance, i.e., accounting for the trade-off between the maintenance cost and the cost and issues due to the device failure. From this perspective, this review paper summarizes past developments and recent advances of the various methods with the aim of describing the current state-of-the-art in CM research.

**Citation:** Susinni, G.; Rizzo, S.A.; Iannuzzo, F. Two Decades of Condition Monitoring Methods for Power Devices. *Electronics* **2021**, *10*, 683. https://doi.org/10.3390/ electronics10060683

Academic Editor: Ahmed Abu-Siada

Received: 1 January 2021 Accepted: 24 February 2021 Published: 15 March 2021

**Publisher's Note:** MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

**Copyright:** © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/).

**Keywords:** condition monitoring; junction temperature; power device; reliability; power electronics

#### **1. Introduction**

Nowadays, power electronics is widespread in a huge number of daily applications that improve services for the collective [1]. Furthermore, power electronics has a key role in renewable energy systems [2,3], lighting [4,5], electric mobility [6,7], and other systems that enable sustainable development [8].

A crucial aspect is the reliability and lifetime prediction of the whole power conversion system. The warrant of the highest robustness level while minimizing the product and maintenance cost is extremely mandatory. For example, the devices used in avionic and automotive applications must have a fault rate close to zero that imposes stringent requirements during the system design. In the same way, wind farms must guarantee normal operations without interruption, but this is extremely difficult because of the expensive access to farms for easier maintenance. In this context, many approaches to forecasting the lifetime of power electronic systems and the single power device have been intensively studied.

To guarantee a high level of reliability, it is important to comply with several standards [9–11], and different strategies are usually performed such as the use of the faulttolerant topologies with redundant components [12,13], and the advanced reliable design of power electronic devices using innovative materials [14,15].

Unfortunately, the enhanced system's robustness does not prevent failure and, indeed, it is never completely foreseeable. Therefore, a maintenance operation before a failure is necessary. Considering the costs of maintenance operations, lifetime prediction combined with condition monitoring approaches [16,17] are very useful tools to choose when a maintenance operation has to be carried out.

Some studies have shown that capacitors are fragile with a failure of 30%, whereas the failure of the PCB and connectors is around 36% [18–20]. The remaining part is related to the semiconductor and soldering failures in device modules that consist of the most important area of concern for converter system failures. In this context, countless condition monitoring (CM) methods for the evaluation of the semiconductor state of health have been widely explored in the literature.

The target of this work is to provide an overview of various CM methods that have been used to evaluate the state of the health of power devices. More specifically, the first part of the proposed review was focused on the impact of the Internet of Things (IoT) and artificial intelligence (AI) technologies used for CM of power devices, with a chronological overview of the main CM methods over the last two decades. Then, it a first CM method based on acoustic emission was presented and used to detect any physical damage in a power module packaging. It is worth underlining that it enables one to estimate the state of aging of a power module.

Then, CM methods based on the optical properties of the semiconductor power devices were presented, including temperature estimation. These methods are usually based on an optical beam that is reflected or scattered back from the semiconductor lattice. There is an inherent dependence between the temperature and the energy related to the photoemission. More specifically, such energy is a function of the junction temperature (JT); hence, in turn, the energy variation can be used to estimate the temperature of the chip. After that, a depth-analysis of the several approaches to extract the junction temperature in the semiconductor devices based on the physical or electrical properties was performed. The early works using a physical CM method for the JT measurement were done by directly contacting the chip surface with a thermo-sensitive material such as a point contact system (such as thermocouples and liquid crystal). On the other hand, electrical methods for the junction temperature measurement are often the preferred choice for CM of power devices because the temperature estimation can be carried out through the measurement of electrical quantities. Among various electrical CM methods, thermal test chips (TTCs) are directly fabricated on the die surface of the device, and the voltage drop can be used to estimate the temperature variations. On the other hand, the temperature sensitive electrical parameters (TSEPs) are based on the measurement of the voltage drop during the converter operations. Generally, the measurement of the voltage drop can be carried out using some voltage probes connected to the device terminals.

Although the measurement of the power devices' junction temperature was widely treated in many ways, it is still an active relevant topic owing to the current trade-off between the advantages and limitations of the methods proposed so far. Therefore, all these methods have been compared in terms of their main aspects such as sensitivity, linearity, cost, and online monitoring operations.

#### **2. Conditioning Monitoring Methods and Their Future Application**

In the literature, the research topic based on CM methods has been gaining interest as the various maintenance strategies allow to increase the lifetime of the overall power conversion system. In many applications, it is becoming crucial to monitor the state of the health (SOH) of power devices to prevent a failure, that is, the possibility for the operators to obtain a lifetime estimation, thus properly scheduling any maintenance operations.

Figure 1 depicts a timeline of the various CM methods for power devices that have been widely studied in the literature and used by the industry in the last two decades. The first use of CM methods for power devices dates back to the 2000s, where the measure of on-state voltage of the devices was used as a well-known parameter to monitor the device condition. Later, the measure of the threshold voltage or the gate turn-off voltage of a device was used to estimate the temperature dependence of the power devices by measuring a low voltage; then, the acquisition system was developed to be more simple and less bulky. In the last 5 years, the estimation of the SOH has been carried out using contactless approach such as the acoustic method or the photodiode approach, where the

acoustic emission or the light emission, respectively, of a particular device have been taken into account.

**Figure 1.** Timeline of the main condition monitoring (CM) methods in the last two decades. IR, infrared; NTC, negative temperature coefficient.

> The thermal stresses such as the increasing of the mean temperature and abrupt temperature fluctuations are the main failure mechanisms. Consequentially, the temperature is an index of the power device SOH. Other CM methods focus on other quantities. Table 1 summarizes the physical or electrical quantities measured for each CM method and, in the following subsections, a brief overview is presented. It is worth noting that, among the various CM methods in the literature, the acoustic one is used to detect the state of the aging of the power device without any estimation of the working temperature, while all the other strategies are focused on the estimation of the junction temperature (JT). More specifically, some CM methods perform such estimation by directly measuring the temperature, such as the infrared (IR) camera, a negative temperature coefficient (NTC) resistor, fiber optic cable, and photodiodes sensors. Other methods provide an indirect estimation by mapping electrical quantities in a temperature value, such as the thermo-sensitive electrical parameters (TSEPs).

> **Table 1.** Measured quantities for the different condition monitoring (CM) methods. IR, infrared; NTC, negative temperature coefficient; TTC, thermal test chip; TSEP, thermo-sensitive electrical parameter.


According to recent research, the emerging trend of IoT and AI technologies are gaining more and more interest and they are expanding rapidly in the field of CM methods [21].

AI aims to assist electronic systems with intelligence that is capable of human-like learning and reasoning. This technology possesses countless advantages and has been widely applied in numerous industrial and research areas such as maximum power point tracking (MPPT) control for Photovoltaic (PV) plants, anomaly operation detection for inverter, and prediction of the SOH of a power converter.

The use of enabling AI technologies allows the power converter systems to be embedded with capabilities of self-awareness and self-adaptability, thus system autonomy can be enhanced. Similarly, the development of data science, including sensor technology, IoT, and big data analytics, provides a wide variety of data for power electronic systems throughout different stages of its life-cycle. Furthermore, AI technology can exploit data to estimate the system health status with high sensitivity in condition monitoring for aging detection of power devices. Only in a few works [22–25] has the condition monitoring and fault detection in power electronics AI-based fault detection been presented.

Figure 2 shows a proof-of-concept of the integration between IA and IoT technologies for CM of power devices. More specifically, Figure 2a depicts an example of a user (red box), which consists of a specific power converter and its power devices that have to be monitored, and an example of a provider of CM services (PS) (yellow block). More specifically, the devices of a single-user power application are connected with several sensors that enable the monitoring of the SOH of each device (such as the measurement of the TJ or the state of aging of a device). Then, the controller system interface (CSI) manages the sensors and collects all the measured data. The CSI block plays an important role for the CM of the power system because it is able to provide control signals and it may exchange data with different users in the IoT framework (see Figure 2b).

The PS (sometimes also the CSI) uses AI technologies that act as "intelligent agents", exploiting sensors able at perceiving the environment of the power converter. Indeed, during some power converter operations, the JT can be dangerously increased over a threshold maximum value, hence the AI is able to suddenly shut down the power system. Moreover, the AI-integrated system may enable a power derating in order to avoid any failure of the converter and, hence, the power devices. On the other hand, AI should perform more complex tasks, such as detecting any change in the device behavior that could lead to future malfunctioning; interacting with the CSI "to propose" solutions, i.e., fault preventing strategies, to current anomalies or potential future ones; and so on. Regardless of whether AI is located in the PS, in the CSI, or both, a local backup control system is necessary. The local controller should be simple (without complex hardware and control strategies) and highly reliable. The local controller should have less stringent limits than the AI, thus the local controller intervenes only when the system is close to a dangerous situation. For example, the local converter shuts down the converter when the JT passes over a preset limit and this situation occurs owing to the lack of a smarter command (load reduction, switching frequency variation, and so on) from the AI of the PS because of different causes (e.g., temporary lack of connection, unexpected AI actions or reasoning).

It is worth noting that the PSs are able to contribute to the decision making in both offline and real-time analysis using data acquired in the past and saved into a dedicated database (green silos). From this perspective, all the collected data can be used to enhance the predictive model of the SOH of the power devices.

Moreover, the PS may interact with enterprises, authorities, public companies, and so on. For example, real-time use of CM occurs when a PS notices a critical functioning of the converters of a large PV system. The PS informs the PV owner as well as interacts with the PV management system to enable them to promptly and properly operate. On the other hand, the PS also informs the electric network operator (ENO) of the smart grid where the PV is installed about a potential disconnection of the PV system. This information enables the ENO to adopt countermeasures that mitigate the impact of such a disconnection. In turn, the ENO informs sensitive customers, e.g., hospitals, of a potential lack of service or asks them to turn on a backup system in order to reduce the absorbed power.

(**a**)

**Figure 2.** (**a**) User and provider of CM services (PS). (**b**) Proof of concept of Internet of Things (IoT) and artificial intelligence (AI) technologies for CM of power devices.

> Furthermore, the measurements of the JT and other parameters of the power devices can be used by some public institutions such as universities or research centers (blue pale and red dashed lines) for an off-line analysis of the data to carry out some models of the SOH of the power devices. Moreover, the PS may be connected to a security organization (grey dashed lines) that may collect data and it should be able to interrupt an electrical service in the case of failure.

> It is worth underlining that the PSs could provide data to the power device manufacturers with the aim to share information related to the state of aging of the power devices.

The manufacturers can use the data to improve their power devices as well as to obtain more accurate power device models. Indeed, manufacturers can act as PSs.

#### **3. Acoustic Methods**

Acoustic emission has been widely investigated in the literature as a CM quantity useful in different application fields such as pumps, industrial electrical machines, and so on. Moreover, in the field of power electronics, acoustic monitoring has been extensively used to detect any defects or damage in transformers and capacitors [25–27]. Only in the last decade, a few works have been focused on the acoustic phenomenon such as a measurement method for monitoring the SOH of the power semiconductor devices [28–33].

Acoustic emission has been used to detect any physical damage in a power module packaging using an acoustic microscope. Furthermore, from the experimental evidence, it has been proven that acoustic emissions are related to the switching operations of power devices. In the case of fast switching operation (tens of nanoseconds), a certain amount of current is switched, which causes a large *di*/*dt*, which involves magnetic interaction within the module packaging. This means that the magnetic force could be the source of the acoustic emission, such as the mechanical breaking of the structure inside the component package. However, the physical phenomena causing the acoustic emission are not definitively understood.

Thereby, the device under test (DUT) is monitored contactless with an acoustic sensor that is usually placed in the proximity of the package. It intrinsically eliminates the issues related to contact directly with the voltage probes.

A correlation between the SOH of the power module and the analysis of its acoustic emission during the switching process has been analyzed [28–30]. It has been demonstrated that the acoustic peak in an aged device is smaller in comparison with a new one. However, in these works, only the acoustic emission of an Insulated Gate Bipolar Transistor (IGBT) connected into short-circuit has been investigated. Meanwhile, the authors of [32] present an early experimental setup used to prove that acoustic emission is related to the switching of power semiconductor components. Furthermore, the authors have proposed an analysis based on propagation delays to assess the source of the acoustic emission. The authors in [33] have investigated the acoustic emission as a CM method to measure the fatigue mechanisms in the power module. More specifically, they have investigated the physical degradation, observing the aging process of the whole power module by measuring the frequency spectrum of acoustic emission. The authors in [34] have measured the acoustic emission during converter operations to estimate the aging of a power semiconductor module due to power cycling. However, a spectrum analysis has been conducted to process the acquired data. The experimental results have shown a correlation between acoustic emission and the drain-source voltage, which is a common indicator of degradation of the bond wires of the power module.

As for disadvantages, the acoustic method needs an expensive and complex sensing circuit to correctly decode the acoustic emission. Furthermore, the system has to be shielded against Electromagnetic interference (EMI) and the superposition of noise contributions.

#### **4. Optical Methods**

Temperature variation, especially the sudden increase of the JT, plays a significant role in terms of power device reliability [34,35]. CM methods performing on-line JT monitoring raise great interest in terms of planning maintenance operations because the working conditions of a power converter are extremely unpredictable. From this perspective, the CM methods based on the optical properties of the semiconductor power devices were studied in depth because they are useful for temperature estimation. These methods are usually based on an optical beam that is reflected or scattered back from the semiconductor lattice. There is an inherent dependence between temperature and the energy related to the photoemission. More specifically, such energy is a function of the JT, hence, in turn, the energy variation can be used to estimate the temperature of the chip. It is worth remembering that these solutions based on optical quantities have some other drawbacks, such as the high cost and the impracticality in high-voltage converters.

There are various techniques for thermal mapping based on the use of an IR sensor [36–40], IR microscope [41], 2D radiometry [41,42], and the laser deflection technique [43–45], while fiber optic [46–48] and the IR camera [49–54] can both be used to obtain a thermal mapping or the JT value. In the following, the aforementioned optical techniques are briefly discussed.

#### *4.1. Infra-Red/Visible Emission*

An IR sensor is able to detect changes in the amount of infrared radiation of an object, which may vary depending on the temperature and surface characteristics of the objects in front of the sensor. The use of the IR sensors as a CM method for the measurement of the JT in a power device [36–39] is almost inexpensive as well as not very intrusive. However, these sensors have a low response time and, furthermore, the IR sensors average out the junction temperature value of the power device, and hence the accuracy is very low.

On the other hand, the emerging trend of the Wide-bandgap (WBG) power devices, such as the SiC power MOSFETs, are more and more diffusing devices as they concurrently enable high switching frequency, high voltage, and high-temperature operations. Therefore, the study of the electroluminescence proprieties of the SiC material for on-line CM has started to attract wide interest. For different reasons, the electroluminescence proprieties have already been studied back in 1907 [55], while, in the last three years, the inadvertent light emission phenomenon in the intrinsic body diode has drawn attention. While the body diode is in forward conduction mode, the chip glows a visible blue light [56]. The light brightness of the SiC body diode strongly depends on both the injected current magnitude and the JT. Hence, the measurement of light brightness can be used as a novel CM method for temperature detection, where only a few works have already focused on this topic [56–58]. The first proof of concept of the SiC light emission in a commercial power module has already proven the potentiality of this CM method [57]. An inexpensive passive sensing circuit, such as a silicon photodiode and a resistor, was adopted and the photodiode output voltage was correlated to the light emission intensity as a function of the temperature. It is worth noting that the system is small enough such that it can be easily embedded in the package. Another approach considers a light circuit sensing using two commercial photodiodes with an active signal conditioning circuit [58]. This approach has been adopted for JT estimation in a real application such as a pulse-width modulation (PWM) driven converter. The temperature-dependent changes in the spectrum of the light emission from the body diode of a SiC module have also been investigated [59]. The method has been proven through static characterization and dynamic double pulse measurement using two silicon photomultipliers, which can detect the peak intensity and, consequentially, the temperature dependence. Different from the previous CM methods, the last one, based on the light intensity of the SiC body diode, enables high-voltage operations and, even more importantly, the JT can be estimated during on-line operations.

#### *4.2. Optical Fibers*

The use of optical fiber as a CM method for the power modules has been discussed in very few works [46–48]. It is worth underlining that this CM method can be used without removing the dielectric gel on the power module surface, and the JT can be measured by placing the fiber optic cable in direct contact with the power chip. On the other hand, the measure is able to give only a local temperature; further, for almost all fiber optic methods, the measurement response time is generally high. Furthermore, it requires an external conditioning circuit unit that may be bulky for a specific application.

As an example, in [49], an optical fiber sensor has been used to measure the die temperature of an IGBT power module to estimate the thermal impedance (see Figure 3). The module top lid has been removed because the optical system has to be placed close to

the die. Printing the die and bond-wires to increase the emissivity of the chip is usually preferable, but causes a cost increment and severely limits the on-line use of the method.

**Figure 3.** Example of a power module with optical fiber thermal sensors (Based on [49]).

#### *4.3. IR-Detection Apparatuses*

IR-detection apparatuses are not really used as a CM method for power devices, but are extremely useful in laboratory testing (e.g., under power cycling) [49–53]. More specifically, the use of an IR camera allows to display the thermal map of the whole surface of the power module under test, as shown in Figure 4. As expected, the module temperature is not uniformly distributed; the temperature gradient between the center and the edge of the module can be greater than 40 ◦C. Usually, an IR camera is used to carry out a spatial thermal mapping on the device surface, but it is not able to provide an accurate measure of the device JT. It is worth remembering that some temperature measurement errors can be done using an IR camera because of the surface degradation of materials and the intrinsic low emissivity of aluminum. Even in this case, the IR temperature measurements are usually conducted by varnishing the surface of the DUT with a particular solution that increases the thermal emissivity on the surface.

#### *4.4. Other Techniques*

The IR microscope [40], 2D radiometry [41,42], and the laser deflection technique [43–45] have also been used as CM methods for power devices. All the aforementioned methods are able to provide a very precise JT estimation of a semiconductor device, but, on the other hand, the devices under test are to be driven with a specific testing sequence, not matching with the real operation in a power converter. They are also very expensive solutions and are not easily embedded in a real application.

Among the various sensors that use the 2D radiometry and laser deflection technique, it is worth remembering the InSb photovoltaic detector, which is a high-speed, low-noise infrared detector that delivers high sensitivity, and with an optical microsensor whose operating principle is based on detecting the absorption, deflection, and phase shift of an optical beam.

**Figure 4.** Thermal map of a SiC power module in the case of a current injection in the body diode.

#### **5. Physical Methods**

The early works treating CM methods for the JT measurement have been done by directly contacting the chip surface with a thermo-sensitive material such as a point contact system. In this case, direct access to the semiconductor chip is necessary and, consequentially, the package must be removed.

Various equipment has been used for the physical contact measurement, including thermocouples, thermistors, scanning thermal probes, and multiple contact or blanket coatings such as liquid crystals and thermographic phosphors [59–65]. The aforementioned equipment relies on the transfer of thermal energy from the DUT to the thermal sensors. In this case, the spatial resolution related to the contact measurements strictly depends on the size and the thermal capacitance of thermo-sensible materials. The ability to provide a temperature map utilizing a matrix of sensors and a wide spatial resolution (can reach less than 100 nm) are the main advantages. In the following, the aforementioned physical techniques have been briefly discussed.

#### *5.1. Thermocouples*

The physical contact methods that rely on the use of thermocouples are not widespread in practical applications as the chip of the power module must be accessible to the thermal probe and, from this perspective, the on-line measurements and high voltage operations are strongly limited. Furthermore, the measurement of the thermal variation of the power module strictly depends on the time response of the probe, which may be considerably slower (few seconds) than the variation of the module JT.

Nowadays, only in a few cases [60,61], the JT of an IGBT module has been experimentally measured during on-line converter operation. More specifically, the temperature has been determined using several thermocouples physically connected to the chip (see Figure 5). On the other hand, several works use the measurement of some thermocouples as target values to prove the accuracy and effectiveness of new on-line junction temperature estimation models [62–65]. For example, the effectiveness of a model carried out for a three-phase power module IGBT by considering the transient thermal impedance has been proven using several thermocouples [63]. An experimental setup and an on-line control system that includes a microcontroller and a matrix of K-type thermocouples have been built up to verify a numerical thermal model for IGBT devices [64]. In [65], an electrical-thermal

model has been carried out in terms of both the transient and steady-state responses. To validate the model, an array of thermocouple has been installed on the chip surface. A thermal model based on the Fourier series solution of heat conduction equations has also been validated using several thermocouples placed on the surface of the silicon die, on the base plate, and on the heat sink, in order to characterize the transient electrothermal behavior of an IGBT module [66].

**Figure 5.** Measurement of the junction temperature (JT) of a device under test (DUT) with a thermocouple probe on the die surface (Based on [62]).

#### *5.2. Liquid Crystals*

The earliest physical CM methods for the measurement of the JT in a power device have been obtained by using the scanning thermal probes, as well as multiple contact or blanket coatings, such as liquid crystals and thermographic phosphors [60].

More specifically, the thermochromic liquid crystals consist of a thermal imaging tool for mapping surface and spatial temperature distributions. It is worth remembering that the molecular structure and optical properties of the liquid crystals vary with the temperature. Hence, the JT measurement of a power device can be done by measuring the wavelength of the reflected light. These CM methods have a very good spatial resolution, but on the other hand, they are extremely highly invasive and cannot be used in a real power converter application owing to the bulky sensing circuits.

#### **6. Electrical Methods**

Electrical methods for JT measurement are often the preferred choice for CM of power devices because the temperature estimation can be carried out through the measurement of electrical quantities. More specifically, it is worth remembering that the proprieties of the semiconductor materials are temperature dependent and, hence, the measurement of the voltage drop or the current that flows into the device can be used as a valid temperature estimator. Among the various electrical CM methods, thermal test chips (TTCs) are directly fabricated on the die surface of the device, and the voltage drop can be used to estimate the temperature variations. On the other hand, the TSEPs are based on the measurement of the voltage drop (or current) during the converter operations. Generally, the measurement of the voltage drop can be carried out using some voltage probes that are connected to the device terminals. The TSEPs are usually the preferred choice for CM because of their user-friendliness, fast response time to the temperature transients, and good accuracy.

#### *6.1. Thermal Test Chips*

TTCs were originally developed for the thermal characterization of device packages [67], and since then have also been used in IGBT power modules. TTCs act as thermal sensors to monitor the JT and they are fabricated on the proximity of the silicon chip.

TTCs can be suitable for on-line temperature measurements. Various types of TTCs have been realized, such as integrated diodes and resistance temperature detectors (RTDs) [67–75]. As the forward voltage of the diodes strongly depends on the temperature variation, the measure of the voltage drop can be used for temperature estimation. It is worth remembering that the temperature presents an exponential dependence on the forward voltage. Likewise, RTDs are also used as the temperature-sensitive parameter because the voltage drop is related to the resistance variations. The variable resistance, *Rt*, can be expressed as follows:

$$R\_t = R\_0(1 + a\_0 \Delta T) \tag{1}$$

where *R*<sup>0</sup> is the value of the resistance at 0 ◦C, α<sup>0</sup> is the resistance temperature coefficient that strictly depends on the material, and Δ*T* is the temperature variation.

To use TTCs, a modified IGBT power module layout with an accessible on-chip temperature terminal has been proposed in [68]. A string of diodes on the top of the chip has been fabricated and the measurement of the JT has been performed by measuring the forward voltage drop. Instead, in [69] a thin-film RTD placed on the top of the IGBT chip has been realized to measure the average temperature of the die. A similar solution where an NTC thermistor has been embedded in the IGBT power module has been also investigated [70]. Innovative use of a kelvin-emitter resistor, placed directly on the IGBT die surface, as a junction temperature sensor has been also adopted [71]. It provides only a local temperature measurement. Meanwhile, in [72], a chain of integrated diodes has been fabricated on the die surface to investigate the JT variations during a power cycling test.

The widespread nature of SiC power modules in different power electronics applications has also driven forward the research of innovative control techniques that require real-time monitoring or estimation of the module's JT. From this perspective, several works [72–75] have been focused on the development of electrical models of the devices in which several NTC thermistors have been integrated on the die surface. The measurement of the temperature variation enables the estimation of aging of a device and, consequentially, the device model can be continuously updated.

The main drawbacks of the TTCs are the production cost and manufacturing complexity of the embedded sensors. Indeed, such layout modification complexity of the power module packaging can considerably increase and also requires additional terminals for the temperature measurements. Furthermore, it is worth remembering that the diodes and RTDs can be affected by degradations along the lifetime of the device that may affect the accuracy of the measurement. These issues have limited the spread of TTCs in commercial power devices.

#### *6.2. Methods Using the Thermo-Sensitive Electrical Parameters (TSEPs)*

The CM methods outlined so far require visual or physical access to the chip. To overcome this limitation, the temperature measurement by thermo-sensitive electrical parameters (TSEPs) has been used as a valid alternative for the estimation of the JT of a power device. The key point consists of correlating the temperature of the semiconductor material with the electrical quantities during the normal operation of the converter. More specifically, the semiconductor devices have an intrinsic dependence on the temperature related to different parameters, such as the mobility of the carriers *μ*(*T*), intrinsic concentration *ni*(*T*), and the bandgap energy *Eg*(*T*). It is worth remembering that the *Eg*(*T*) and *ni*(*T*) increase at higher temperatures, while *μ*(*T*) has a complex dependence with the temperature that is related to the doping concentration and traps in the gate oxide and silicon interface. Therefore, the temperature dependence on the aforementioned parameters may be written as follows [76–78]:

$$E\_{\mathcal{S}}(T) = E\_{\mathcal{S}}(T\_0) - \alpha\_1 \frac{T^2}{T + \beta\_1} \tag{2}$$

$$m\_i(T) = N^{\text{a} \text{\textquotedblleft}T} \tag{3}$$

$$\mu(T) = \mu\_0 \frac{\beta\_2 \left(\frac{T}{T\_0}\right)^{a\_3}}{1 + \beta\_2 \left(\frac{T}{T\_0}\right)^{a\_4}}\tag{4}$$

where *α*1, *α*2, *α*3, *β*1, *β*2, and *γ* are empirical coefficients; *N* is the number per unit volume of effectively available levels states; and *T*<sup>0</sup> is the room temperature.

Consequentially, the measurement of the electrical quantities measured at the device terminal can be used as a temperature estimator.

Therefore, TSEPs methods use passive voltage or current probes that measure the electrical quantities at the device electrodes, without direct access to the chip device, then the JT is estimated from these measurements. Furthermore, the TSEPs are the preferred approaches to easily obtain JT measurements on packaged devices with a fast time response (less than 100 microseconds). On the other hand, the TSEPs methods do not provide a thermal map of the DUT and, hence, the JT peak is often hard to evaluate [79]. Such an issue is more severe in multichip devices where the voltage or current measurements only provide a rough temperature of the whole device, without the possibility to know the effective temperature distribution among several paralleled chips [80]. In the following subsection, the main TSEPs methods are briefly discussed.

#### 6.2.1. On-State Voltage Measurement

Among the different TSEPs methods, on-state voltage measurement under low current injection has been the most used in many industrial and academic applications. In this case, the TSEP is the voltage drop across the device. The advantage of using this CM method lies in the easy calibration procedure and the negligible self-heating of the DUT.

This CM method is widely employed when the devices have a PN junction in their structure. More specifically, bearing in mind a vertical diffusion MOSFET power device, the temperature variation can be evaluated as the on-resistance *Rds,on* fluctuations during the converter operations. For the sake of simplicity, the *Rds,on* can be approximated as follows (see Figure 6):

$$R\_{ds,on} \approx R\_{cth} + R\_d + R\_{sub} + R\_{cs} + R\_{cd} + R\_s + R\_a + R\_{fft} \tag{5}$$

where *Rch* is the channel resistance, *Rd* is the drift region resistance, *Rsub* is the substrate resistance, *Rcs* and *Rds* are the source and drain contact resistance, *Rs* is the source resistance, *Rjfet* is the JFET resistance, and Ra is the accumulation resistance. Furthermore, the *Rch* and *Rd* can be evaluated as follows [78]:

$$R\_{\rm ch} = \frac{L\_{\rm ch}}{W\_{\rm ch} \mu\_{\rm ch} \mathbb{C}\_{\rm ox} \left(V\_{\mathcal{S}^s} - V\_{\rm th}\right)}\tag{6}$$

$$R\_d = \frac{L\_d}{q\mu\_d N\_d A\_d} \tag{7}$$

where *Lch* and *Wch* are the channel length and width, respectively; *Cox* is the gate capacitance; *Ld* and *Ad* are the drift region length and area, respectively; *Nd* is the doping concentration of the drift region; and *μch* and *μ<sup>d</sup>* are the channel and drift region mobility, respectively. It is worth noting that *Rch* decreases at higher temperatures because both *μch* and *Vth* decrease at higher temperatures. On the other hand, *Rd* acts as a positive temperature coefficient thermistor owing to the temperature dependence of *μd*, which decreases at higher temperatures.

**Figure 6.** Power vertical diffused MOSFET structure with its internal resistances.

It is worth underlining that the temperature coefficient of *Rds,on* may differ for the power devices from different vendors, which is mainly caused by the different design of the device. Therefore, notwithstanding an easier calibration procedure, the CM method must be calibrated when a different device is adopted.

Firstly, the calibration procedure is mandatory, which is used to find the relationship between the JT and the TSEP. Typically, the calibration step consists of the use of a current source *ICal*, in a range from 1 mA to tens of A. It is worth noting that, during the calibration procedure, the device temperature can usually be fixed by a temperature-controlled heat sink. Then, the temperature measurement can be carried out during the dissipation stage, where the TSEP is measured in a typical converter application. In this case, a current source, *Id,* feeds the DUT to increase its temperature by means of power dissipations. Therefore, the voltage drop across the device, under known electrical conditions, is measured as a function of the temperature.

A simplified schematic of the circuits for the measurement of the voltage under low current is depicted in Figure 7 for an IGBT (Figure 7a) and a MOSFET (Figure 7b). The measurement can be carried out for both the on-state and off-state voltage. A voltmeter is usually connected in parallel to the DUT for the measurement of the voltage drop. It is worth noting that the current *Ical* must be at least hundreds of mA to guarantee a linear relationship between the voltage drop and the temperature [80,81]. In the literature, many works [80–96] have focused on voltage measurement under low current injection in power diodes during forward polarization [84–87], in IGBT power modules [90–95], as well as in power BJTs. Some works [94,95] have focused on the JT estimation in an IGBT power module whose on-state voltage (i.e., collector-emitter voltage, *VCEon*) has a negative temperature coefficient. The main drawback of this method is the high dependence on the collector current during the measurement of *VCE,on*. Hence, the load current should be diverted during the measurement and this momentary interruption limits the use of this method in real-time applications.

**Figure 7.** Electrical circuits for the static measurement of the voltage under a low current: (**a**) IGBT and (**b**) MOSFET.

The principle of operation of the CM methods based on the on-state voltage measurement at high current injection is almost similar to that of the low current injection methods. The measurement of the *VCE,on* (or *Vds,on*) voltage drop across the device is used as a TSEP, as described for the low current injection mode. The main difference with respect to the previous CM method lies in the calibration procedure. More specifically, a higher current is used for the calibration procedure and it produces a non-negligible self-heating. From this perspective, the relation between the voltage drop on the DUT and the temperature also depends on the value of the injected current.

The experimental setup for the temperature measurement is depicted in Figure 8. A high current generator feeds the DUT with a pulsed current, *IH*, and a voltmeter is connected in parallel to the DUT. It is important to point out that the measurement of the JT can be obtained during the heating process.

**Figure 8.** Electrical circuits of a DUT for the static measurement of the voltage under high current.

The TSEPs are usually the MOSFET on-state drain-source voltage [97], the power diodes forward voltage [91], and the IGBT on-state emitter-collector voltage [91,97]. The sensitivity of the aforementioned TSEP is strictly related to the on-state current value, regardless of the specific device. The JT estimation is only practicable for current values greater than tens of Ampere [98]. Hence, this method appears to be very useful, especially for on-line JT measurement during the normal converter operation. Several circuit solutions to measure the *VCEon* of the power device have been devised [81,90,96–99].

This approach also presents some limitations owing to the voltage swing between the on-state and off-state of the device. This implies the use of advanced electronic sensing circuits, thus increasing the complexity of the system. Innovative and compact sensing circuits to face these issues have been proposed [97,98].

Another issue is the contact resistances of the voltage probes, which cause an undesired voltage drop that may produce an overestimation of the JT measurement [99]. This issue has been partially mitigated with a correction factor based on the layout of the power module [98,99]. Unfortunately, the introduced correction factor has to be calibrated as the device aging progresses.

#### 6.2.2. Saturation Current

The measurement of the saturation current, *Isat*, has also been used as a TSEP [88,93,100,101] in power modules with IGBTs or MOSFETs. This current can be measured using a current probe or a voltage probe (by adding a shunt resistor). The electrical quantities measured provide a JT estimation due to the dependence on the chip temperature of the channel electron mobility, *μch*; of the threshold, *Vth*; and of the PNP transistor current gain β for the IGBT [101]. It is worth remembering that the current *Isat* shows a complex temperature dependence, but under the assumption that all the devices are at the same temperature and by neglecting the self-heating, the current *Isat* in a device can be simply approximated as follows:

$$I\_{\rm sat} = \frac{1}{2} \frac{\mu\_{\rm ch}(T) W\_{\rm ch} C\_{\rm ox}}{L\_{\rm ch}} (V\_{GS} - V\_{\rm th}(T))^2 \tag{8}$$

The measurement setup consists of a voltage source, *VGT*, connected between the gate-emitter (or gate-source) terminals of the DUT and a DC source voltage, *VD*, connected between the drain-source or collector-emitter terminals of the DUT. Figure 9 shows the setup of an IGBT device. The voltage value of *VGT* is usually higher than the threshold voltage *Vth* of the device and a pulsed current is injected into the DUT by controlling the switch *T*1. The saturation current can be measured through the voltage drop on the *Rshunt*. The setup demonstrates that the thermal characterization of the device cannot be performed during the on-line converter operation.

**Figure 9.** Electrical circuits for the measurement of the saturation current in an IGBT device.

The first procedure is the calibration step, where the DUT is usually placed in a controlled hot plate that overheats the device and, hence, the *Isat* is measured at varying plate temperatures. Then, the measurement procedure (see Figure 9) consists of performing a non-destructive short-circuit to produce a significant channel temperature variation over a short period of time. From this perspective, the measurement variation of the current *Isat* can be associated with a specific temperature value. Moreover, the temperature calibration may not be performed without power losses that influence the device self-heating [100–102]. Furthermore, it has been demonstrated that JT measurement is more accurate only for high temperatures.

#### 6.2.3. Gate Threshold Voltage

The threshold voltage *Vth* is defined as the voltage to be applied to the gate-source terminals to have a given current, which is the minimum current that must flow into the device channel to assume the device is turned on. Instead, from the standpoint of power electronic devices, *Vth* is defined as the level of gate bias needed to observe a transition from weak inversion to strong inversion. For a MOS transistor structure, the *Vth* can be approximated as follows [103]:

$$V\_{th} \approx 2\varrho\_F(T) - \frac{Q\_{SS}}{\mathbb{C}\_O} + \varrho\_{ms}(T) + \sqrt{\frac{2\varepsilon q N\_A}{\mathbb{C}\_O}}\sqrt{2\varrho\_F(T)}\tag{9}$$

where *ϕ<sup>F</sup>* is the Fermi potential, *QSS* is the extrinsic change due to surface states, *CO* is the gate oxide capacitance, *ϕms* is the metal-semiconductor work function difference, *ε* is the oxide dielectric constant, *q* is the elementary charge unit, and *NA* is the body doping.

By referring to (9), it can be demonstrated that the voltage *VTH* decreases with the increasing temperature [103], and it is a TSEP useful for temperature monitoring of MOS-FETs [90,103] and IGBTs [93,94,104,105]. A potential measurement setup for the calibration procedure and the measurement of the *Vth* as TSEP in the case of an IGBT device is depicted in Figure 10.

**Figure 10.** Circuit for the calibration step of the threshold voltage method.

The gate and drain (collector) terminals are short-circuited and a current source, *Ical*, feeds the DUT, while a voltmeter measures the *Vth*. It is worth noting that the calibration step is based on the low current injection method and, thereby, the self-heating is negligible.

Some works [93,94] have focused on the temperature dependence of the *Vth* measured by varying the collector-emitter voltage and the current collector value for an IGBT device. The *Ical* value has to be higher than 5 mA to have a correct calibration step for high temperatures and high sensitivity [93,94]. Other works [104,105] have focused on the temperature measurements after the power dissipation of the device. More specifically, a current source with two different current levels, one for dissipation (high current injection) and the other for JT measurement (low current injection), has been proposed. This CM method is not suitable for on-line condition monitoring [106,107].

#### 6.2.4. Gate-Source or Gate-Emitter Voltage Turn ON-OFF

The gate-emitter (source) voltage, *Vge* (or *Vgs*), is used as a TSEP during the turn-on and turn-off of the switch [108,109]. The high sensitivity and the linear dependence of *Vge* (or *Vgs*) with the temperature are the strengths of this method. Similarly to the threshold voltage method, the *Vge* (or *Vgs*) TSEP method cannot be used for on-line JT estimation in a power converter application, because the gate and collector (drain) terminal has to be shorted. The experimental setup of the gate-source or gate-emitter voltage as the CM method is very similar to that of the threshold voltage (see Figure 10). In this case, the current injected into the DUT is higher than the current used in the threshold voltage method and, consequentially, the self-heating is not negligible.

Figure 11 depicts the simulation of the gate-emitter voltage *Vge* of an IGBT during the turn-off while varying the device temperature. It is worth noting that the following analysis can be done by considering the turn-on of a device. The Miller plateau becomes wider as the temperature increases. In other terms, the time shift Δ*t* in the figure is strictly related to the temperature of the chip and can be detected using a time counter that triggers from the first falling edge to the second one after the Miller plateau.

**Figure 11.** Simulated *Vge* waveform during the turn off of an IGBT by varying the temperature working operations (figure based on [110]).

The Miller plateau width *td* can be approximated as follows [109]:

$$t\_d = \frac{R\_{Gint}(T) \cdot \mathbb{C}\_{rss}(T) \cdot (V\_{DD} - V\_{ON})}{\left(\frac{I\_{load}(T)}{\mathcal{g}\_m(T)} + V\_{th}(T)\right)}\tag{10}$$

where *RGint* is the internal gate resistance, *Crss* is the Miller capacitance, *VDD* is the DC-link voltage, *VON* is the on-state voltage, *Iload* is the load current, and *gm* is the transconductance. Equation (10) shows that *td* is directly proportional to *Crss* and *RGint*. It is worth noting that the impact of temperature variation on *VON* and *VDD* is negligible, while the temperature variations of the terms (*Iload*/*gm*) and *VTH* partly neutralize each other. The internal gate resistance depends on the temperature as the electron mobility decreases at higher temperatures. Therefore, *td* increases at higher temperatures owing to the temperature dependence of *Crss* and *RGint*. Therefore, the time interval *td* of the Miller plateau in the *Vge* (or *Vgs*) voltage can be used as a TSEP to estimate the JT of IGBTs (or MOSFETs).

The authors in [109] have proved the temperature independence of the collectoremitter voltage. Instead, the calibration step measurement has been improved in [53], where an auxiliary sensing circuit has been added to the gate driver to reduce undesirable oscillations during the turn off of the device. Meanwhile, in [110], the linear dependence of *td* with respect to the temperature of the chip has been demonstrated, and a parametric analysis by varying the JT, *Iload*, and DC-link voltage has been performed.

#### 6.2.5. Turn On-Off Delay Time

The switching behavior of the power devices has been also adopted as a CM method [110–116]. In this case, the TSEPs are the voltage and current waveforms during the turn-on and turn-off of the DUT. This method is quite similar to the *Vge* (or *Vgs*) TSEP method, but the JT monitoring can be performed on-line during the converter operations. More specifically, the delay, Δ*D*, at turn-on, between the collector current *ic* and the gateemitter voltage *Vge* for an IGBT device (see Figure 11), is used as a TSEP [110–112], as well as the delay between the drain current *id* and the gate-source voltage *Vgs* for a MOSFET device. Bearing in mind the IGBT devices, the turn-on delay is of great interest because Δ*D* increases linearly with the temperature [113], it only depends on the dc-link voltage, and it is not influenced by the value of *ic.* More specifically, during the switching on time interval

*ton*, the gate current charges the gate-emitter capacitance *CGE* that is connected in series with the gate resistance *RGint*.

Therefore, the zero state waveform of the *vge*(*t*) can be written as follows [109]:

$$v\_{\mathcal{G}^\varepsilon}(t) = V\_{\mathcal{G}} \cdot \left(1 - e^{\frac{t}{\tau}}\right) \cdot \tau \approx R\_{\text{Gint}}\left(T\right) \cdot \mathbb{C}\_{\text{GE}}\left(T\right) \quad t\_{ON} \approx \tau(T) \cdot \ln\left(1 - \frac{V\_{th}(T)}{V\_{\mathcal{G}}}\right) \tag{11}$$

where *VG* is the driver gate-emitter voltage.

The dependence on the temperature of the turn-on delay Δ*D* can be analyzed by combining both (9) and (11). *Vth* decreases as the temperature increases and the value of the time constant τ depends on the temperature variations too. It is worth underlining that the gate charge (the intrinsic gate capacitances) has a weak dependence on temperature, while the internal gate-resistance *RGint* has a stronger dependence on temperature owing to the channel mobility *μ*, which decreases at higher temperatures.

Figure 12 depicts the simulation of an ideal IGBT device during the turn-on at varying working operation temperatures (40 ◦C, 70 ◦C, and 100 ◦C). The shift on the right of the waveforms is strictly related to the aforementioned temperature dependence. The previous method is also valid for MOSFETs.

**Figure 12.** Simplified *ic*–*Vge* turn ON waveforms of an IGBT at different temperature working operations.

An advanced sensing circuit (voltage probes, Field Programmable Gate Array (FPGA), Analog to Digital Converter (ADC)) that records the transient evolutions of both *Vge* and *ic* waveforms has been proposed in [112]. The delay is calculated as the time interval between the time instant the rising edge of the *Vge* is detected, and the rising edge of the current *ic* (Figure 12). This method allows a sensitivity close to 2 ns/◦C. Moreover, because a gate resistor with a large resistance improves the accuracy of the temperature measurements during the switching behavior of the converter, but worsens the efficiency, a variable gate resistor has been proposed to set a higher value exclusively when the JT is measured [113].

Similarly, the turn-off delay can also be used as a TSEP, reaching a sensitivity level close to the one obtained with the turn-on delay method [114]. Other works have proposed an alternative sensing circuit for the JT estimation during the turn OFF [115]. However, the turn-off delay method does not attract interest because it is not linear at high-temperature operations, and the time delay depends greatly on both the *ic* current and the DC link voltage [115,116].

In general, the turn-on and turn-off TSEPs methods require high bandwidth sensors and an advanced sampling circuit for temperature measurement, which considerably increase the cost of the overall system. Furthermore, these methods usually require an external circuit to trigger a counter for the estimation of the turn-on and turn-off delay time.

#### 6.2.6. Current and Voltage Change Rate

In the last decade, the research has moved from the study of the electrical quantities (such as the voltage and current waveforms) to their derivative functions, which are observed during the device commutation, called dynamic thermo-sensitive electrical parameter (DTSEP) methods. More specifically, the collector-emitter voltage change rate (*dvce*/*dt*) and the collector current change rate (*dic*/*dt*) have been used as temperature estimators [117–121]. The temperature dependence of both *dvce*/*dt* and *dic*/*dt* has been explored theoretically as well as confirmed experimentally [119–121].

As an example, the *dVce*/*dt* in an IGBT device can be approximated as follows [121]:

$$\frac{dv\_{\rm c\varepsilon}}{dt} \approx \frac{1}{\tau\_{\rm \mathcal{S}^c}(T)} \left( \frac{V\_{\rm GE,ON} - V\_{\rm GE,OFF}}{1 + \left(\frac{\tau\_{\rm O}}{\mathcal{S}\_{\rm m}(T)\tau\_{\rm gc}(T)}\right)} \right) \tau\_{\rm \mathcal{S}^c} \approx R\_{\rm Gint}(T) \cdot \mathbb{C}\_{\rm GC}(T) \tag{12}$$

where *CO* is the charge extraction capacitance and *VGE,ON* and *VGE,OFF* are the on-off gate driver voltages, respectively.

It is worth noting that the term *dVce*/*dt* depends on the physical parameters of the IGBT device and the temperature dependence is not easy to obtain. More specifically, the JT affects the *dVce*/*dt* through the MOS channel parameters such as the *Lch*, *Wch*, emitter recombination parameter, channel mobility, and so on. A detailed discussion of all the temperature parameter dependencies is given in [121]. The dependence of many parameters influencing the derivative quantities on the temperature strongly limits the use of this CM method for on-line JT measurement in practical power converter applications. A wide investigation of the IGBT maximum *dvce*/*dt* for the JT estimation has revealed the severe limits owing to the influence of the control method, the DC link voltage, and the load current [121]. Likewise, the maximum *dic*/*dt* during turn-off as a TSEP has been also investigated in [122]. Even in this case, the measurement of the current change rate has been performed using an additional circuit able to capture the current and voltage transient dynamics, which require both high bandwidth sensors and the use of voltage probes and Rogowski coil probes. Furthermore, this sensing circuit should be designed to avoid any disturbance, and it has to be insensitive to the temperature variation of the system.

In the recent generations of IGBT and SiC high power modules, the Kelvin emitter pin has been introduced. Such an additional pin involves in the package an integrated inherent parasitic inductance *LeE* between the Kelvin pin and power emitters pin [122–124], as shown in Figure 13. The transient collector current characteristic during the turn OFF process has been introduced as a potential DTSEP, called the maximum collector current falling rate −*dIC*/*dtmax* [125]: the collector current *IC* flows in the inductance *LeE* and the resulting voltage drop enables an easier investigation of the JT measurement.

Moreover, in [122], both the static and dynamic behaviors of the stored carriers in the IGBT collector current during the falling rate have been analyzed. Furthermore, the influences of the physical parameters of the device on the temperature sensitivity of −*dIC*/*dtmax* have been fully investigated. However, several drawbacks of these methods are related to the strong dependence of the applied voltage and the gate resistance, and the thermal characterization can only be done off-line.

**Figure 13.** IGBT module equivalent circuit.

#### 6.2.7. Peak Gate Current

An innovative method for JT measurement in IGBTs and MOSFETs, based on the temperature dependence of the internal gate resistance, has been studied in the last years. Firstly, the measure of *RGint* in a power module has already been investigated using a standard RLC meter [126], where a common approach is to consider the equivalent series resistance (ESR) of both the gate-emitter and gate-collector capacitance (see Figure 14a). Another method to estimate the *RGint* variation has been related to the measurement of the gate charge during the turn-on of the DUT [127]. Therefore, the peak gate current during the turn-on switching behavior has been assumed as a valid TSEP.

**Figure 14.** Gate driver RLC network. (**a**) Peak detector schematic to detect peak voltage over the external gate resistor (**b**).

JT measurement via the peak gate current can be studied during the standard charging cycles of the gate terminal. Considering an IGBT device, the turn-on process starts when the gate driver output voltage changes from a negative value to a positive one. Therefore, the gate current can be computed as the step response of a second-order RLC circuit [128] (see Figure 14a). The parasitic inductance *LG* can be neglected and the peak current can be estimated by simply using the Ohm's law, provided that the RLC circuit is overdamped. It is worth noting that the external gate resistance *RGext* does not have a significant temperature dependence. Therefore, the temperature variation of *RGint* can be carried out by the measurement of the peak current variation. In other words, the maximum value of the gate current provides a suitable strategy for the measurement of the chip JT. The measurement

circuit is shown in Figure 14b. The peak voltage on the external gate resistor during turn-on is measured with a peak detector circuit (a differential amplifier and a peak detector). Then, the acquired data are processed by an analog to digital converter to the microcontroller. This measurement circuit can be integrated into the gate driver, and the JT monitoring can be operated during the on-line operation of the converter. This method does not require calibration steps and, more importantly, the voltage peak has a linear relationship with the temperature.

Only a few works have focused on the peak gate current as a TSEPs method. More specifically, the sensing circuit depicted in Figure 14b has been proposed in [129–131], where the JT has been esteemed in an IGBT power module. The authors have asserted that the proposed method has better accuracy for JT measurement compared with other TSEP methods in the literature. However, this method requires additional complex trigger circuits for the measurement of JT, which may introduce additional disturbance into the system. It is worth remembering that the aging of the power module may affect the internal gate resistances. Hence, a correction factor should be introduced for calibration with the aging of the device.

#### **7. Comparison of the CM Methods**

Table 2 summarizes all the CM methods discussed previously. A comparison between the advantages and disadvantages of each approach is outlined.

Among the aforementioned optical CM methods, the use of fiber optic shows the highest accuracy and sensitivity. On the other hand, the device package has to be removed to carry out the temperature measurement. The optical methods based on the photodiode sensors and the use of the IR camera are able to operate contactless, without the lift-off of the device package. It is worth underlying that all the optical methods can be used during the on-line converter operations.

The acoustic method has been studied as a CM method for power devices in recent years. The strength of the proposed solution is owing to the ability to estimate the state of aging a power module and prevent any mechanics fatigue. It is worth remembering that it may be used during the on-line converter operations. In the literature, only a few papers have been focused on this CM method. Thus, the technology is not yet well mature to be widespread in commercial solutions.

It is worth highlighting that the physical and TTCs–NTC methods can be adopted for on-line JT measurements in a real power converter application. Furthermore, both CM methods show a strong linear dependence with the voltage and the temperature. As a drawback, method is almost obsolete and requires a device package modification. Meanwhile, the use of method needs a layout modification and it is strongly aging sensitive, hence the measurement setup has to be frequently calibrated. Moreover, the method based on the TTCs diode requires device layout modifications and shows poor linearity owing to a nonlinear dependence between the voltage drop of the diode and the temperature.

Finally, TSEPs methods have been widely used as CM methods for the estimation of the JT of the power devices, where the key point consists of correlating the temperature of the semiconductor material with the electrical quantities during the switching operation of the power device. More specifically, the TSEPs CM methods such as the on-state voltage under high current injection, the gate turn–off voltage, the turn on-off delay time, and the peak gate current enable the estimation of the JT during the on-line converter operations. Furthermore, the aforementioned CM methods exhibit high linearity between the voltage measurement and the temperature of the device.

On the other hand, the on-state voltage under high-level current injection, the gate threshold voltage, the saturation current, the gate turn-off voltage, and the voltage-current change rate require to switch off the power converter for the JT estimation. On the other hand, the aforementioned CM methods highlight the highest accuracy among the various TSEPs in the literature.


#### **Table 2.** Summary of different CM methods.

#### **8. Conclusions**

In this work, the main CM methods used to estimate the SOH of the semiconductor power devices were discussed and compared. The analysis has highlighted that the method based on the TSEP on-state voltage, measured under low currents injection, is the best one both for silicon and WBG power devices. Indeed, this CM method can involve a significant reduction of the experimental time duration of the calibration steps in comparison with other solutions. Furthermore, the experimental setup does not impact the device under test, i.e., the measurement does not degrade the electrical connections, the metallization, and the wire bonding. On the other hand, this method is not able to measure the junction temperature during the on-line converter operations. From this perspective, the TSEP methods based on the threshold voltage can be used during the on-line converter operations with comparable sensitivity and accuracy of the junction temperature estimation.

Finally, from the analysis of the literature arose the lack of studies of CM intrusiveness. Many CM methods have been presented so far, but only in a few cases do they discuss the intrusiveness of the proposed method, and very rarely do these works compare the intrusiveness of the proposed CM method with others. CM methods requiring the removal of the device package for temperature monitoring are intrusive for the device and this intrusiveness could make these CM methods impracticable in dusty or moist environments or in applications where atmospheric agents could damage the device. CM methods that need to shut down the converter are very intrusive for the converter operations and cannot be used in any application where the converter cannot shut down. Finally, a CM method adopting tools for the measurement, conditioning, elaboration, and so on is more of an encumbrance on the conversion system. This intrusiveness impedes their use in applications requiring high power density or, more in general, where the weight and encumbrance of the conversion system must be minimized. Therefore, accurate studies focusing on the CM intrusiveness, which also provide some figure of merits based on the previous aspects as well as the specific application, are strongly recommended.

**Funding:** This research received no external funding.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **References**

