*3.1. SOC Equalization of MMC-BESS*

As an important function of a PCS, SOC equalization of batteries must be achieved during operation of the MMC-BESS. Based on the structure of the MMC-BESS, the SOC equalization is divided into three levels: among three phases, between upper and lower arms, and among SMs within one arm. The definition of SOC is expressed as

$$\text{SOC} = \frac{\text{Storage Charges}}{\text{Nominal Capacity}} \times 100\% \tag{9}$$

The SOC of individual battery can be established as

$$SOC\_{k\bar{j}i}(t) = SOC\_{k\bar{j}i}(t\_0) + \frac{1}{E\_{b\\_k\bar{j}i}} \int\_{t\_0}^{t} P\_{b\\_k\bar{j}i} dt \tag{10}$$

where *Pb\_kji* is the individual battery power; *Eb\_kji* is the nominal energy of individual battery given by the production of battery voltage and its capacity. According to Equation (10), the SOC of individual battery can be controlled through the direct regulation of corresponding battery power. Since *Eb\_kji* may be different in individual SM due to the age of battery, the SOC equalization should take the capacity of individual battery into consideration. According to the research in Reference [15], battery capacity should be employed to produce the coefficient for corresponding SOC equalization control. For the sake of simplicity, it is assumed that all batteries are of the same capacity, which would not affect the following investigations in this paper.

The required power adjustments are generated through closed-loop controls of average SOC in corresponding levels as shown in Figure 4, where *Kph*, *Karm*, and *KSM* are the coefficients of SOC equalization controller each level. Since the battery side converters are employed to control the capacitor voltages, the SOC equalization must be achieved by MMC side control. Hence, the SOC equalizations are realized by adjusting the modulation waveforms at MMC side according to the power differences Δ*Pb\_k*, Δ*Pb\_kj,* and Δ*Pb\_kji* in Figure 4.

**Figure 4.** Three-level State-of-charge (SOC) equalization control. (**a**) SOC equalization among three phases. (**b**) SOC equalization between upper and lower arms. (**c**) SOC equalization among submodules (SMs) within phase arm.
