**3. DC Current Ripple Analysis**

### *3.1. DC Current Ripple Analysis of C-SVM*

In this analysis, the voltage drops by the power devices are neglected and the battery voltage is assumed constant. The load side model of the converter is given by:

$$w\_{dc} = V\_{\text{But}} + L \frac{di\_{dc}}{dt} \,. \tag{16}$$

Hence, the DC current ripple in one switching period can be obtained from (16) as follows:

$$
\Delta i\_{dc} = \frac{v\_{dc} - V\_{Rat}}{L} T\_s. \tag{17}
$$

From (17), it is clear that the DC current ripple depends on the instantaneous output voltage *vdc* of converter, switching period *Ts*, and output inductor *L*. Increasing the size of output inductor or switching frequency ( *Ts* = 1/ *fs*) can reduce DC current ripple, however, the size, cost, and switching losses of converter are increased. These solutions are not preferred in this paper.

In one switching period of C-SVM, two active vectors and one zero vector are used to synthesize the input current reference vector. DC current ripples of each vector in the sector I are derived by:

$$
\Delta i\_{dc1} = \frac{\upsilon\_{ab} - V\_{\text{Rat}}}{L} T\_1 \tag{18}
$$

$$
\Delta i\_{\rm dc2} = \frac{v\_{\rm ac} - V\_{\rm Bat}}{L} T\_2 \tag{19}
$$

$$
\Delta i\_{\rm dc0} = \frac{v\_0 - V\_{\rm Rat}}{L} T\_0. \tag{20}
$$

According to the location of input current reference vector in Figure 2 and the bilateral symmetric switching pattern, the peak-to-peak DC current ripple in one switching period is Δ*idc*0, as shown in Figures 7a and 8a.

**Figure 7.** DC current ripple waveforms under di fferent modulation strategies for AC–DC matrix converter at high modulation index. (**a**) C-SVM; (**b**) C-VSVM; (**c**) Proposed VSVM.

**Figure 8.** DC current ripple waveforms under different modulation strategies for AC–DC matrix converter at low modulation index. (**a**) C-SVM; (**b**) C-VSVM; (**c**) Proposed VSVM.

### *3.2. DC Current Ripple Analysis of Proposed VSVM*

In one switching period of the proposed VSVM, two active vectors and one or two zero vectors are used to synthesize the input current reference vector.

DC current ripples of each vector in the virtual sector I are derived by:

$$
\Delta \dot{i}\_{dc1} = \frac{v\_{ab} - V\_{Bat}}{L} \left(\frac{T\_a}{2}\right) \tag{21}
$$

$$
\Delta i\_{dc2} = \frac{v\_{ac} - V\_{Rat}}{L} \left(\frac{T\_a}{2} + \frac{T\_b}{2}\right) \tag{22}
$$

$$
\Delta \dot{i}\_{dc3} = \frac{v\_{bc} - V\_{Bat}}{L} \left(\frac{T\_b}{2}\right) \tag{23}
$$

$$
\Delta \dot{i}\_{dc0} = \frac{v\_0 - V\_{Bat}}{L} T\_0. \tag{24}
$$

According to the location of the input current reference vector in Figure 3 and the switching pattern, the peak-to-peak DC current ripples in one switching period are Δ*idc*0 at high-modulation operation, as shown in Figure 7c, and Δ*idc*2 at low-modulation operation, as shown in Figure 8c.

The goal of VSVM is reducing the switching period of the switching vector, which has the longest switching period, according the amplitude of input current reference vector in one switching period. In C-SVM, it can be seen from Figure 2 that the switching period of active vector → *I* 2 is longest and greater than the switching period of active vector → *I* 1, expressed as:

$$T\_2 > T\_1 \tag{25}$$

hence

$$T\_2 > \frac{T\_1 + T\_2}{2} \tag{26}$$

then

$$T\_2 > \frac{T\_s - T\_0}{2}.\tag{27}$$

In the proposed VSVM, applying a similar manner as in C-SVM and using (13–15), the switching period of active vector → *I* 2 is expressed as:

$$T\_2 = T\_1 + T\_3 \tag{28}$$

hence

then

$$T\_2 = \frac{T\_1 + T\_2 + T\_3}{2} \tag{29}$$

$$T\_2 = \frac{T\_s - T\_0}{2}.\tag{30}$$

As it can be seen from Figure 7, the switching period of zero vector of C-SVM, C-VSVM, and proposed VSVM is almost the same, however, the longest switching period is active vector → *I* 2 and reduced by VSVM. Thus, the increasing of DC current ripple is lower than in the conventional strategy, resulting in a reduction in the DC current ripple of VSVM at high-modulation operation. The proposed switching patterns further reduce the DC current ripple compared with the conventional switching pattern of VSVM. In addition, the switching period of zero vector is the longest period at low-modulation operation, thus the optimized switching patterns for zero vector are proposed in this paper to further reduce the DC current ripple of AC–DC MC. Figure 8 presents the DC current ripples under di fferent modulation control strategies at low-modulation operation. As it can be seen from Figure 8, the switching period of zero vector is divided into two intervals by the proposed switching pattern. Hence, the continuous reduction of DC current is avoided compared with the switching patterns of C-SVM and C-VSVM, resulting in the reduction in DC current ripple.
