3.1.1. SOC Equalization among Three Phases

Seen from Figure 3 and Equation (7), the total battery power within one phase is composed by DC power and AC power, so the battery power can be regulated by these two components. Nevertheless, due to the power control requirement at AC side, the AC powers must be symmetric in three phases under a balanced AC grid. Hence, to equalize the SOCs among phases, DC power should be regulated at each phase.

When the MMC-BESS operates as an inverter, the DC-link voltage is fixed to the system and the DC side would be controlled as the current sources each phase independently [17]. However, when the MMC-BESS operates as a rectifier, this manner would be invalid because the DC-link must be controlled as a voltage source by the DC side control of MMC-BESS. With the individual capacitor voltage controlled by battery side converter, the DC side equivalent circuit of MMC-BESS can be present as Figure 5. The capacitors behave as a controllable voltage source, then the DC-link voltage should be controlled by three-phase DC circulating current collectively. Therefore, the DC side control is proposed based on this DC side equivalent circuit in this paper as shown in Figure 6.

**Figure 5.** DC side equivalent circuit of the MMC-BESS.

**Figure 6.** DC-link voltage control diagram.

In Figure 6, the DC-link voltage is regulated by a proportional–integral (PI) controller. The coefficient *Ksoc\_k* is employed to redistribute the DC power among the three phases according to the difference power in Figure 4a as:

$$K\_{\rm SOC\\_k} = \frac{V\_{dc}I\_{dc}/3 + \Delta P\_{b\\_k}}{V\_{dc}I\_{dc}}\tag{11}$$

when the SOCs of three phases have been equalized, *Ksoc\_k* would be 1/3 consequently, which means DC power is equally divided by three phases. Through the proposed DC-link voltage control, the DC circulating current reference is generated by each phase.

### 3.1.2. SOC Equalization between Upper and Lower Arms

According to Equation (8), the fundamental frequency circulating current can transfer power between the upper and lower arms within one phase. With the difference power generated by SOC equalization controller in Figure 4b, the fundamental frequency circulating current reference can be obtained. Due to the demand of preventing fundamental frequency circulating current per phase from flowing into DC-link, the reactive components are injected into the other two phases as [11]:

$$
\begin{bmatrix} i\_{1\boldsymbol{a}\boldsymbol{f}}^{\boldsymbol{ref}} \\ i\_{1\boldsymbol{b}\boldsymbol{f}}^{\boldsymbol{ref}} \\ i\_{1\boldsymbol{b}\boldsymbol{\varepsilon}}^{\boldsymbol{ref}} \end{bmatrix} = \frac{2}{V\_{\mathcal{S}}} \begin{bmatrix} \cos\boldsymbol{\varrho} & -\frac{1}{\sqrt{3}}\sin\boldsymbol{\varrho} & \frac{1}{\sqrt{3}}\sin\boldsymbol{\varrho} \\ \frac{1}{\sqrt{3}}\sin(\boldsymbol{\varrho} - \frac{2\pi}{3}) & \cos(\boldsymbol{\varrho} - \frac{2\pi}{3}) & -\frac{1}{\sqrt{3}}\sin(\boldsymbol{\varrho} - \frac{2\pi}{3}) \\ -\frac{1}{\sqrt{3}}\sin(\boldsymbol{\varrho} + \frac{2\pi}{3}) & \frac{1}{\sqrt{3}}\sin(\boldsymbol{\varrho} + \frac{2\pi}{3}) & \cos(\boldsymbol{\varrho} + \frac{2\pi}{3}) \end{bmatrix} \begin{bmatrix} P\_{diff}^{\boldsymbol{ref}} \\ P\_{diff}^{\boldsymbol{ref}} \\ P\_{diff}^{\boldsymbol{ref}} \\ P\_{diff}^{\boldsymbol{ref}} \end{bmatrix} \tag{12}
$$

where

$$P\_{diffk}^{ref} = \frac{\Delta P\_{b\\_kp} - \Delta P\_{b\\_ku}}{2} \tag{13}$$

Since DC and fundamental frequency components are required to be controlled in the circulating current each phase, a proportional–integral–resonant (PIR) controller tuned at fundamental frequency and double line-frequency was employed to regulate components at different frequencies simultaneously, as shown in Figure 7. In this paper, the reference of double line-frequency component *ire f* 2*k*was set as zero to reduce the power losses [13].

**Figure 7.** Circulating current control diagram.

### 3.1.3. SOC Equalization among SMs within Phase Arm

Since all SMs within the same phase arm share a common arm current, the individual SM power must be regulated by redistributing the terminal voltage without a ffecting the output voltage of the whole arm. Based on the former two SOC equalization controls, the total power of the phase arm can be generated as

$$P\_{b\\_kj}^{ref} = \frac{P\_{ac} - P\_{dc}}{6} - \frac{\Delta P\_{b\\_k}}{2} - \Delta P\_{b\\_kj} \tag{14}$$

Consequently, the individual battery power reference was obtained through the SOC controller in Figure 4c as:

$$P\_{b\\_kji}^{ref} = \frac{P\_{b\\_kj}^{ref}}{N} - \Delta P\_{b\\_kji} \tag{15}$$

Defining the power ratio of individual SM according to the battery power as:

$$m\_{kji} = \frac{P\_{b\\_kji}^{ref}}{\sum\_{i=1}^{N} P\_{b\\_kji}} \tag{16}$$

By multiplying *mkji* with the arm voltage reference *vkj*, the SM power can be regulated according to the SOC equalization control within phase arm. With the constraint as:

$$\sum\_{i=1}^{N} m\_{kji} = 1\tag{17}$$

the output voltage of the whole arm would not be a ffected by the SOC equalization within phase arm.

### *3.2. Control Strategy of MMC-BESS Based on Battery Side Capacitor Voltage Control*

According to the equivalent circuit in Figure 3, the control strategy of the MMC-BESS mainly consists of three parts: DC side control, AC side control, and battery side control. With the capacitor voltage controlled by the battery side converter, each SM, DC, and AC side control of the MMC are simplified in this paper. As per the analysis in Section 2, when the MMC-BESS operates as a rectifier in multi-terminal MMC-based applications, the output of the DC-link voltage controller cannot be employed as the reference of the active current at the AC side. Hence, the DC-link voltage control was proposed by regulating the DC circulating current at each phase according to the SOC equalization among three phases, as per Figure 6. On the other hand, the AC side should be controlled in a way in which the active and reactive powers are given directly according to the system's requirement [13]. By doing this, AC power is directly controlled by the reference, DC power is determined by external DC network, and battery power is controlled indirectly by capacitor voltage control.

The overall control strategy of the MMC-BESS based on battery side capacitor voltage control is shown in Figure 8.

The SOC equalization of all three levels are implemented by the MMC side control according to the proposed control strategies in Section 3.1. The common modulation waveform of the individual phase arm is generated by AC and DC side controls of the MMC, then the modulation waveform of individual SMs is generated by the power redistribution ratio according to Equation (16). Finally, carrier phase-shifted pulse-width modulation (CPS-PMW) is utilized to generate the pulse signal for MMC side-switching devices [20]. On the other hand, the implementation of battery side capacitor voltage control will be introduced in the next section.

**Figure 8.** Overall control strategy of the MMC-BESS based on battery side capacitor voltage control.

### **4. Implementation of Battery Side Control Strategy**

The local circuit of the individual bidirectional DC/DC converter with control diagram is shown in Figure 9, where the MMC side is taken as the load for the battery side represented as the current *iM\_kji*. The midpoint voltage of the battery side half-bridge *vT-kji* is taken as the input of the bidirectional DC/DC converter. In Figure 9, *GVR* and *GCR* are voltage and current regulators, respectively; The time delay caused by PWM is defined as *Gd*, which is treated as 1.5*Tsb* [21]. Here, *Tsb* is the switching period of the battery side DC/DC converter.

**Figure 9.** Local circuit of the bidirectional DC/DC converter with control diagram.

Although some research on the control strategy of bidirectional DC/DC converters has been published [21,22], the application of MMC-BESS still has special issues which should be investigated. The control targets are the individual capacitor voltage *vc\_kji* with a stable DC component and the battery current *ib\_kji* without a low-frequency AC component. However, the voltage ripples (mainly at fundamental and double-line frequency) caused by operation of the MMC side would bring negative influence to the DC/DC converter control. To eliminate these ripples, the filter block *GF* is employed as shown in Figure 9, but the type of *GF* should be discussed. Since moving average filter (MAF) can attenuate components in specific frequencies [23], it is especially suitable for filtering harmonics in capacitor voltage of MMC-BESS. The transfer function of MAF in discrete domain is

$$G\_F = \frac{1}{N\_F} \frac{1 - z^{-N\_F}}{1 - z^{-1}} \tag{18}$$

where *NF* is the number of sampling data stored in the digital processor. However, since the switching frequency of an individual DC/DC converter is usually well above the fundamental frequency at

the MMC side, it will lead to the requirement of a large amount of data storage space in the DC/DC converter control. For example, for a sampling frequency (equal to the switching frequency of DC/DC converter) *fsb* = 10 kHz and fundamental frequency of MMC side *f* = 50 Hz, *NF* is given by *fsb*/*f* = 200. With the increment of the number of SMs in the series per phase arm, the data storage space required by the MAFs would consequently become large-scale. To avoid the defect of large-scale data storage space in this application, a common MAF scheme shared by all SMs per arm is proposed in this paper.

The MMC side current *iM\_kji* in Figure 9 can be expressed as:

$$\begin{cases} i\_{M,k\bar{p}i} = i\_{\bar{k}\bar{p}} m\_{k\bar{p}i} = \left(\frac{I\_{\bar{\xi}}\cos(\omega t + \varphi)}{2} + I\_{d\bar{k}} + I\_{1\bar{k}}\cos(\omega t + \varphi\_{1\bar{k}})\right) \left(m\_{\mathrm{d\!c\!-k\!p\!i}} - m\_{\mathrm{a\!c\!-k\!p\!i}}\cos\omega t\right) \\\ i\_{M,\mathrm{kwi}} = i\_{\mathrm{kn}} m\_{\mathrm{kwi}} = \left(-\frac{I\_{\bar{\xi}}\cos(\omega t + \varphi)}{2} + I\_{\mathrm{d\!c\!k}} + I\_{1\bar{k}}\cos(\omega t + \varphi\_{1\bar{k}})\right) \left(m\_{\mathrm{d\!c\!-k\!p\!i}} + m\_{\mathrm{a\!c\!-k\!p\!i}}\cos\omega t\right) \end{cases} \tag{19}$$

Then the individual capacitor voltage can be derived as:

$$\begin{cases} v\_{c\\_kpi} = \frac{1}{C} \int (i\_{M\\_kpi} + i\_{B\\_kpi})dt + v\_{c\\_kpi\\_0} \\ v\_{c\\_kwi} = \frac{1}{C} \int (i\_{M\\_kwi} + i\_{B\\_kwi})dt + v\_{c\\_kwi\\_0} \end{cases} \tag{20}$$

where the *vc\_kpi\_*0 and *vc\_kpi\_*0 are initial voltages of capacitors in the upper and lower arms, respectively. The DC component of the capacitor current must be zero, otherwise the capacitor voltage would be instable with time, which can be deduced as

$$\begin{cases} m\_{dc\\_kpi}I\_{dck} - \frac{1}{4}m\_{ac\\_kpi}I\_{\underline{\mathcal{S}}}\cos\varphi - \frac{1}{2}m\_{ac\\_kpi}I\_{1k}\cos\varphi\_{1k} + i\_{B\\_kpi} = 0\\ m\_{dc\\_kni}I\_{dck} - \frac{1}{4}m\_{ac\\_kni}I\_{\underline{\mathcal{S}}}\cos\varphi + \frac{1}{2}m\_{ac\\_kni}I\_{1k}\cos\varphi\_{1k} + i\_{B\\_kni} = 0 \end{cases} \tag{21}$$

Substituting Equations (19) and (21) into (20), the average ripples of individual capacitors are derived as:

$$\begin{cases} \frac{1}{N} \sum\_{i=1}^{N} \widetilde{\boldsymbol{v}}\_{c, \text{lpi}} &= \frac{1}{a\mathcal{C}} (-\frac{1}{4} I\_{1k} m\_{\text{ac\\_{kp}}} \sin(2\omega t + \varphi\_{1k}) + I\_{1k} m\_{\text{dc\\_{kp}}} \sin(\omega t + \varphi\_{1k}) \\ & - \frac{1}{8} I\_{\mathcal{S}} m\_{\text{ac\\_{kp}}} \sin(2\omega t + \varphi) + \frac{1}{2} I\_{\mathcal{S}} m\_{\text{dc\\_{kp}}} \sin(\omega t + \varphi) - I\_{\text{dc\\_{kp}}} m\_{\text{dc\\_{kp}}} \sin\omega t \\ \frac{1}{N} \sum\_{i=1}^{N} \widetilde{\boldsymbol{v}}\_{c, \text{lpi}} &= \frac{1}{a\mathcal{C}} (\frac{1}{4} I\_{1k} m\_{\text{ac\\_{kp}}} \sin(2\omega t + \varphi\_{1k}) + I\_{1k} m\_{\text{dc\\_{kp}}} \sin(\omega t + \varphi\_{1k}) \\ & - \frac{1}{8} I\_{\mathcal{S}} m\_{\text{dc\\_{kp}}} \sin(2\omega t + \varphi) - \frac{1}{2} I\_{\mathcal{S}} m\_{\text{dc\\_{kp}}} \sin(\omega t + \varphi) + I\_{\text{dc\\_{kp}}} m\_{\text{dc\\_{kp}}} \sin\omega t \end{cases} \tag{22}$$

Seen from Equations (20) and (22), the battery side current *iB\_kji* affects the DC component in capacitor voltage, while the individual capacitor voltage ripples are mainly decided by the common arm current flowing through all SMs per phase arm. It can be proved by the simulation waveforms in Figure 10, the individual battery power differentiated from each other up to ±40%, and the corresponding capacitor voltage ripples were almost identical due to the common arm current.

**Figure 10.** Capacitor voltages within one phase arm under unbalanced battery powers. (**a**) Unbalanced battery currents within phase arm. (**b**) Capacitor voltages within phase arm.

Based on the analysis above, an improved control strategy of a battery side DC/DC converter with the data storage space reduction of MAF is proposed in Figure 11. In this scheme, a common MAF was employed to extract the average capacitor voltage ripples of all SMs per phase arm, then the individual capacitor voltage ripples were counteracted by the average capacitor voltage ripples. Through the common MAF, the occupied data storage space can be reduced to 1/*N* compared with the original scheme implemented in each SM.

**Figure 11.** Improved control strategy based on moving average filter (MAF) for individual bidirectional DC/DC converter.

On the other hand, since the capacitor voltage was controlled by the individual DC/DC converter, the dynamic response was expected to be fast enough for MMC side power conversion. However, due to the existence of the MAF, the bandwidth of the voltage control loop cannot exceed the cut-off frequency of the MAF, which is unacceptable in application. Seen from Figure 9, the reference of the capacitor voltage was constant during normal operation of the MMC-BESS, hence, the disturbance from the MMC side *iM\_kji* is the exclusive factor that causes the fluctuation of the DC capacitor voltage. To eliminate the load disturbance, the load current feedforward can be implemented. However, the measurement of MMC side load in individual SM would greatly increase the cost of the system, and *iM\_kji* is a current in pulse form which is different from ordinary bidirectional DC/DC converter. Therefore, the load disturbance was mitigated by estimated battery current in this paper as:

$$I\_{ff\\_kji} = \frac{1}{\upsilon\_{b\\_kji}} (\frac{\mathfrak{D}v\_{\otimes l}i\_{\otimes l}/2 - V\_{dc}I\_{dc}}{6N} - \frac{\Delta P\_{b\\_k}}{2N} - \frac{\Delta P\_{b\\_k j}}{N} - \Delta P\_{b\\_kji}) \tag{23}$$

This estimated feedforward component was calculated based on the instantaneous power relationship in Equation (5), where the AC and DC powers were derived from measured values instead of the reference values, representing the dynamics of power flows in real time. Then the feedforward

component was redistributed into each SM according to the SOC of individual battery. Consequently, the dynamic performance of the individual capacitor voltage control can be significantly improved.

Finally, the improved control strategy in Figure 11 can be simplified as Figure 12 through the block diagram transformation. *Dkji* is the ratio of capacitor voltage and individual battery voltage. The MAF block in Figure 11 is equivalent to the configuration in individual feedback loop in Figure 12. With this simplified control diagram, the design of controllers of capacitor voltage and battery current is convenient to be implemented using the control system theory.

**Figure 12.** Simplified control block diagram of the individual DC/DC converter.
