**6. Experimental Results**

The proposed control system was further validated on a prototype grid-connected VSI that was used in a laboratory setup, as shown in Figure 12. The experimental parameters of the prototype were similar to those that were assumed in the simulation study, as shown in Table 2. The control system was configured using a DSP named TMS320F28377. In addition, 10-FZ12NMA080SH01-M260F-3 from Vincotech was employed to configure the three-level inverter system. To ensure a fair comparison of these methods, the experimental conditions were the same as those that were assumed in the simulation study. Thus, the limited error band |*Elimit*| was also set at 2.6 V, which was similar to that in the simulation. To verify the effectiveness of the proposed method in the deadbeat DSVM-MPC, it was compared against the conventional neutral-point balancing method [20].

**Figure 12.** Experimental setup.

Figure 13 shows the experimental results for the grid current of the deadbeat DSVM-MPC, for both balancing methods. Similarly to the simulation results, it was observed that the proposed balancing method demonstrated a good capability of balancing the deviation of the top and bottom capacitance voltages. As can be seen, before applying either of the balancing methods, the difference between the top and bottom capacitor voltages was very high, and the output current became distorted owing to the neutral-point voltage imbalance. However, when the neutral-point voltage was balanced, the distortion of the output current disappeared. Figure 14 shows the experimental results for the dynamic current performance from 10 A to 7 A for the deadbeat DSVM-MPC system, using both the conventional and the proposed balancing methods. As can be seen, the settling time was very short because the MPC method was used. However, the proposed balancing method exhibited lower THD by around 4.9% before and after the current reference change, when compared with the conventional neutral-point balancing method [20].

**Figure 13.** Experimental results of capacitance voltage balancing for deadbeat DSVM-MPC. (**a**) Conventional balancing method [20]. (**b**) Proposed balancing method.

**Figure 14.** Experimental results of current dynamic response for deadbeat DSVM-MPC for the (**a**) conventional balancing method [20] and (**b**) proposed balancing method.

Figure 15 shows the comparison of the hardware computation time of the deadbeat DSVM-MPC system, without weighting factors, for the control method in Reference [20] and the proposed method. As can be seen, the computation time required by the proposed deadbeat DSVM-MPC method was reduced by 12.30% when compared to the method from Reference [20]. This indicates the simplicity of the proposed algorithm.

**Figure 15.** The hardware execution time. (**a**) Deadbeat FS-MPC with extra cost function [20]. (**b**) Proposed method.
