*4.2. Simulation Results*

An availability study should ensure that voltage corrections can be managed with limited calculation capability. The analysis of the charging and discharging sections (2.5–4.5 and 5–7 seconds), which were the main focus of this analysis are explained sequentially. Figure 9 shows the delay effect that can be derived from the multistring topology compared to the pre-analyzed method (strict-voltage, voltage-estimation). It can be confirmed that both charging and discharging are not significantly affected by the delay. The output control was observed to be performed substantially in the same manner as the accuracy improvement method without any delay. In the multistring topology, it was confirmed that the control signal can be derived within the maximum calculation load. Figure 10; Figure 11 show the delay effects that can be derived from the central topology. It can be confirmed that the influence of the delay occurs in both places, however, the control proceeds within a range that did not reach the strict-voltage method. In the case of Figure 11, including the maximum calculation load, an error occurs with a high probability, but it was confirmed that the occurrence of the delay was not frequent.

**Figure 9.** ESS states for multistring topology with 100 ms interval (**a**) extracted power quantity in the discharging section (2.5 to 4.5 s); (**b**) absorbed power quantity in the charging section (5 to 7 s).

**Figure 10.** ESS states for central topology with 200 ms interval (**a**) extracted power quantity in the discharging section (2.5 to 4.5 s); (**b**) absorbed power quantity in the charging section (5 to 7 s).

**Figure 11.** ESS states for central topology with 400 ms interval (**a**) extracted power quantity in the discharging section (2.5 to 4.5 s); (**b**) absorbed power quantity in the charging section (5 to 7 s).

Table 4 shows the errors in terms of power support for designed scenarios. Compared to the ideal case (voltage-estimation without delay), the multistring topology could lose minor accuracy in terms of power support, and the central topology with 5 Hz calculation frequency shows less than 5 percent mismatch. It seems that a large mismatch can be induced with the central topology when considers maximum calculation load, however, it is expected to be generated on the oversized PV scale. The utilized signal correction scheme seems to be available with a normalized PV system in consideration of the possible delay ranges.


**Table 4.** Comparison data for designed simulation.
