**5. Conclusions**

A synchronization scheme for systems with heterogeneous chaotic behavior was implemented in an FPGA, this synchronization scheme can synchronize a pair of chaotic systems defined by a different number of pieces, is possible to apply the scheme to UDSs which is a kind of generalization for synchronization of piecewise systems with different quantities of pieces on the master and slave systems, which allows the use in a wide variety of applications in science and engineering. The synchronization scheme gives to the slave system a the dynamics of the master system. The synchronization scheme is designed taking into account the error system between the master and the slave, adding a parameter matrix *P* that controls the synchronization speed, whenever the parameter is adequate. The controller guarantees a fast synchronization with a minimum error.

**Author Contributions:** Conceptualization, J.R.P.-L., J.A.L.-R. and N.R.C.-C.; methodology, J.R.P.-L., J.A.L.-R. and N.R.C.-C.; validation, J.R.P.-L., J.A.L.-R. and N.R.C.-C.; writing–original draft J.R.P.-L., J.A.L.-R. and N.R.C.-C.; Writing–review and editing, J.R.P.-L., J.A.L.-R. and N.R.C.-C. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research was funded by CONACyT gran<sup>t</sup> number A1-S-32341 and TecNM gran<sup>t</sup> number 8085.20-P.

**Acknowledgments:** J.R.P.-L. would like to thank CONACyT for the master's degree scholarship.

**Conflicts of Interest:** The authors declare no conflict of interest. The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.
