**4. Conclusions**

In this paper, a novel CMOS voltage-reference circuit with high PSRR and wide-range supply independence was proposed and designed for a subretinal prosthetic system. The proposed NSC reduced the supply ripples significantly and sank out undesired signals in the reference voltage. Experimental results exhibited good agreemen<sup>t</sup> with the proposed concept and demonstrated better performance in supply independence and PSRR, when compared to the previous works. The proposed circuit provided a constant output voltage of 1.37 V and exhibited 10 mV variations over the supply range from 2.1 V to 5 V, resulting in a line regulation of 3.45 mV/V. The maximum PSRR was observed to be −93 dB for frequencies below 1 kHz. The current proof-of-concept prototype was implemented on a single chip with the LDO circuit, using a standard 0.35 μm CMOS process. The proposed reference design occupied an active area of 0.0131 mm2. Considering the high precision and small size design, this novel reference circuit can be used for implantable devices such as retinal prostheses and cochlear implants. As a future work, we will integrate the proposed reference circuit and LDO onto a single chip along with other functional blocks such as a demodulator, digital control, and high-density stimulator array.

**Author Contributions:** Conceptualization, R.B.A.Z., and J.K.; methodology, R.B.A.Z. and J.K.; formal analysis, R.B.A.Z., H.C., and J.K.; writing—original draft preparation, R.B.A.Z., H.C., and J.K.; writing—review and editing, R.B.A.Z., H.C., and J.K.; supervision, H.C., and J.K.; project administration, J.K.; funding acquisition, J.K. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research was partially supported by the National Research Foundation of Korea (Grant No. NRF-2017M3A9E2056461) and the Gachon University Research Fund (2018-0324). This work was supported by the National Research Foundation of Korea gran<sup>t</sup> funded by the governmen<sup>t</sup> (MSIT) (No. 2020R1A2C4001606).

**Acknowledgments:** The authors would like to express their sincerest appreciation to the IC Design Education Center for chip fabrication.

**Conflicts of Interest:** The authors declare no conflict of interest.
