*3.3. Single Junction Solar Cell with A 3D Nano-Patterned ZnO Layer*

The inverted devices have a structure of ITO/ZnO/P3HT:PCBM (200 nm)/PEDOT:PSS (100 nm)/Al (100 nm) with a different ripple size of the ZnO layer. Figure 4 shows J-V characteristics of the inverted devices made with P3HT:PCBM under 100 mW/cm2 illumination. The performance characteristics of the OSCs are summarized in Table 3. Devices A to D were fabricated in a low-temperature process, with an annealing temperature of 150 ◦C for 10 min and different drying times. The drying time was 3000, 300, 60, and 10 min for devices A, B, C, and D, respectively. As previously shown in Table 2, the drying time modifies the pattern size (RPtoV) for a fixed temperature. Only drying time was controlled to change the 3D pattern size (RPtoV), in order to exclude the effects of the annealing temperature on the film properties, such as conductivity. The J-V curve that is labeled device E shows the characteristics of OSC, with the ZnO layer being made by the ramping method. Even though the ramping method could give a slightly better conductivity as shown in Table 1, the overall characteristic of device D shows similar characteristic with device E. The short circuit current (JSC) and FF increase as the ZnO pattern size increases, while VOC does not show a significant change. As a result, the device with 120 nm RPtoV has the best performance, with 3.4% of PCE. The improvements on the JSC and FF are based on the efficient charge collection properties, by introducing a patterned ZnO layer. Due to the efficient carrier extraction, the space charge-inducing resistance near ECL will be reduced. When the pattern size of ZnO increases from 80 to 120 nm, an expectable result is a decrease in the series resistance. The series resistances extracted by the slope of the J-V curve at the VOC were 27, 25, 21, and 21 <sup>Ω</sup>·cm<sup>2</sup> for device A, B, C, and D, respectively.

**Figure 3.** Atomic force microscopy (AFM) images of the ZnO nano-ripple, (**a**) the low temperature processed (10 minutes of drying time and annealing temperature of 150 ◦C) and (**b**) the ramping method.

**Figure 4.** Current–voltage characteristics of the solar cells with different nano-patterned sizes of the ZnO electron-collecting layer (ECL). (ramp.) stands for the ramping method.

**Table 3.** The summary of the key parameters of the single junction organic solar cells (OSCs), with different nano-ripple pattern sizes. Devices A to D were fabricated by the low-temperature method, while device E was fabricated by the ramping method.


To assess the effect of ZnO layer on the electrical properties of the device more deeply, we examined the charge collection probability (Pcollection) in the cells, according to the method proposed by Kyaw et al. [33]. A photo-generated current (Jph) is saturated at the high internal voltage (Vint) region, due to the large enough internal field extracted all generated charges. Therefore, the saturated photocurrent (Jph,saturation) can be written as following equation, while the value is limited only by the number of absorbed photons:

$$\mathbf{J}\_{\text{ph}, \text{saturration}} = \mathbf{q} \mathbf{L} \mathbf{G}\_{\text{max}} \tag{1}$$

q is the elementary charge, L is the thickness of the active layer, and Gmax is the maximum photoinduced carrier generation rate per unit volume. However, in a low internal voltage region, the Jph is proportional to the Pcollection in the cells. Therefore, the equation 1 can be written as:

$$\mathbf{J}\_{\text{ph},\text{saturation}} = \mathbf{q} \mathbf{L} \mathbf{G}\_{\text{max}} \; \mathbf{P}\_{\text{collection}} \tag{2}$$

From Equations (1) and (2), Pcollection can be calculated by normalizing Jph with Jph,saturation.

Figure 5 shows the charge collection probability with respect to internal voltage (Vint) under illumination of 100 mW/cm2. As shown in Figure 5, the overall charge collection probability of the inverted devices with ZnO increased, as the pattern size increases. The increment in charge collection probability is more significant at low Vint (high applied voltage). The observed increment of charge collection probability in the nano-patterned ZnO devices is well-matched with the JSC characteristic of the OSCs.

**Figure 5.** Charge collection probability as a function of the internal voltage for cells with different ZnO nano-pattern size.

## *3.4. Tandem Solar Cell with Low-Temperature Processed ZnO*

Photoactive layers with complementary absorption range were used as sub-cells of the tandem device. P3HT:ICBA was selected as the active layer for the bottom cell (device F and G). ICBA was selected as the acceptor, because the P3HT:ICBA active layer forms its optimal morphology in higher annealing temperature when compared with P3HT:PCBM [34–36]. Therefore, the P3HT:ICBA system promises a lower thermal degradation for tandem device fabrication, compared with the P3HT:PCBM system. The PTB7:PC70BM active layer is selected for the top cell (device H and I). Instead of thermal annealing, the solvent annealing method was used for the PTB7:PC70BM active layer, to minimize the thermal effect on the underneath layers in the tandem device process [37]. The sub-cells have the structure: ITO/ZnO (150 nm)/P3HT:ICBA (100 nm) or PTB7:PC70BM (150 nm)/PEDOT:PSS (120 nm)/Au (100 nm). The details of structure and photovoltaic devices performance are summarized in Table 4. Figure 6 presents the effect of the ZnO ripple pattern on the performance of each sub-cell. Among the devices F to I, devices with patterned ZnO show better JSC and PCE. Likewise in the device with P3HT:PCBM, the increment of charge collection probability in the nano-patterned ZnO layer is the origin of these improvements. The inverted tandem devices have a structure of ITO/ZnO (150 nm)/P3HT:ICBA (100 nm)/PEDOT:PSS (120 nm)/ZnO (150 nm)/PTB7:PC70BM (150 nm)/PEDOT:PSS/Au (100 nm). The VOC values of fabricated tandem devices are much higher than VOC of each sub-cell (Table 4). This means that the sub-cells were series connected through CRL. VOC of P3HT:ICBA device and PTB7:PC70BM device is 0.78 and 0.73 V, respectively. Therefore, ideally expected VOC for tandem device is 1.5 V. Comparing this ideal value with VOC of the fabricated tandem devices, there was only slight loss at around 0.1 to 0.2 V. A tandem device with a 3D nano-patterned ZnO (device K) shows a higher VOC, JSC, and FF than the device with pristine ZnO (device J). A better work function matching of CRL with active layers, efficient electron extraction, and electron-hole balance in the device are the reasons for this improvement [38,39]. A highly efficient carrier recombination characteristic of the CRL in a patterned ZnO layer reduced charge accumulation effect. Finally, the best device achieved a VOC of 1.38 V, a JSC of <sup>−</sup>7.2 mA/cm2, a FF of 49%, and PCE of 4.8%.


**Table 4.** The summary of the key parameters of the OSCs extracted from the J-V measurements. ECL stands for the electron collecting layer (ZnO layer).

**Figure 6.** The J-V characteristics of the OSC devices with and without a ZnO patterned layer as ECL.

#### **4. Conclusions**

We developed a new method for patterning the ZnO layer by a low temperature (under 150 ◦C) solution process. A solution-processable ZnO layer shows proper electrical characteristics for OSCs even with a low temperature process. Nano-ripple pattern was fabricated to maximize the interface between the ZnO layer and the photoactive layer. In a single-junction device, PCE was about 30% higher when the ZnO layer was patterned. Finally, developed low-temperature processable nano-patterned ZnO was introduced in the tandem structure. The best tandem device has VOC of 1.38 V and PCE of 4.8%, showing nearby 30% PCE improvement, compared to the non-patterned injection layer. It is shown that main improvement results from the charge extraction probability improvement, due to the nano-ripple patterned layer.

**Author Contributions:** J.W.C., Y.B., and B.G. conceived and designed the experiments; J.W.C., J.W.J., and D.T. performed the experiments; J.W.C. and B.G. analyzed the data; J.W.C. and B.G. wrote the paper.

**Acknowledgments:** J.C. would like to thank ED Polytechnique for the PhD funding.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **References**


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