**2. Experimental**

#### *2.1. Materials and Thin Films Preparation*

#### 2.1.1. TSV Metallization

The cobalt metal-organic chemical vapor deposition (Co-MOCVD) process enables manufacturing an adhesive and conformal thin film all the way through the TSVs, in comparison with the conventional non-conformal copper physical vapor deposition (Cu-PVD) process as a seed layer. However, the Co-MOCVD metallization mode requires achieving a proper seed layer with less organic contamination (e.g., carbon) which would intensify the Co corrosion under the Cu electrolyte influence. Due to the electroplating bath chemistry, and especially because of the Cu electrolyte component, the Co thin film is prone to corrosion during electrochemical deposition (ECD). The Cu ions content have grea<sup>t</sup> influence on Co corrosion. The redox reaction of Cu solidification is a fast corrosive factor. If the concentrations of the components are high enough in electrolyte, the cobalt corrosion reaction is faster than the Cu deposition. Due to this comparable faster dissolution of Co seed layer, there will most likely be non-copper-plated areas after the deposition process on the bottom of TSVs.

seed layer, there will most likely be non-copper-plated areas after the deposition process on the 

Figure 1 schematically shows the structure (Figure 1a) and the corroded bottom sidewalls after electroplating (Figure 1b). With respect to the Co layer, the TSVs' elemental and compositional depth profiles, especially on the bottom sidewall, were investigated before and after Cu-ECD. ToF-SIMS is used to measure the relative Co content in order to determine which combination of parameters yielded the highest and most stable amount of Co. The amount of Co ions result from ion gun sputtering through the depth of deposited films. Eventually, the comparative study with TEM was carried out to reveal the reliability of ToF-SIMS measurement. bottom of TSVs. Figure 1 schematically shows the structure (Figure 1a) and the corroded bottom sidewalls after electroplating (Figure 1b). With respect to the Co layer, the TSVs' elemental and compositional depth profiles, especially on the bottom sidewall, were investigated before and after Cu-ECD. ToF-SIMS is used to measure the relative Co content in order to determine which combination of parameters yielded the highest and most stable amount of Co. The amount of Co ions result from ion gun sputtering through the depth of deposited films. Eventually, the comparative study with TEM was carried out to reveal the reliability of ToF-SIMS measurement. 

**Figure 1.** Schematic illustrations of (**a**) the ideal through-silicon-vias (TSV) metallization process after Cu electrochemical deposition (ECD) and (**b**) the corroded cobalt seed layer during Cu ECD. **Figure 1.** Schematic illustrations of (**a**) the ideal through-silicon-vias (TSV) metallization process after Cu electrochemical deposition (ECD) and (**b**) the corroded cobalt seed layer during Cu ECD.

Silicon wafers, sized 300 mm, with dry etched wholes with an aspect ratio of 1:4 were chosen to perform the metallization process. All barrier film stack depositions were carried out without breaking the vacuum of the cluster tool, from Applied Materials (AMAT) Endura 2. Tantalum-Nitride (TaN) was employed as the Cu diffusion barrier layer which was fabricated by the ALD process for achieving an excellent conformality all the way through the TSVs. Afterwards, the Co thin film was fabricated at a temperature of 150 °C using the Hexacarbonyl (3,3-dimethyl-1-butyne) dicobalt (CCTBA) precursor at 5 Torr by MOCVD. Subsequently, the ECD process was accomplished on the coupon level in a lab-scale plating cell right after a pre-wetting treatment. The plating cell was set up with a connected cathode (the structured sample) and an anode (Cu metal plate) electrodes which were immersed inside a low-copper electrolyte. The electrolyte contained copper ions and sulfuric acid at concentrations of 4 g/L and 10 g/L, respectively. 2.1.2. HSO ALD Deposition Silicon wafers, sized 300 mm, with dry etched wholes with an aspect ratio of 1:4 were chosen to perform the metallization process. All barrier film stack depositions were carried out without breaking the vacuum of the cluster tool, from Applied Materials (AMAT) Endura 2. Tantalum-Nitride (TaN) was employed as the Cu di ffusion barrier layer which was fabricated by the ALD process for achieving an excellent conformality all the way through the TSVs. Afterwards, the Co thin film was fabricated at a temperature of 150 ◦C using the Hexacarbonyl (3,3-dimethyl-1-butyne) dicobalt (CCTBA) precursor at 5 Torr by MOCVD. Subsequently, the ECD process was accomplished on the coupon level in a lab-scale plating cell right after a pre-wetting treatment. The plating cell was set up with a connected cathode (the structured sample) and an anode (Cu metal plate) electrodes which were immersed inside a low-copper electrolyte. The electrolyte contained copper ions and sulfuric acid at concentrations of 4 g/<sup>L</sup> and 10 g/L, respectively.

In this study, we used metal-organic Tetrakis (ethylmethylamido) hafnium (IV) (TEMAHf) and 2.1.2. HSO ALD Deposition

Tris (dimethylamino) silane (3DMAS) to form Si-doped HfO2 (HSO). Superior conformality of ALD thin film deposition is a direct consequence of the inherent self-limiting reactions [24]. The main goal for ALD process development for deep trench capacitors is to find precursors which allow a conformal deposition in HAR structures and show the same material composition along the trench sidewall. To achieve that, it is necessary to study the precursors' behavior in deep trench structures. Due to the different partial pressures, molecular size and molar masses of different precursors, the gas diffusion behavior into the trenches will be different for processes using more than one precursor. Therefore, varying dopant concentration levels may occur throughout the depth of trenches. The absence of a simple and readily available 3D structure for elemental analysis of thin films produced by ALD led us to use a different system with the capability to analyze 3D HAR structures In this study, we used metal-organic Tetrakis (ethylmethylamido) hafnium (IV) (TEMAHf) and Tris (dimethylamino) silane (3DMAS) to form Si-doped HfO2 (HSO). Superior conformality of ALD thin film deposition is a direct consequence of the inherent self-limiting reactions [24]. The main goal for ALD process development for deep trench capacitors is to find precursors which allow a conformal deposition in HAR structures and show the same material composition along the trench sidewall. To achieve that, it is necessary to study the precursors' behavior in deep trench structures. Due to the di fferent partial pressures, molecular size and molar masses of di fferent precursors, the gas di ffusion behavior into the trenches will be di fferent for processes using more than one precursor. Therefore, varying dopant concentration levels may occur throughout the depth of trenches.

in the form of a 2D-planar surface. To be able to perform ToF-SIMS to optimize the deposition process, an LHAR structure is used, which is depicted schematically in Figure 2a. The microscopic LHAR structures were fabricated in chips on 150 mm silicon wafers using standard surface The absence of a simple and readily available 3D structure for elemental analysis of thin films produced by ALD led us to use a di fferent system with the capability to analyze 3D HAR structures in the form of a 2D-planar surface. To be able to perform ToF-SIMS to optimize the deposition process, an LHAR structure is used, which is depicted schematically in Figure 2a. The microscopic LHAR structures were fabricated in chips on 150 mm silicon wafers using standard surface micromachining techniques. The chips contain multiple lateral cavities processed on top of single-crystal silicon with a polysilicon membrane roof sustained by polysilicon pillars [22]. The pillars provide a defined

micromachining techniques. The chips contain multiple lateral cavities processed on top of single-

geometry with a nominal gap height of 500 nm. One chip contains LHAR structures (cavities) with different membrane lengths (L) from 1 μm to 5 mm (AR range 2:1–10,000:1), each with a single-crystal silicon area in front with defined width for easy identification (W = 100 μm, 90 μm, etc.). The roof of this LHAR test structure can be removed using adhesive tape and the deposited material can be assessed directly, as shown in Figure 2b. For thin film analysis with ToF-SIMS, we defined the analysis area at the 5 mm length membrane (W = 100 μm). crystal silicon with a polysilicon membrane roof sustained by polysilicon pillars [22]. The pillars provide a defined geometry with a nominal gap height of 500 nm. One chip contains LHAR structures (cavities) with different membrane lengths (L) from 1 μm to 5 mm (AR range 2:1–10,000:1), each with a single-crystal silicon area in front with defined width for easy identification (W = 100 μm, 90 μm, etc.). The roof of this LHAR test structure can be removed using adhesive tape and the deposited material can be assessed directly, as shown in Figure 2b. For thin film analysis with ToF-SIMS, we defined the analysis area at the 5 mm length membrane (W = 100 μm).

**Figure 2.** Schematic illustrations of (**a**) the PillarHall™ test structure (bottom) that is used in the atomic layer deposited (ALD) process, and the corresponding top-view optical microscopic image (top) and (**b**) the test structure after membrane removal. The diffusion depth of the ALD process can be examined directly by time-of-flight secondary ion mass spectrometry (ToF-SIMS). Color code: Gray = silicon substrate, Blue = deposited material with ALD, Dark gray rectangles = ToF-SIMS region of interests (ROIs). h: cavity height, W: opening width, L: lateral length of membrane (images dimension are not to scale). In (**c**), the uncoated test chip and the optical microscope images of the corresponding top-view from different cavities with the membrane is shown. **Figure 2.** Schematic illustrations of (**a**) the PillarHall™ test structure (bottom) that is used in the atomic layer deposited (ALD) process, and the corresponding top-view optical microscopic image (top) and (**b**) the test structure after membrane removal. The diffusion depth of the ALD process can be examined directly by time-of-flight secondary ion mass spectrometry (ToF-SIMS). Color code: Gray = silicon substrate, Blue = deposited material with ALD, Dark gray rectangles = ToF-SIMS region of interests (ROIs). h: cavity height, W: opening width, L: lateral length of membrane (images dimension are not to scale). In (**c**), the uncoated test chip and the optical microscope images of the corresponding top-view from different cavities with the membrane is shown.

The HSO material was processed at a temperature of 280 °C using a thermal ALD process at a Jusung Eureka 3000 (Tokyo, Japan). The TEMAHf and O3 were used as a metalorganic precursor and oxidizer respectively for HfO2 deposition. For SiO2 doping, 3 DMAS/O3 cycles were inserted to achieve a controlled ratio of dopant and HfO2. During all processes, Ar gas was used for purging. The HSO material was processed at a temperature of 280 ◦C using a thermal ALD process at a Jusung Eureka 3000 (Tokyo, Japan). The TEMAHf and O3 were used as a metalorganic precursor and oxidizer respectively for HfO2 deposition. For SiO2 doping, 3 DMAS/O3 cycles were inserted to achieve a controlled ratio of dopant and HfO2. During all processes, Ar gas was used for purging.

#### *2.2. Analysis Tool Setups*

The SIMS analysis data were acquired using a TOF-SIMS 300R (IONTOF GmbH, Münster, Germany) in order to analyze both overall film growth and doping levels inside the structures. The tool
