**Seongjae Cho**

Seongjae Cho received B.S. and Ph.D. degrees in Electrical Engineering from Seoul National University, Seoul, Korea, in 2004 and 2010, respectively. He worked as an Exchange Researcher at the National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan, in 2009, where he worked on three- and four-terminal FinFETs on 32-nm and 22-nm technology nodes.. Dr. Cho worked as a Postdoctoral Researcher at Seoul National University in 2010, where he developed three-dimensional nanoscale flash memory and devices and array architecture, and advanced low-power logic devices. From 2010 to 2013, Dr. Cho worked as a Postdoctoral Researcher at Stanford University, where he worked on photonic devices and circuits, heterostructure low-power electron devices, and biosensors with an emphasis on group-IV alloys. In 2013, he joined the Department of Electronic Engineering, Gachon University, Seongnam, Korea, where he is currently working as an Associate Professor. His research interests include flash and emerging memory devices, nanoscale CMOS devices, group-IV photonic devices, neuromorphic devices and integrated circuits, and novel processing-in-memory (PIM) cells. He is a Life Member of the Institute of Electronics and Information Engineers of Korea (IEIE) and a Senior Member of IEEE. He was the recipient of IEIE Haedong Young Engineer Award in 2011 and Academic Award from IEIE Semiconductor Materials and Devices Group in 2017.
