*3.1. Synapse Device Operation*

In the proposed synapse array (Figure 3b), synaptic weight (*w*ij) of the artificial neural network is represented as follows:

$$w\_{\vec{\imath}\vec{\jmath}} = \mathcal{G}^{+}\_{\ \vec{\imath}\vec{\jmath}} - \mathcal{G}^{-}\_{\ \vec{\imath}\vec{\jmath}}.\tag{1}$$

As depicted in Figure 3b, *G* + *ij* and *G* − *ij* are the conductances of the D(+) CTF device and D(−) CTF device, respectively. Each conductance is determined by the amount of trapped charge in each charge-trap layer (silicon nitride). For the conductance modulation, hot-electron injection (HEI) and hot-hole injection (HHI) can be used as a charge injection mechanism. The potentiation process of increasing the synaptic weight can be performed by increasing *G* + *ij* and decreasing *G* − *ij*. On the other hand, the depression process of decreasing the synaptic weight can be carried out by decreasing *G* + *ij* and increasing *G* − *ij*. Using a technology computer-aided design (TCAD) device simulation (Synopsys Sentaurus), we verify two pulse schemes for the modulation of synaptic weight. A successive-pulse programming scheme and the incremental-step-pulse programming (ISPP) scheme are illustrated in Figure 5a,b, respectively.

**Figure 5.** Programming schemes for synaptic weight (conductance). (**a**) Successive-pulse programming scheme; (**b**) Incremental-step-pulse programming scheme.

A successive-pulse programming is a method of continuously applying drain pulses with the same voltage as shown in Figure 5a. In this programming scheme, the amount of conductance change is controlled by the number of applied drain pulses. When the drain pulse is applied, the sign of the gate voltage determines whether HEI or HHI occurs. If the drain pulse is applied when the gate bias is positive (6 V), HEI occurs. In this case, the threshold voltage increases by the trapped electron and the conductance decreases. On the other hand, if the drain pulse is applied when the gate bias in negative (−7 V), HHI occurs. In this case, the threshold voltage decreases by the trapped hole and the conductance increases. The proposed unit synapse cell is composed of two CTF devices. Consequently, the potentiation operation is conducted simultaneously by HHI in the D(+) CTF device and HEI in the D(−) CTF device. The depression operation is conducted by HEI in the D(+) device and HHI in the D(−) device.

The ISPP is used for the program scheme of NAND flash memory [18]. The program pulse is increased by a constant value *V*step after each program step, as shown in Figure 5b. In our previous paper, only successive-pulse programming was used. In this work, we applied the ISPP method to the conductance modulation of our designed synapse device. Using a TCAD device simulation, we compared the conductance modulation characteristics of successive-pulse programming and the ISPP. As shown in Figure 6, the ISPP scheme shows better synaptic behavior than the successive-pulse scheme. The ISPP scheme showed that the conductance changes linearly according to the number of applied pulses. Also, the range of available synaptic weights (memory window) can be further increased. Consequently, the ISPP scheme can adjust the synaptic weight more accurately than the successive-pulse programming scheme during the learning process. However, the ISPP scheme also has a drawback. In order to determine the start pulse voltage, a verify operation is required prior to programming to check the current synaptic weight value. Therefore, the ISPP scheme can increase the accuracy of the learning process, but also increases time and energy consumption.

**Figure 6.** Gradual changes of synaptic weights by successive-pulse programming and incremental-step-pulse programming (ISPP).
