**1. Introduction**

The electronic computing systems developed so far have been structured on the von Neumann architecture in which the memory, the processor, and the controller exist separately, and the sequential processing among them embodies specific functions within the programmed software. Most of the digital and analog circuits included in the memory and processing units are composed of complementary metal-oxide-semiconductor (CMOS) devices that have made a significant contribution to the semiconductor industry. Improvements in the performance of modern computing and information technology are based on the permanent scaling down of the CMOS devices, which provide a cost-effective increase in the operating frequency and a reduction in the power consumption [1,2].

Currently, the integration density of CMOS devices do not conform to Moore's law [3], and the scaling down is fast approaching the physical limit. However, an increase in the operating frequency and the device density increases the power consumption and the operation temperature, which can seriously degrade the system performance (von Neumann bottleneck), mainly because of the time and energy spent in transporting data between the memory and the processor [4]. This is particularly noticeable for data-centric applications, such as real-time image recognition and natural language processing, where the state-of-the-art von Neumann systems cannot outperform an average human.

Unlike with the von Neumann systems, the human brain creates a massively parallel architecture by connecting a large number of low-power computing elements (neurons) and adaptive memory elements (synapses). Thus, the brain can outperform modern processors on many tasks that involve unstructured data classification and pattern recognition [5]. Furthermore, the ultra-dense crossbar array consisting of memristors have been recognized as a potentially promising path to building neuromorphic computing systems that can mimic the massive parallelism and extremely low-power operations found in the human brain [6]. Representative types of neuromorphic computing schemes are the biologically inspired spiking neural networks (SNNs) and deep neural networks, which are vector matrix multipliers [7,8]. The SNNs are based on the local spike-timing-dependent plasticity (STDP) learning rule [7], whereas the latter is based on the backpropagation learning rule [8].

The two-terminal binary metal-oxide-based resistive switching (RS) devices, such as HfOx, AlOx, WOx, TaOx, and TiOx, have been widely studied as memristor devices that play the role of synapses in the crossbar arrays because the underlying metal–insulator–metal structure is simple, compact, CMOS-compatible, and highly scalable. Indeed, their energy consumptions per synaptic operation and programming currents can be made ultralow (sub-pJ energies, <1 µA programming current) [9]. However, in most cases of these *filamentary* resistive switching random access memory (hereinafter ReRAM) devices, the filament formation/completion process is inherently abrupt and difficult to control. This problem is particularly acute in neuromorphic applications because a single highly conductive device with a thick filament provides much more current to a vector-weighted sum or a leaky integrate-and-fire than its neighbors [10]. Undoubtedly, the gradual RS characteristics (i.e., the analog nonvolatile memory characteristics of the memristors) are most viable for either the weighted sum operation of convolutional neural networks (CNNs) or the STDP as a learning rule for SNN. In particular, the synapse device using the memristor requires excellent linearity according to the consecutive potentiation/depression pulse for high data processing accuracy [11].

In the case of filamentary ReRAM devices, there is ambiguity at the boundary between the application of the digital memory device using the abrupt RS operation and the application of the synapse device using the gradual RS operation. Therefore, it is very difficult to optimize each of the devices for both applications in terms of the process and the material. More noticeably, the efficiency and linearity of the resistance modulations of the metal-oxide-based memristors are frequently contradictory to one another when applying the potentiation/depression (P/D) pulses [12]. This is because when the resistance changes of the filamentary ReRAM devices occur more efficiently (abruptly), the resistances become more nonlinear in relation to the increase in the number of P/D pulses. After being triggered by an electric field and/or a local temperature rise during the SET/potentiation pulse, the filament formation/completion must be cut by an external circuit so that the filament is not too thick to be removed with an accessible RESET/depression pulse. Despite using techniques such as incrementally increasing the amplitude of the P/D voltage and/or increasing the duration of the P/D pulse [13], the complicated scheme for self-adaptively varying either the amplitude or the duration of the P/D pulse would be significantly compromised with the use of external controls and circuits. This results in additional power consumption and design complexity and seriously dilutes the motivation of neuromorphic computing systems.

However, *non-filamentary* RS two-terminal devices based on binary metal-oxides have demonstrated more gradual (well-controlled, memristor-like) RS characteristics in comparison with filamentary RS devices [14] because the non-filamentary devices are based on the modulation of the Schottky barrier (SB) between the RS oxide layer and the metal electrodes rather than the formation/rupture of the filament in the oxide layer.

Regardless of the type of RS devices, for a systematic and robust design of a self-adaptive P/D pulse scheme, it is important to have a complete understanding of the physical mechanism that controls the boundary of an abrupt/gradual RS characteristic. Therefore, it is important to understand the systematic design of the memristor devices for neuromorphic computing and precisely control the mechanism on the boundary of the abrupt and the gradual RS operations.

Quaternary metal-oxides, such as amorphous indium-gallium-zinc-oxide (a-IGZO), have more complicated compositions and they cannot be easily fabricated by low-temperature sputtering or the solution process. The a-IGZO materials can be fabricated on a flexible substrate and can act as both the RS and active films in memristors and thin-film transistors (TFTs), respectively [15–20]; this suggests that it is possible to monolithically integrate not only the synapse array but also the peripheral circuits including the neurons. In fact, two-terminal IGZO devices and their abrupt/gradual switching characteristics using metal electrodes, such as Pt, Al, and Cu, have already been demonstrated [16–20]. Even unipolar/bipolar IGZO memristor devices have been developed [19,20]. However, there is no known mechanism for determining the boundary of an abrupt/gradual RS in IGZO memristor devices.

In this study, we fabricated two-terminal Au/Ti/a-IGZO/thin SiO2/p <sup>+</sup>-Si memristors and analyzed their transport and synaptic characteristics. Moreover, we investigated the mechanism determining the boundary of the abrupt/gradual RS by modulating the oxygen content in an a-IGZO film. Related to this mechanism, we also reported a bimodal distribution of effective Schottky barriers in a-IGZO non-filamentary ReRAM-based memristors.
