**1. Introduction**

Due to the nature of NAND flash memory, which lacks the capability of random access [1] of NOR flash memory [2,3] or other memories such as DRAM (Dynamic Random Access Memory) and PCM (Phase Change Memory), reading and writing operations of one cell inevitably accompanies operations on the other cells simultaneously in a target NAND string [4,5]. Various combinations of the operation scheme such as bit line voltage (*VBL*), read voltage (*VREAD*), pass voltage (*VPASS*), etc., are typically tested and finally the optimal set is chosen by product engineers to minimize the threshold voltage (*Vt*) variation for the given as-fab-out chips [6–9]. Moreover, with the higher level of layers emerging every year or two, such that Memory companies announced a 6th generation vertical NAND (VNAND) flash memory product of 120 layers in 2019 and subsequently plan to announce the next 7th generation of 170 or more layers in a year or so [10], even more complicated combinations of the operation scheme are being developed. For example, varying bias conditions depending on the word line (WL) number, due to the nature of high aspect ratio contact etching [11–13], need to be investigated by trial and error to meet the criteria of *Vt* variation in a tight schedule. For this reason, the operation scheme optimization process heavily relies on the product engineers' intuition or, recently, statistical approaches such as machine learning technology which can often neglect to understand the underlying charge transport physics [14,15]. However, in order to accumulate the prior experience on the operation scheme optimization toward the sustainable technique for future products, it is critically important to understand the correlation between the input (operation scheme) and the output (*Vt* variation).

**Citation:** Yi, S.-i.; Kim, J. Novel Program Scheme of Vertical NAND Flash Memory for Reduction of Z-Interference. *Micromachines* **2021**, *12*, 584. https://doi.org/ 10.3390/mi12050584

Academic Editors: Cristian Zambelli and Rino Micheloni

Received: 15 April 2021 Accepted: 16 May 2021 Published: 20 May 2021

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