*3.1. GaN-on-Diamond*

The GaN-on-diamond concept was initially introduced in 2003 [49]. The original idea relied on the deposition of the PCD film directly on the back of the GaN layer. The first GaN-on-diamond wafer pieces were produced in 2004 by etching the Si substrate of a GaN wafer initially deposited by MOCVD, followed by depositing a 50 nm-thick dielectric layer, and then by growing a 25 µm-thick PCD film by hot filament CVD (HFCVD). The PCD was deposited on the Ga-face, leaving behind an N-face GaN-on-diamond wafer after the etching of the temporary Si carrier. The fabrication process remains fundamentally the same till today and is represented in Figure 2. The required steps involved (i) performing the GaN epitaxy on a Si substrate, (ii) bonding the GaN HEMT epilayers onto a temporary Si carrier, (iii) etching away the original host Si substrate, (iv) depositing a 50 nm-thick layer of SiN onto the exposed rear face of the GaN, and (v) depositing a 25 µm-thick PCD film by HFCVD onto the dielectric. Finally, by (vi) removing the temporary Si carrier, a free-standing GaN-on-diamond wafer was obtained.

 — By 2006, the process had been optimized to fabricate a Ga-face (i.e., right side up) GaN-on-Diamond HEMT epitaxial wafer and the operation of an AlGaN/GaN HEMT with a 25 µm-thick PCD film located 1.2 µm below the electron channel was reported [63]. The scanning electron microscope (SEM) cross-section of the GaN-on-diamond wafer is shown in Figure 3a. These first unpassivated HEMTs had a high contact resistance that translated in low current capability (maximum drain current *I*D max = 306 mA/mm) and low peak transconductance (*g*m peak = 70 mS/mm). Further iterations improved the performance of the HEMTs [64,65], nevertheless, and in spite of having half the thermal resistance *R*th of GaN-on-SiC HEMTs (≈6 against ≈12 K·mm/W, respectively), in 2007 GaN-on-diamond HEMTs were still outperformed by GaN-on-SiC technology—Figure 3b. By 2009 GaN HEMTs with 75 µm of PCD showed cut-off (*f* <sup>T</sup>) and maximum oscillation (*f* max) frequencies of 85 and 95 GHz, respectively [66], and soon after that the first RF power amplifier module [67] was reported.

In 2011 DARPA introduced the Near Junction Thermal Transport (NJTT) concept that aimed at extracting the heat from within 1 µm of a transistor's active region. The low κ AlN/AlGaN nucleation/transition layers under the GaN channel were eliminated [41,68,69], allowing the deposition of the films within a few hundreds of nanometers away from the hot junction, and the thermal conductance between the GaN and the diamond was more than doubled. Continuous wave (CW) load-pull tests performed at 10 GHz showed that the GaN-on-diamond HEMTs reached over 7 W/mm output power density (*P*D) and 46% *PAE* at 40 V drain bias (*V*D) [70]; however, and despite showing a 25% lower temperature rise for the same thermal power than their GaN-on-SiC counterparts, these devices had a

high gate leakage current associated with residual surface defects in the gate region which still prevented the harnessing of the full potential of the technology.

, "AlGaN/GaN HEMT on diamond technology demonstration," Tech. — – "Comparison of GaN HEMTs on mond and SiC substrates," IEEE Electron Device Lett. **Figure 3.** (**a**) SEM cross-section of a GaN-on-diamond wafer (© 2006 IEEE. Reprinted, with permission, from G. H. Jessen et al., "AlGaN/GaN HEMT on diamond technology demonstration," Tech. Dig.— IEEE Compd. Semicond. Integr. Circuit Symp. CSIC, pp. 271–274, 2006 [63]). (**b**) Electrical characteristics of similar GaN-on-diamond (solid symbols) and GaN-on-SiC (open symbols) HEMTs; output power and *PAE* measured at 10 GHz CW class B operation and 20 V *V*<sup>D</sup> (© 2007 IEEE. Reprinted, with permission, from J. G. Felbinger et al., "Comparison of GaN HEMTs on diamond and SiC substrates," IEEE Electron Device Lett. [65]).

µm of a transistor's active region. The The κ of the diamond films was further improved by replacing the HFCVD process with microwave plasma CVD (MPCVD) and by the end of the NJTT program, in 2014, the GaN-on-diamond technology had allowed the reduction of the junction temperature by 40–45% and the tripling of the areal RF power density in comparison with GaN-on-SiC [71].

 – At the same time the bottleneck of the heat extraction was recognized to be the *TBR* between GaN and diamond (*TBR*GaN/diamond) [72] and most of following research focused on decreasing it, whether by decreasing the dielectric thickness, by using a different dielectric, or by optimizing the diamond nucleation layer [10,72–84]. The impact of the thickness of the GaN buffer layer on the *R*th of the HEMT devices [85–90] and the effects of the stress caused by the difference in the *CTE*s of GaN and diamond [91–96] were also evaluated by different research groups. A more detailed description and discussion of the main findings is included in Section 4.1. The mechanical and thermo-mechanical integrity of the diamond/GaN interface, which impacts profoundly the reliability of the devices, was also addressed [97–99]. As a general finding, Liu et al. concluded that the GaN/diamond interface has a high mechanical stability, showing the potential of this material system for the fabrication of reliable devices [97].

– – – – The performance of more recent HEMT devices was thoroughly analyzed by Ranjan and co-workers [28,100], who evaluated the effect of the bias conditions on the self-heating and transport properties of GaN-on-Si and GaN-on-diamond (with 30 nm of SiN) HEMTs. A ≈4 times improvement in the DC and RF performances of the later was observed. The DC *P*<sup>D</sup> of GaN-on-diamond HEMTs was 27.56 W/mm for 55 V applied *V*D, whereas GaN-on-Si devices were burnt at ≈9 W/mm for 20 V *V*D. The reduction of *I*D max due to channel self-heating for GaN-on-diamond and GaN-on-Si HEMTs was 10% and 33%, and for *V*<sup>D</sup> = 10 V *f* <sup>T</sup>/*f* max were 10.2/31.4 GHz and 7/18.2 GHz, respectively. The GaNon-diamond HEMT had an almost constant small signal gain for *V*<sup>D</sup> between 10 and 40 V. Finally, the increase rate of the gate current with *V*<sup>D</sup> was 3.3 times smaller for GaN-ondiamond devices. Figure 4a–c show some of the devices' electrical characteristics.

– devices'

– devices'

**Figure 4.** (**a**) *I*<sup>D</sup> versus *V*<sup>D</sup> characteristics, (**b**) Transfer characteristics for different *V*D, and (**c**) Temperature rise versus *P*<sup>D</sup> for similar GaN-on-diamond and GaN-on-Si HEMTs (reprinted from [28]; permission conveyed through CCBY 4.0: https://creativecommons.org/licenses/by/4.0/~ (accessed on 7 October 2021)).

 ″ — In 2019, HEMTs fabricated on latest generation Element Six GaN-on-diamond wafers (with a 30 nm-thick dielectric layer) showed 2.95 K·mm/W *R*th, 56 W/mm DC power capability, and average/maximum channel temperature of 176/205 ◦C [101]. Nevertheless, these devices had high leakage currents which ultimately limited their breakdown voltage, showing there is still some room for optimizing the fabrication process and maximizing the performance of GaN-on-diamond HEMTs. In the same year, researchers from RFHIC [102] reported the fabrication of 4" GaN-on-diamond wafers with a *TBR*GaN/diamond of 31.0 m<sup>2</sup> ·K/GW and an uniformity of ±10%. The development of an inner slot via hole process allowed the opening of 10 µm-diameter holes in the diamond using a laser drilling process—Figure 5. On-wafer pulsed load-pull tests performed at 2 GHz revealed 18.1 W/mm *P*<sup>D</sup> for an encapsulated 10 × 200 µm gate HEMT. ″ — 

"A GaN/Diamond HEMTs with 23 W/mm for Next Generation High Power RF Application," in IEEE MTT **Figure 5.** Inner slot via hole shape on source pad (© 2019 IEEE. Reprinted, with permission, from W. S. Lee, et al., "A GaN/Diamond HEMTs with 23 W/mm for Next Generation High Power RF Application," in IEEE MTT-S International Microwave Symposium Digest, 2019, vol. 2019-June, pp. 1395–1398 [102]).

thod feature a ≈30

thod feature a ≈30

–

–

The evolution of the relevant technological parameters (dielectric material and thickness, diamond film κ, and value of *TBR*GaN/diamond) since 2006 is listed in Table 3. It can be seen that most of the GaN-on-diamond HEMTs fabricated by this method feature a <sup>≈</sup>30 nm-thick SiN layer, and a *TBR*GaN/diamond in the range of 20–30 m<sup>2</sup> ·K/GW. Section 4.1 describes in more detail the impact of the dielectric layer on the experimental *TBR*GaN/diamond values and the electrical parameters of GaN-on-diamond HEMTs fabricated so far using this method are summarized in Table A1 in the Appendix A.


**Table 3.** Evolution of GaN-on-diamond technology.


**Table 3.** *Cont.*

Values obtained with <sup>a</sup> Raman thermography, b transient thermoreflectance, and c from luminescence spectra.

#### *3.2. Bonded Wafers* In 2013 BAE Systems proposed a "device first" technology that allowed the place-

In 2013 BAE Systems proposed a "device-first" technology that allowed the placement of the diamond heat spreader within 1 µm of the device hotspot [107,108]. After the complete fabrication of the devices, the wafer was bonded to a temporary carrier and the substrate and the GaN buffer layer were removed. The back side of the HEMTs was then bonded at room temperature (RT) to a 1" square PCD diamond substrate, fabricated in a different step, using an adhesive and pressing the two materials together. Thanks to the low roughness of the GaN back surface after the removal of the buffer layers (<1 nm), and depending on the κ of the adhesive used, *TBR*GaN/diamond was estimated to be in the range <sup>15</sup>−60 m<sup>2</sup> ·K/GW. The generic process flow is schematically represented in Figure 6. ″ −

″ In 2014, functional GaN HEMTs originally fabricated in a SiC substrate were bonded to a 1" PCD wafer at a temperature lower than 150 ◦C [109] by means of a 35 nm-thick layer of Si-containing bonding material [110]. The experimental value of *TBR*GaN/diamond was 34 m<sup>2</sup> ·K/GW and the yield of the bonding process was ≈70% (Figure 7a). Even when dissipating 3 times more power, the temperature of the GaN-on-diamond HEMTs was lower than that of their GaN-on-SiC counterparts. However, original GaN-on-SiC devices outperformed GaN-on-diamond ones: *I*D max and *g*m peak were reduced by 16% and 11%, respectively, after the GaN-on-SiC HEMTs were transferred to diamond. The degradation of the DC characteristics was attributed to changes in residual mechanical stress in the device epitaxial layers during the substrate transfer process, as well as to the mechanical and chemical treatments applied. The RF characteristics of the GaN-on-diamond devices also degraded in comparison with GaN-on-SiC ones: at 10 GHz and for *V*<sup>D</sup> = 20 V *PAE*/*P*<sup>D</sup> were 38%/3.4 W/mm and 48%/4.6 W/mm for both devices, respectively, when tuned for

"

µm

maximum power, and 42%/3.0 W/mm and 57%/4.1 W/mm (when tuned for efficiency). According to the authors, this was primarily due to the omission of air-bridge structures in the GaN-on-diamond devices with the unconnected device channels acting as RF parasitics during power measurements.

″ "S2 – "High Device Transfer Process," 2015 IEEE Compd. Semicond. Integr. Circuit Symp. CSICS 2015, pp. 7– **Figure 7.** (**a**) GaN HEMTs bonded to a 1" PCD substrate (© 2014 IEEE. Reprinted, with permission, from K. K. Chu et al., "S2-T4: Low-temperature substrate bonding technology for high power GaNon-diamond", Lester Eastman Conf. 2014—High Perform. Devices, LEC 2014, pp. 1–4, 2014 [109]). (**b**) Comparison of input-output power curves obtained at 10 GHz for GaN/diamond HEMT with 3 times larger gate periphery than GaN-on-SiC HEMT (© 2015 IEEE. Reprinted, with permission, from K. K. Chu et al., "High-Performance GaN-on-Diamond HEMTs Fabricated by Low-Temperature Device Transfer Process," 2015 IEEE Compd. Semicond. Integr. Circuit Symp. CSICS 2015, pp. 7–10, 2015 [111]).

> ″ − Upon solving these issues, the *PAE* of 12 × 50 µm GaN/diamond HEMTs increased to 51% and *P*<sup>D</sup> to 11.0 W/mm at 10 GHz. For the same *V*D, the *P*<sup>D</sup> of 4 × 50 µm GaN-on-SiC HEMTs was only 9.2 W/mm, showing a 3.5 times areal power increase with GaN-ondiamond HEMTs (Figure 7b) [111]. Even under these conditions, the temperature at the center gates was slightly lower for the GaN-on-diamond HEMT than for the GaN-on-SiC HEMT (195 against 202 ◦C, respectively). The main challenge of this process was identified as the ability to achieve large area bonding with very low *TBR*GaN/diamond [110].

> µm In 2017, Liu and co-workers [112] bonded HEMT devices previously fabricated on SiC substrates to a 3" commercial PCD wafer at a temperature of 180 ◦C and obtained a functional device yield over 80%. The experimental *TBR*GaN/diamond (51 m<sup>2</sup> ·K/GW) was still relatively high and the DC current showed a 12−19% reduction due to self-heating; nevertheless, the peak junction temperature of a 10 × 125 µm HEMT with compressed gate pitch of 20 µm decreased from 241 to 191 ◦C after being transferred from the SiC to the diamond substrate, suggesting a 20% reduction in *R*th. CW load-pull measurements were performed at 10 GHz and class AB operation on 4 × 125 µm/40 µm gate pitch HEMTs; after being transferred to the PCD substrate, the same HEMT delivered 5.5 W/mm *P*<sup>D</sup> with a *PAE* of 50.5% (against 4.8 W/mm and 50.9% when on the original SiC substrate).

> The RT bonding of GaN and PCD films [113] or SCD substrates [114,115] has also been achieved using surface-activated-bonding (SAB). SAB is a direct solid state covalent bonding method that takes place in ultra-high vacuum conditions without obvious interfacial chemical reactions. The previous bombardment of the to-be-bonded surfaces with an argon (Ar) ion beam induces the surface activation, generating surface dangling bonds and making it possible to bond the surfaces at RT [116]. A few nm-thick Si interlayer is typically sputtered on the diamond and GaN surfaces to improve the adhesion. The two activated

∙K/GW.

∙K/GW. In a slightly different experimental

surfaces are then pressed together at RT and the dangling bonds form covalent bonds at the interface. Transmission electron microscope (TEM) images of the resulting uniform GaN/diamond interface can be seen in Figure 8a (from [113]). After the bonding process the Si layer was ≈24 nm-thick. The bombardment of the diamond surface with Ar ions induced its amorphization, creating an additional ≈3 nm-thick amorphous diamond layer. The thickness of the Si layer was further reduced to ≈10 nm [115] (Figure 8b), creating an interface with a *TBR*GaN/diamond of <sup>≈</sup>19 m<sup>2</sup> ·K/GW. In a slightly different experimental setup, the surfaces activation was performed with a mixed beam of Si and Ar ions; the thickness of both Si interlayer and amorphous diamond layer was reduced to ≈2 nm (Figure 8c) and the *TBR*GaN/diamond was as low as <sup>≈</sup>11 m<sup>2</sup> ·K/GW. Despite these interesting preliminary results, functional HEMTs on this GaN/diamond material stack are yet to be reported.

 "Interfacial Thermal Conductance across Room Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376– "Interfacial Thermal Conductance across Room Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376– **Figure 8.** Cross-section TEM image of GaN/diamond interface obtained by SAB at room temperature after (**a**) sputtering a ≈12 nm (Reprinted from Scr. Mater., vol. 150, F. Mu et al., "Room temperature GaN-diamond bonding for high-power GaN-on-diamond devices", pp. 148–151 [113], Copyright 2018, with permission from Elsevier) and (**b**) ≈5 nm (Reprinted with permission from Z. Cheng et al., "Interfacial Thermal Conductance across Room-Temperature Bonded GaN-Diamond Interfaces for GaN-on-Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376–8384, 2020 [115]. Copyright 2020 American Chemical Society) Si nanolayer on both surfaces; (**c**) activating both surfaces with a mixed beam of Si and Ar ions (Reprinted with permission from Z. Cheng et al., "Interfacial Thermal Conductance across Room-Temperature Bonded GaN-Diamond Interfaces for GaN-on-Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376–8384, 2020 [115]. Copyright 2020 American Chemical Society).

 Using a similar SAB method with an intermediate Si nanolayer, in 2019 Mitsubishi Electric Corp. announced the successful transfer of a GaN-on-Si multi-cell HEMT to a SCD substrate [114]. No voids were identified in the ≈6 nm-thick bonding interface and the improved DC characteristics of the GaN-on-diamond devices showed that the GaN HEMTs layers were successfully transferred to the diamond substrate (Figure 9). This achievement is expected to improve the *PAE* of high-power amplifiers in mobile communication base stations and satellite communications systems, thereby helping to reduce power consumption. Mitsubishi Electric targeted the commercial launch of GaN-ondiamond HEMTS for 2025.

Wang et al. [117] reported bonding GaN and SCD/PCD diamond substrates at RT and in atmospheric air. Following the surface activation with Ar ions, a double molybdenum (Mo)/gold (Au) layer (5 nm/11 nm) was sputtered on the surfaces of both materials and they were pressed together with an applied load of 2000 N. The bonded surfaces showed a voidage as low as 1.5% and the bonding strength was evaluated as 6.8 MPa. Even though no thermal measurements were made, after 1000 cycles of thermal cycling between −45 and 125 ◦C the bonding area remained at 73%, suggesting that the Mo/Au nanolayer can effectively balance the difference in the *CTE*s of GaN and PCD wafers.

Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376–

Diamond Devices," ACS Appl. Mater. Interfaces, vol. 12, pp. 8376–

"Interfacial Thermal Conductance across Room

"Interfacial Thermal Conductance across Room

**Figure 9.** (**a**) Cross-section TEM image of GaN/diamond interface obtained by SAB. (**b**) *I*D-*V*<sup>D</sup> characteristics of GaN-on-Si (dashed lines) and GaN/diamond (solid lines) HEMTs (reprinted from [114], Copyright 2019 The Japan Society of Applied Physics). −

Minoura and his colleagues from Fujitsu Limited [118] bonded AlGaN/GaN and indium aluminum gallium nitride (InAlGaN)/GaN-on-SiC HEMTs to SCD substrates by a modified SAB method. A thin (<10 nm) titanium (Ti) layer was previously deposited on the surface of the SCD substrate to prevent the amorphization of the diamond surface during the bombardment with the Ar ions. The TEM image of the SiC/diamond interface is shown in Figure 10a. Using this method, the *TRB* at the diamond/SiC interface was 66 m<sup>2</sup> ·K/GW and the *R*th of the AlGaN/GaN HEMT bonded to the SCD substrate was about 1/3 compared to that without diamond. The *P*<sup>D</sup> of InAlGaN/GaN HEMTs measured with pulsed load-pull measurements (for *V*<sup>D</sup> = 50 V, a pulse width of 10 µs, and 10% duty cycle) increased from 14.8 to 19.8 W/mm with the bonding of the SCD heat spreader structure. With 1% duty cycle, the SCD-bonded HEMT showed a *P*<sup>D</sup> of 22.3 W/mm. Figure 10b,c show the variation of the normalized *P*<sup>D</sup> with the duty-cycle and the *P*<sup>D</sup> as a function of *V*D, respectively. 

**Figure 10.** (**a**) Cross-section TEM image of SiC/SCD interface obtained by SAB after protecting the diamond surface with a Ti film. (**b**) Normalized *P*<sup>D</sup> vs. duty-cycle. (**c**) *P*<sup>D</sup> as a function of *V*<sup>D</sup> (reprinted from [118], Copyright 2020 The Japan Society of Applied Physics).

SAB of GaN HEMTs and diamond was also achieved by sputtering a 450 nm-thick AlN layer on both GaN AlN nucleation layer (after removal of the Si substrate) and diamond surfaces, followed by surface activation with an Ar<sup>+</sup> -based plasma and by thermocompression at 160 ◦C [119]. The strain relief layers and the AlN nucleation layer prevented the flow of heat from the top GaN layer into the diamond substrate; as a consequence, the temperature of the HEMT on the diamond substrate was higher than that on the Si substrate [120].

Van der Waals (VdW) bonding, a process first employed for GaAs thin films [121], has also been used to bond GaN devices and SCD/PCD substrates at temperatures below 300 ◦C [122,123]. This technique guarantees a good thermal interface (*TBR*GaN/SCD was estimated to be as low as 10 m<sup>2</sup> ·K/GW [122]) without the observation of stress or degradation. RF-devices operating at 3 GHz with improved efficiency (*PAE* of 54.2% against 50.6% for GaN-on-Si HEMTs)) were demonstrated with SCD; on the other hand, the bonding obtained with PCD was not reproducible [123].

The evolution of the relevant technological parameters of GaN/diamond bonded wafers is summarized in Table 4. The *TBR* of the GaN/diamond interface obtained after the SAB and VdW bonding of GaN and SCD can be as low as 11 and 10 m<sup>2</sup> ·K/GW, respectively. Functional HEMTs have been fabricated on GaN bonded to SCD and PCD substrates. The electrical parameters of HEMTs fabricated using this method are summarized in Table A2 in the Appendix A.


**Table 4.** Evolution of GaN/diamond bonded wafers technology.

Values obtained with <sup>a</sup> transient thermoreflectance, <sup>b</sup> on-wafer IR imaging system, <sup>c</sup> periodic heating method, and d estimated from simulations.
