*3.3. Compliance Substrates: SiGe Buffer Layer*

Another attempt to grow a high-quality 3C-SiC epilayer on a silicon substrate was done by introducing a buffer epitaxial layer of Si1−xGe<sup>x</sup> between Si and the SiC. We choose a layer of Si-Ge because Si and Ge have the same FCC structure and are perfectly miscible: the stoichiometry and lattice parameter can be decided a priori. This fact has important implications: fine-tuning the lattice parameter in such a way to minimize the mismatch due to the 4/5 ratio among the Si and SiC atomic layers is possible. Indeed, as already reported, 3C-SiC and Si show roughly a 20% lattice mismatch, implying that four layers of Si almost "equate" to five layers of SiC (the 4/5 rule). The extra plane of SiC creates Lomer and misfit dislocations, thus stacking faults. Nevertheless, the 4/5 rule is not exact and a mismatch (dependent on temperature) also exists between four layers of Si and five of SiC. This mismatch creates stress with the formation of extra dislocations and stacking faults. The adoption of a buffer layer of Si-Ge can also reduce the thermal stress due to the thermal expansion coefficient mismatch (between Si and SiC) caused by the cooling of the sample from the growth temperature (about 1400 ◦C) to room temperature.

In Figure 7, we show the structure of the sample used in the experiment: 10 nm Si cap on 2 µm Si1−xGe<sup>x</sup> grown over a 300 µm silicon (0 0 1) substrate. The thin Si capping layer thickness is lower than the "critical thickness" to avoid the formation of interfacial defects at the Si/Si1−xGe<sup>x</sup> interface and it was introduced as a seed for the carbonization step. The intensity of the transverse optical (TO) peak of SiC at 796 cm−<sup>1</sup> is shown in Figure 7b for different carbonization temperatures and buffer layer compositions. The TO Raman peak is forbidden for perfect 3C-SiC grown on (0 0 1) substrates (due to the selection rules) and its presence is associated with twins and poly-crystals. It was observed that greater Ge content and lower temperatures (1000 ◦C, 15%; 1050 ◦C, 15%; and 1000 ◦C, 12%) lead to a high TO mode intensity. In these samples, we find Ge segregation at the interface between the SiC and SiGe layer. Ge segregation implies the formation of poly-crystals, while samples with lower concentrations and higher carbonization temperatures lead to a mirror-like surface morphology and a lower value of TO intensity indicates a higher SiC quality.

**Figure 7.** (**a**) Schematic of the sample structure. The image is not to scale. (**b**) 3C-SiC TO peak height with respect to nominal Ge concentration for several carbonization temperatures. The spectra of samples that have undergone 1000 ◦C carbonization are shown in the inset (adapted from Reference [16]).

We also demonstrated that the carbonization temperature and composition of the layer control the quality of the SiC film. It is also possible to achieve a higher quality with respect to film grown on virgin silicon [16].
