**1. Introduction**

Owing to the large bandgap of 3.43 eV, resulting in a high electric breakdown field of 3.3 MV/cm and in a low intrinsic carrier concentration, and to the large saturation velocity of 2.5 <sup>×</sup> <sup>10</sup><sup>7</sup> cm/s, GaN is one of the most promising semiconductors for the future energy-efficient generation of high-power, high-frequency and high-temperature electronics [1–4]. Besides the unique intrinsic material properties, one of the most attractive properties of GaN is the possibility to exploit the polar nature of GaN-based materials to form AlGaN/GaN heterostructures featuring a two-dimensional electron gas (2DEG) at the heterointerface with a high carrier density of over 1 <sup>×</sup> <sup>10</sup><sup>13</sup> cm−<sup>2</sup> and high mobility values exceeding 2000 cm<sup>2</sup> V −1 s −1 [5,6]. AlGaN/GaN heterostructures enable the fabrication of high electron mobility transistors (HEMTs) which can significantly outperform the

**Citation:** Calzolaro, A.; Mikolajick, T.; Wachowiak, A. Status of Aluminum Oxide Gate Dielectric Technology for Insulated-Gate GaN-Based Devices. *Materials* **2022**, *15*, 791. https:// doi.org/10.3390/ma15030791

Academic Editor: Fabrizio Roccaforte

Received: 16 December 2021 Accepted: 16 January 2022 Published: 21 January 2022

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**Copyright:** © 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/).

traditional Si power devices in terms of breakdown strength, on-resistance and switching speed, achieving higher power density and higher energy efficiency [7,8].

Nowadays, GaN-on-Si HEMTs qualified for 200 V and 650 V high voltage power switching applications with operating frequency capabilities in the MHz range are commercially available and on the way towards 1.2 kV applications using engineered substrates [1,9,10]. For targeting higher voltage capabilities up to 1.7–1.8 kV, current aperture vertical electron transistors (CAVETs) adopting AlGaN/GaN heterojunctions have also recently attracted significant attention [11–13], where the high conductivity of the 2DEG channel is combined with the better field distribution of the vertical device geometry, and hence with the capability of vertical architectures of achieving an even higher breakdown voltage without enlarging the device area, in contrast to lateral transistors. In addition, GaN-based HEMTs with downscaled gate lengths to the sub-100 nm regime have also been demonstrated to achieve maximum current gain cutoff frequencies over 200 GHz, which are well suited for radio frequency (RF) high power amplifiers for 5G and beyond applications [14–18].

Despite the potentiality of AlGaN/GaN HEMTs, one of the most serious problems degrading the device performance and reliability is represented by the exceedingly high leakage currents through the Schottky-gate contact, especially under forward gate bias, which limits the gate voltage swing and the maximum on-state current of the device, resulting in reduced power efficiency and weak device failure protection [19]. In particular, a small gate swing is a strong limiting factor for power switching applications due to faulty gate voltage overshoots often occurring in circuits, which can eventually lead to early device failures. Moreover, since GaN-based HEMTs are naturally normally on (or depletion-mode) transistors with a negative threshold voltage (Vth), normally off (or enhancement-mode) HEMTs with a positive Vth are highly preferred to guarantee safe operation and for the reduced power consumption in power switching devices [20,21]. However, since normally off devices require a large positive gate voltage to be turned on, the problem of gate leakage currents becomes even more critical in normally off HEMTs. Similarly, in RF applications, power amplifiers using Schottky-gate HEMTs can suffer from reduced gain and efficiency caused by large gate inputs, which can drive the devices into deep forward bias regimes [22].

The employment of a metal–insulator–semiconductor (MIS) gate is an efficient way to suppress the gate leakage currents of AlGaN/GaN HEMTs, enabling reduced power consumption, a larger gate bias swing and a better immunity to gate breakdown [23–25]. However, in contrast to Si-based devices, the introduction of an insulator in AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) is complicated by the absence of a high-quality native oxide for (Al)GaN. Trap states located at the dielectric/(Al)GaN interface or within the dielectric can lead to dynamic charge/discharge processes, which are especially critical in the case of wide bandgap GaN-based materials where the traps can be deeply located in the bandgap and can cause severe operational instability due to their slow detrapping behavior [26–29]. The instability of the threshold voltage in AlGaN/GaN MIS-HEMTs is one of the major challenges [30–33]. In particular, a serious Vth shift induced by the "spill-over" of electrons from the 2DEG channel towards the dielectric/(Al)GaN interface in forward gate bias conditions has often been reported [34–37]. Another problem is the degradation of the current linearity in the transfer characteristics of AlGaN/GaN MIS-HEMTs, which can be responsible for gain loss and the degradation of large signal linearity in power amplifiers [38].

Besides insulated-gate GaN-based transistors adopting AlGaN/GaN heterostructures, other emerging GaN-based devices in the form of MIS-FETs use a gate dielectric layer on a GaN channel, such as lateral hybrid GaN MIS-FETs [39], vertical GaN trench MIS-FETs [40] and vertical FinFETs [41]. Figure 1 schematically summarizes the main configurations of lateral and vertical GaN-based transistors employing a gate dielectric layer. A Schottkygate HEMT is reported for comparison in Figure 1a. Hybrid GaN MIS-FETs obtained by a fully recessed AlGaN barrier layer are especially attractive for normally off operation

and large gate voltage operation [42], while GaN trench MIS-FETs have drawn attention among other vertical transistor concepts since they are inherently normally off with a Vth > 3 V and do not need the regrowth of the AlGaN/GaN channels [43,44]. Similar to MIS-HEMTs, instabilities over the gate dielectric affecting the device performance can arise in GaN devices with MIS-FET configurations due to the trap states at the dielectric/GaN interface influencing the Vth and reducing the current drive capability or/and bulk or border traps within the dielectric itself, which might mostly affect the long-term reliability performance of the device [43,45]. Moreover, differently from the MIS-HEMTs, where the 2DEG formed at the AlGaN/GaN interface benefits from the spatial separation from the dielectric/AlGaN interface, minimizing the interface scattering processes [46], interface traps in GaN MIS-FET configurations are located in the proximity of the electron channel and are more prone to act as impurity scattering centers, additionally affecting the carrier mobility [47]. This is particularly challenging for transistor concepts including a recess of the AlGaN barrier layer, as in the case of trench MIS-FETs and vertical FinFETs, since the etching process can critically affect the properties of the dielectric/GaN interface [48].

**Figure 1.** Schematic of representative GaN-based transistors: (**a**) Schottky-gate HEMT; (**b**) MIS-HEMT; (**c**) hybrid MIS-FET with fully recessed AlGaN barrier; (**d**) trench CAVET; (**e**) trench MIS-FET; (**f**) vertical FinFET.

Therefore, regardless of the transistor concept and design, trap states need to be minimized to ensure the safe operation and long-term lifetime of the insulated-gate GaNbased transistors. In particular, a gate dielectric technology aiming to improve the dielectric/(Al)GaN interface and dielectric bulk quality is essential to enhance the performance of the device. In general, various insulator materials have been employed, with SiO2, SiN and Al2O<sup>3</sup> as the most commonly used dielectrics [7,29,49,50]. The same dielectric layer deposited both underneath the gate as well as between the gate and the ohmic contacts of the source and drain usually functions both as the gate dielectric and the passivation layer [51]. The latter has been indeed reported to mitigate the effects of drain current collapse and leakage currents at the (Al)GaN surface due to the passivation of trap states at the surface [52–54]. However, even though excellent device characteristics have been obtained, trap states in MIS gate structures still remain one of the biggest challenges for insulated-gate GaN-based transistors, and the practical implementation of these devices has been hindered by the concerns over the gate dielectric stability and reliability [1].

In this paper, the current status of the gate dielectric technology employing Al2O<sup>3</sup> for insulated-gate GaN-based transistors is reviewed. First, the relevant aspects taken into account for selecting a suitable gate dielectric for GaN-based transistors are highlighted and the influence of this additional layer on the device parameters and performance is discussed. Afterwards, the state of the art of Al2O<sup>3</sup> as a gate dielectric is presented with a particular

attention to the recent progress in engineering high-quality Al2O3/(Al)GaN interfaces and to the performance of Al2O3-gated GaN-based MIS-HEMTs for power switching applications. Novel emerging concepts using the Al2O3-based gate dielectric technology are also introduced. Finally, the recent status of nitride-based materials emerging as other gate dielectrics is briefly reviewed.
