*2.1. Growth of Amorphous High-κ Oxides on SiC*

Unlike that of thermal silicon dioxide (SiO2), the growth of high-κ oxides on silicon carbide is much more affected by the quality of the semiconductor surface. In fact, in order to limit the amount of the interface state density (Dit), appropriate cleaning of the SiC surfaces is always required.

A variety of SiC surface-cleaning treatments have been proposed, based either on wet chemical solutions [44–46] or plasma [47–49]. The most used chemical solutions for SiC cleaning are combinations of diluted sulfuric acid, hydrogen peroxide, isopropanol, diluted hydrofluoric acid. Suvanam et al. [46] demonstrated that RCA treatment [45], followed by HF diluted solution and finally isopropanol, was a good route to improve the interfacial electrical characteristics of Al2O<sup>3</sup> films on SiC, obtaining a density of interface states <sup>D</sup>it = 1.5 <sup>×</sup> <sup>10</sup><sup>11</sup> eV−<sup>1</sup> cm−<sup>2</sup> at E<sup>C</sup> <sup>−</sup> <sup>E</sup><sup>t</sup> = 0.2 eV below the 4H-SiC conduction band edge, which was about two orders of magnitude lower than the values found with thermal SiO2. In regard to plasma treatment before high-κ deposition, H<sup>2</sup> plasma has been also evaluated in some works [47–49], since it represents an efficient route for the passivation of dangling bonds on SiC surfaces. Heo et al. [49] measured promising values of interface state density (Dit = 6 <sup>×</sup> <sup>10</sup><sup>12</sup> eV−<sup>1</sup> cm−<sup>2</sup> at E<sup>C</sup> <sup>−</sup> <sup>E</sup><sup>t</sup> = 0.2 eV) when a 15 min long H<sup>2</sup> plasma treatment was performed before deposition and after the post-metallization step.

As a matter of fact, besides surface treatments before the dielectric deposition, postdeposition annealings are of great importance to optimize the dielectric properties. Many parameters can in principle be varied, such as ambient atmosphere, annealing temperature and time, etc. However, these processing steps must be ultimately compatible with complete SiC device fabrication, in which, e.g., the formation of metal contacts is achieved at high temperatures (900–1000 ◦C) and fixed gas atmospheres (N<sup>2</sup> or Ar). Generally, a large number of high-κ oxides possess crystallization temperatures of about 400–500 ◦C, with Al2O<sup>3</sup> being the most thermally stable at up to 800 ◦C. However, independently of the chemical nature of the high-κ oxide, the annealing process can improve dielectrical properties. For instance, Wang et al. [50] demonstrated the beneficial effects of high-temperature annealings (800–1000 ◦C) performed in O<sup>2</sup> atmosphere on Al2O<sup>3</sup> films. In particular, they showed that although Al2O<sup>3</sup> films started crystallizing at 900 ◦C, capacitance vs. voltage (C–V) measurements revealed their improved electrical characteristics (i.e., reduced hysteresis phenomena). Hence, the authors concluded that annealing at 900 ◦C represented the best option in terms of both surface morphology and dielectric quality. On the other hand, many other papers demonstrated that such high annealing temperatures induce the formation of a thin stoichiometric or sub-stoichiometric silicon oxide interfacial layer [33,50–52]. This oxidation phenomenon can have a detrimental impact on the properties of high-κ/SiC interfaces, including in the case of abrupt Al2O3/4H-SiC interfaces obtained by ALD growth [40,53–55]. In this context, annealing in N<sup>2</sup> atmosphere can be the preferred solution, although uncontrolled SiO<sup>x</sup> formation can occur in N<sup>2</sup> atmosphere for high annealing temperatures. Moreover, Avice et al. [42] and Khosa et al. [36] showed that an additional effect of incomplete SiC oxidation was the formation of C clusters if not enough oxygen was present to enable the out-diffusion of carbon as carbon monoxide. The formation of the SiOx interfacial layers was observed independently of the annealing temperature or ambient. In fact, this phenomenon has been observed even in vacuum or at only 300 ◦C annealing temperature [55]. Hence, it is expected that the elimination of residual O<sup>2</sup> molecules in the annealing ambient is one the key issues for the limitation of SiOx formation.

In general, most of the reported postdeposition annealing studies were carried out in oxidizing (O<sup>2</sup> or N2O) or non-oxidizing (Ar, N<sup>2</sup> or forming gas) ambient, in the 500–1100 ◦C temperature range, and for short (1 min) or long (1–2 h) times. An interaction at the interface has always been observed by the formation of the silicon oxide layers and carbon clusters. The control of the chemical nature of the interface products, which in turn strongly affects the electrical characteristics, is not trivial.

In this context, Schilirò et al. [39,40] reported an interesting comparison between the properties of Al2O<sup>3</sup> thin films grown by PE-ALD on bare 4H-SiC and on a 5 nm thermal SiO2/SiC stack. TEM analyses (shown in Figure 3a,b) showed uniform interfaces and well adherent films. The surface morphology of the films (determined by AFM) was very similar, with root-mean-square (RMS) values measured over a 1 µm<sup>2</sup> area of 0.670 nm and 0.561 nm for Al2O3/SiC and Al2O3/SiO2/SiC samples, respectively.

Though the interface structural quality appears analogous, quite different electrical properties were measured on MOS capacitors. In fact, current vs. voltage (I–V) measurements (Figure 3d) showed a higher leakage current in the Al2O3/SiC than in the Al2O3/SiO2/SiC stack. Furthermore, the breakdown fields, i.e., 5.7 MV/cm for the Al2O3/SiC and 7 MV/cm for the Al2O3/SiO2/SiC, demonstrated the better electrical quality obtained by the introduction of the SiO<sup>2</sup> at the interface. Moreover, the relative permittivity values, evaluated from the C–V curves (Figure 3c), were ε ≈ 6.7 and ε ≈ 8.4 for the Al2O3/SiC and the Al2O3/SiO2/SiC samples, respectively.

These results can be explained by considering both the larger conduction band offset between the SiO<sup>2</sup> and the SiC substrate (Figure 1b) and the different chemical impact of the substrate surface on the Al2O<sup>3</sup> nucleation process. This latter is schematically depicted in Figure 4, showing that the presence of the OH species on the SiO<sup>2</sup> surface favours the

nucleation process by increasing the number of nucleation sites and the formation of denser Al2O<sup>3</sup> films.

**Figure 3.** TEM images of Al2O<sup>3</sup> thin films grown by PE-ALD on 4H-SiC (**a**) and SiO2/4H-SiC (**b**) substrates and their relative electrical characteristics in terms of C-V curves (**c**) and I-V measurements (**d**) performed on MOS capacitors. Black and red lines are related to Al2O<sup>3</sup> thin films deposited on SiO2/4H-SiC and 4H-SiC substrates, respectively. Reproduced with permission from [40]. Copyright © 2016 WILEY-VCH Verlag GmbH & Co. KGaA.

ε ε **Figure 4.** Schematic representation of the chemical impact of the different substrate surfaces on the Al2O<sup>3</sup> nucleation processes, in the case of a bare SiC substrate (**a**) or a SiC substrate with a thin SiO<sup>2</sup> layer on the top (**b**). Reproduced with permission from [40]. Copyright © 2016 WILEY-VCH Verlag GmbH & Co. KGaA.

Other high-κ oxides have been also grown on SiC substrates as thin amorphous films, such as HfO<sup>2</sup> [56–58], La2O<sup>3</sup> [59,60], Ta2O<sup>5</sup> [61], and TiO<sup>2</sup> [62]. Among these materials, HfO<sup>2</sup> thin films have been widely investigated because of their superior theoretical

a) b)

properties, such as much higher permittivity. However, the main drawback for their implementation on SiC-based devices is the imperfect alignment of both conduction and valence band offsets (about 0.7 and 1.74 eV, respectively) with those of SiC. Cheong et al. [56,57] reported on HfO<sup>2</sup> films with a very high dielectric constant value (20), but the interface state density Dit was as high as 2 <sup>×</sup> <sup>10</sup><sup>13</sup> eV−<sup>1</sup> cm−<sup>2</sup> , which give no advantage with respect to the SiO2/SiC system. Moreover, very high leakage current densities of 1 mA cm−<sup>2</sup> were already recorded in an electric field as low as 0.3 MVcm−<sup>1</sup> by Afanas'ev et al. [58]. While in this case, the high leakage current could in principle be mitigated by the introduction of a SiO<sup>2</sup> layer at the SiC interfaces, a further issue to be considered is the low thermal stability of HfO<sup>2</sup> at temperatures higher than 500 ◦C, when crystallization starts to occur. −

−

− −

κ

In order to maintain the best features of HfO<sup>2</sup> (i.e., high permittivity) and Al2O<sup>3</sup> (i.e., high crystallization temperature), these two materials have been evaluated in combined laminated systems.

In this context, some Al2O3/HfO<sup>2</sup> bilayer systems deposited on thermally oxidized 4H-SiC substrate have been studied, the most complex stack being an Al2O3/HfO<sup>2</sup> multilayer laminated system [63]. The Al2O3/HfO<sup>2</sup> nanolaminate shown (Figure 5a) had a total thickness of 38 nm and perfectly distinguishable sublayers, each with thickness of about 1.4–1.8 nm. After annealing treatment at 800 ◦C in N<sup>2</sup> atmosphere, the interfaces between the sublayers (Figure 5b) became less sharp, and an intermixing process occurred. Notably, both the as-deposited and annealed samples showed amorphous structures. AFM investigation pointed to a smooth surface morphology with a low RMS value of 0.6 nm, which was maintained in the annealed sample. A dielectric constant value of 12.4 was determined by the accumulation capacitance in MOS capacitors, taking into account of the SiO<sup>2</sup> interfacial layer. However, on the as-deposited sample, a high value of oxide trapped charge (Not) of 2.7 <sup>×</sup> <sup>10</sup><sup>12</sup> cm−<sup>2</sup> was found. Nevertheless, after the annealing treatment at 800 ◦C in N2, the nanolaminated stack showed an improvement of the dielectric properties, since the dielectric constant value increased to 13.4 and the Not value decreased to 1.15 <sup>×</sup> <sup>10</sup><sup>12</sup> cm−<sup>2</sup> . − −

**Figure 5.** TEM image of (**a**) as deposited and (**b**) 800 ◦C annealed Al2O3/HfO<sup>2</sup> nanolaminate, deposited onto SiO2/SiC substrate. Reproduced from [63]. Copyright © 2020 Authors.

κ Few other papers have been dedicated to thin films of simple high-κ oxides such as La2O<sup>3</sup> [59,60], Ta2O<sup>5</sup> [61], or TiO<sup>2</sup> [62], which, when directly grown on 4H-SiC, showed analogous results as in the case of simple HfO<sup>2</sup> oxide. Generally, they demonstrated good dielectric constant values, but their high interface state density and low breakdown voltages made them still far from possible implementation in real devices.

κ In summary, among the pure high-κ oxides, Al2O<sup>3</sup> thin films represent the best compromise, especially in combination with a very thin SiO<sup>2</sup> interfacial layer. Some possible other high-κ bilayers, such as HfO2/Al2O<sup>3</sup> [64], Y2O3/Al2O<sup>3</sup> [65], or ZrO2/SiO<sup>2</sup> [66], exhibited some potentiality, although not many reports have been made available to date, especially regarding devices.

In regard to dielectric properties, the relevant results on the electrical performances of high-κ oxides integrated in SiC MOSFETs are reported in more detail in Section 4.
