*4.2. PiN Diode*

Attributed to its smaller bandgap, 3C-SiC has a lower p-n junction built-in potential (≈1.75 V) than 4H-SiC (≈3 V). In [9] it is shown that, up to 4.5 kV blocking voltage, the forward voltage drop at 250 A/cm<sup>2</sup> remains lower for 3C-SiC than 4H-SiC in PiN diode applications. Until recently, however, fabricating 3C-SiC PiN diodes has been difficult, not only because of the high defect density within 3C-SiC epilayers caused by the lattice mismatch with Si [21], but also due to the lateral nature of structures necessary to avoid the 3C-SiC/Si heterojunction. While there are several reports on achieving ntype conduction in 3C-SiC epi/implanted layers [42,48,66], and p-type conduction in Al doped epilayers [66,89], it remains an obstacle for p-type implanted layers. This is mainly due to the post implantation anneal temperature, which was limited to the Si melting point, 1414 ◦C, which is not sufficient to activate the deep level Al dopants, even if hot implantation was applied.

Low voltage lateral p-n junction diodes were previously demonstrated via the formation of implanted n+ regions in p-type doped 3C-SiC epilayers grown on Si substrates [90,91]. However, to make the most of its benefits in power applications, a vertical structure is necessary. 3C-SiC growth methods have improved in recent years [6,92,93], and bulk 3C-SiC are now available [51]; thus, a higher annealing temperature can now be applied. Vertical PiN diodes were fabricated on free standing 3C-SiC material by implanting Al in n-type doped epilayer and the forward current density is shown in Figure 11a. The built-in potential of the fabricated PiN diode is around 2 V, slightly higher than the theoretical value 1.75 V [9], but it is still much lower than the typical >3 V for 4H-SiC [94–96]. The forward current density goes above 1000 A/cm<sup>2</sup> at 2.7 V, and the lowest differential resistance is estimated to be 0.5 mΩcm<sup>2</sup> . The device on–off ratio at <sup>±</sup>5 V is as high as 10<sup>9</sup> , as shown in Figure 11b, and a blocking voltage above 100 V is achieved (Figure 11c). An observation to note with respect to bipolar PiN diode I-V characterisation is that no bipolar degradation has been reported in the literature with respect to 3C-SiC pn diodes. This is most likely due to the fact that attention is being placed upon more fundamental device limiting issues such as SF-induced leakage currents.

**Figure 11.** (**a**) Forward J-V characteristics, (**b**) on-off performance at ±5 V, and (**c**) reverse breakdown of bulk 3C-SiC PiN diodes.
