*3.4. Capping Diamond*

The capping diamond concept was initially proposed in 1991 [139]. This approach relies on the deposition of the PCD film directly on the device die, immediately on top of the passivation layers, bringing the diamond film in close contact with the hot spots—Figure 14. Initial calculations predicted a 50 ◦C reduction in the channel temperature of a 2 W/mm GaAs device caused by "thermally shorting" the source, gate and drain contacts with a highly thermally conductive diamond film [140].

Despite no experimental works reported the direct growth of PCD films on GaAs FETs, the concept was picked up by the GaN community and the first successfully diamondcoated working GaN device was reported 10 years later, in 2001, by researchers from the Fraunhofer Institute and from DaimlerChrysler high frequency electronics labs [46]. Diamond films with thicknesses between 0.7 and 2 µm were deposited directly on the SiN passivation layer of GaN FETs using an MPCVD ellipsoid reactor operating at 2.45 GHz at a temperature lower than 500 ◦C—Figure 15a. Since the regular ultrasonic seeding with diamond particles was found to damage the SiN protective layer, an alternate seeding method based on the sedimentation of fine diamond particles from an agitated emulsion was used. The output and transfer characteristics of the devices were measured before and after the deposition of the 0.7 µm-thick PCD film, showing that the coated FETs remained fully operational—Figure 15b.

W/mm GaAs device caused by "thermally shorting" the source, gate and drain contacts

–

–

≈1

→

→

—

**Figure 14.** Capping diamond concept. —

–

– , "Heat sistor devices," pp. 744– **Figure 15.** (**a**) Reflection electron microscope image (REM) and (**b**) Transfer characteristics of a two-finger GaN FET coated with a 0.7 µm-thick PCD film (reprinted from Diam. Relat. Mat., vol. 10, no. 3–7, M. Seelmann-Eggebert, et al., "Heat-spreading diamond films for GaN-based high-power transistor devices," pp. 744–749 [46], Copyright 2001, with permission from Elsevier).

 − order to protect the thermally sensitive Schottky gate contact, a "gate after diamond" pro- Despite these encouraging first results, the next successful reports describing the deposition of diamond films directly on HEMT devices date from 2010 [141]. In a joint work by the University of Maryland and the Naval Research Laboratory (USA), the authors reported the deposition of a 0.5 µm-thick NCD film on a GaN-on-Si HEMT by MPCVD. A 50 nm-thick silicon dioxide (SiO2) passivation layer was previously deposited on the surface of the device and the deposition temperature was increased to 750 ◦C. The NCDcoated device exhibited 20% lower temperature in comparison with the SiO2-passivated one, however, after NCD coating, *I*D max and *g*m peak decreased from 176 mA/mm and 145.4 mS/mm to 157 mA/mm and 113.9 mS/mm, respectively. This effect occurred due to a reduction in pinch-off voltage following the increased drain-gate coupling through the SiO<sup>2</sup> and NCD film. The NCD film was unintentionally contaminated with boron impurities (1 × 10 10 cm−<sup>2</sup> ) and an increase of the leakage current was observed. In order to protect the thermally sensitive Schottky gate contact, a "gate after diamond" process was further developed by the team [142]. This approach involved the deposition of a 0.5 µm-thick NCD layer with κ in excess of 400 W/(m·K) on a 50 nm-thick SiO<sup>2</sup> layer after completion of the mesa and ohmic processes, but before the gate metallization step. An

<sup>−</sup>

magnitude at a gate voltage of −

<sup>−</sup>

oxygen (O2)-based plasma etch was then used to recess etch the diamond in the gate region before metal deposition. Similarly to what happened in the previous approach, *I*D max decreased from ≈360 to ≈270 mA/mm after the deposition of the NCD film. The process was further optimized to allow the deposition of the NCD layer directly on the GaN surface [143,144], which improved the performance of the 2DEG in comparison with a reference HEMT passivated with SiN (2DEG density/mobility of 1.02 × 10 13 cm−2/1280 cm2/(V·s) against 8.92 × 10 12 cm−2/1220 cm2/(V·s), respectively), increased *<sup>I</sup>*D max and *<sup>g</sup>*m peak from 380 to 445 mA/mm and from 114 to 127 mS/mm, respectively, and decreased the device on-resistance from 14.6 to 11.9 <sup>Ω</sup>·mm. At 5 W/mm DC power, the temperature of the NCD-capped HEMT was ≈20% lower than that of the SiN-capped one and the *R*th was 0.98 K·mm/W, ≈3.75 times lower. The use of a p-type diamond gate electrode was also proposed [145]. Again *I*D max increased from ≈290 mA/mm (with a nickel (Ni)/Au gate) to <sup>≈</sup>430 mA/mm (with the NCD gate), the on-resistance decreased from 29.4 to 12.1 <sup>Ω</sup>·mm and the leakage gate current decreased by nearly one order of magnitude at a gate voltage of −10 V. In a later process development, the SiO<sup>2</sup> layer was replaced with a 10 nm-thick SiN layer [146]. The capping of a SiN-passivated GaN-on-SiC HEMT with 500 nm NCD lead to an ≈8% reduction in the peak temperature, less than the 20% obtained with the gate-after-diamond approach due to the SiN passivation layer and the resulting increased *TBR*GaN/diamond [147].

Following a different approach in 2011 Alomari et al. [148] reported the deposition of a 0.5 µm-thick NCD film on In0.17AlN0.83/GaN HEMTs by bias-enhanced nucleation (BEN) and HFCVD at temperatures of 750–800 ◦C—Figure 16a. The HEMT structures included the dielectric passivation and stress control layers based on SiO<sup>2</sup> and Si3N<sup>4</sup> and a thin sputtered Si layer for BEN step (Figure 16b). The DC characteristics of the devices remained fundamentally similar after the NCD deposition. *f* <sup>T</sup> and *f* max were 4.2 and 5 GHz, respectively, and the RF-tested device showed high gate leakage. In 2014 the NCD layer thickness had been increased to 2.8 µm [149]. – — 

"Diamond overgrown InAlN/GaN HEMT," pp. 6 – **Figure 16.** (**a**) SEM top view of a GaN HEMT coated with a 0.5 µm-thick NCD layer. (**b**) TEM cross section of the NCD film showing no voids at the passivation/growth interface (reprinted from Diam. Relat. Mater., vol. 20, no. 4, M. Alomari et al., "Diamond overgrown InAlN/GaN HEMT," pp. 604–608 [148], Copyright 2011, with permission from Elsevier).

– Zhou et al. [150] deposited 155–1000 nm-thick PCD films onto Si3N4-passivated AlGaN/GaN-on-Si HEMT structures and used transient thermoreflectance experimental results, together with device thermal simulations, to evaluate the impact of the diamond capping layer thickness on the maximum device temperature. A 12% maximum reduction in peak channel temperature could be achieved with a 16 × 125 µm/50 µm gate-pitch AlGaN/GaN-on-Si HEMT with a 1 µm-thick PCD film deposited on the source-drain open-

ing. If the *TBR*GaN/diamond was not included, a further 10% temperature reduction could be expected. Little further thermal benefit was predicted when using PCD films thicker than 2 µm, with only a maximum 15% temperature reduction. If PCD could be grown on both source-drain opening and metal contacts, a 1.5% better thermal benefit would be achieved for thicker films by increasing the area of the heat spreader. The quality of the initial few µm of the capping diamond layer was also shown to play an important role in reducing the channel temperature [151].

In 2019, researchers from the Power and Wide-Band-Gap Electronics Research Laboratory and Lake Diamond SA deposited 3 µm-thick PCD heat spreaders on the top of vertical GaN PiN diodes using a 30 nm-thick SiN adhesion layer [152]. With 0.9 W of dissipated power, the temperature of the coated device was 64% lower than the temperature of a reference uncoated device.

The appearance of biaxial strain in the Al(Ga)N layers due to the high diamond deposition temperatures, the lattice mismatch between the layers, and the different *CTE*s of the stack materials was studied in detail by Siddique et al. [91]. In their study, a 46 nm-thick SiN layer was used to protect the III-nitride layers beneath the AlGaN barrier layer during the diamond CVD. Figure 17 shows scanning transmission electron microscope (STEM) images of the SiN layer (a) before and (b) after the diamond deposition; even though the SiN layer was partially degraded during the deposition of the diamond and was thinned down to 20 nm in some regions, it remained continuous across the entirety of the AlGaN barrier layer. The deposition of the diamond film was seen to increase the biaxial tensile stress in the AlN and GaN layers by 3%, which caused a 4.5% reduction of the total 2DEG sheet charge density (from 1.04 × 10 13 to 0.99 × 10 13 cm–2 ). A 52.8 m<sup>2</sup> ·K/GW *TBR*GaN/diamond was measured (including the SiN, GaN cap, AlGaN, and AlN layers). – 

(**a**) (**b**) "Structure and by MOCVD," ACS Appl. Electron. Mater., vol. 1, pp. 1387– **Figure 17.** Bright-field STEM images showing the Al(Ga)N/SiN layer interfacial region (**a**) before and (**b**) after diamond growth (reprinted with permission from A. Siddique et al., "Structure and Interface Analysis of Diamond on an AlGaN/GaN HEMT Utilizing an in Situ SiNx Interlayer Grown by MOCVD," ACS Appl. Electron. Mater., vol. 1, pp. 1387–1399, 2019 [91]. Copyright 2019 American Chemical Society).

> In order to prevent the modulation of the 2DEG due to the stress induced in the channel by the capping diamond layer, Arivazhagan et al. [153] proposed depositing the diamond layer on the drain electrode alone (instead of directly on the device channel). The impact of this approach was evaluated using thermo-electrical simulations. The results suggest that the deposition of the PCD film on the drain electrode will lower self-heating and allow higher *I*D max than in conventional GaN-on-Si HEMTs—without inducing any change in the 2DEG sheet charge density or in the device threshold voltage.

> > —

Despite the technological difficulties inherent to this technological approach, a breakthrough has been recently achieved by Fujitsu Limited. In 2021 Yaita et al. reported a diamond-coated GaN-on-SiC HEMT with improved DC characteristics [154]. A 2.5 µmthick PCD film was deposited by HFCVD on a 100 nm-thick SiN capping layer at 700 ◦C. In order to prevent the degradation by the elevated temperatures required to deposit the diamond film, the Schottky gate contact was replaced by a 40 nm-thick SiN insulating layer, followed by a Ni/Au gate contact. In addition, metal heat spreaders were attached to the deposited PCD. The *I*<sup>D</sup> and *g*<sup>m</sup> of the diamond-coated HEMT increased from 0.9 to 1.1 A/mm and from 102 to 148 mS/mm, respectively (Figure 18a). At the same time, for 25 W/mm *P*<sup>D</sup> the hotspot temperature lowered by more than 100 ◦C, which corresponds to a decrease in *R*th from 12.7 to 7.4 K·mm/W, and to a ≈40% reduction in the amount of heat generated by the diamond-coated GaN HEMT (Figure 18b). Fujitsu aims to commercialize improved-heat-dissipation GaN HEMT amplifiers in year 2022 for use in weather radar systems and next-generation wireless communication systems [155].

**Figure 18.** (**a**) Transfer curve and transconductance vs. gate voltage. (**b**) Hotspot temperature calculated from the Raman peak shift (reprinted from [154], Copyright 2021 The Japan Society of Applied Physics.

Experimental results presented so far have been limited to the scope of single or dual-gate HEMTs. Zhang and co-workers implemented 3D thermal simulations to evaluate the impact of capping multi-finger HEMTs with PCD layers [156]. They observed that the capping diamond layer reduced the junction temperature and the temperature nonuniformity in the near-junction region across the channel; the efficiency of the capping diamond layer was also observed to increase with increasing thickness but with a decreasing trend. The largest thermal benefit could be expected under challenging conditions, such as high *P*D, narrow gate pitch, high *TBR*, as well as for traditional GaN-on-Si HEMTs. In the particular case of a 12-finger GaN-on-diamond HEMT operating at of 6 W/mm *P*<sup>D</sup> per gate, 20 µm gate pitch, and assuming a similar *TBR* between both GaN/diamond interfaces of 15 m<sup>2</sup> ·K/GW, the inclusion of a 20 µm-thick PCD capping layer would reduce the junction temperature from 195.8 to 172.2 ◦C, which corresponds to a net decrease of 23.6 ◦C. By reducing the thickness of the PCD layer to 1 µm, the reduction of junction temperature would still be as high as 14.9 ◦C.

 µm µm, the reduction of junction temperatur The impact of capping double-channel HEMTs was also evaluated with thermoelectrical simulations [157]. The authors observed that the PCD layer provides a lateral heat conduction path close to the hot spot located at near the drain side of the gate edge, modulating the channel lattice temperature distribution and making it become more uniform. For a *P*<sup>D</sup> of 46 W/mm the peak lattice temperature was reduced by 64 ◦C, indicating that the PCD layer plays an important role in device heat dissipation. Similar to what was

µm.

observed in [156], the effect of lattice temperature reduction increases with increasing PCD layer thickness. Taking the effect of temperature reduction and cost into consideration, the authors proposed the optimum thickness for the PCD layer to be 1 µm.

The impact of capping a pulsed-mode AlGaN/GaN HEMT with a PCD layer has been also evaluated with thermal 3D simulations [158]. The PCD capped layer not only reduced significantly the peak junction temperature but also suppressed its oscillation in the pulse mode operation, smoothing the temporal variation of the junction temperature. Again the cooling performance of the PCD capped layer was observed to increase with rising thickness but with a decreasing trend. The overall efficiency of this approach was shown to be more effective under harsh thermal conditions, including smaller duty cycle, higher TRB, and lower κ substrate.

The evolution of the relevant experimental results has been compiled in Table 6. While experimental results and functional HEMTs were reported between 2001 and 2014, most recent work focused on evaluating the biaxial strain induced by the diamond deposition temperatures (typically in excess of 500 ◦C) and on anticipating the thermal benefit of the diamond layer using thermal simulations. The electrical parameters of diamond-capped HEMTS are summarized in Table A4 in the Appendix A.


**Table 6.** Evolution of capping diamond technology.

<sup>a</sup> Values obtained with transient thermoreflectance.
