*4.1. Electrical Interconnections*

Conductive interconnections are the backbone of all fully integrated electronic devices [10]. These traces form the basis of circuits, and they must exhibit high conductivity and reliability. Furthermore, many applications require the circuit to stretch and deform [8]. For instance, a skin-mounted electrophysiology sensor is highly degraded by motion artifacts, and a stretchable circuit can greatly reduce these artifacts [4,17]. Interconnections for these soft, flexible, and stretchable devices have followed a three-stage development process: first came the development of stretchable interconnections based on fractal geometries fabricated with traditional MEMS processes [10,150]. Second, recent works have sought to fully print these systems on non-conventional substrates, such as TPU and PET, that are not compatible with MEMS fabrication [150]. Finally, these printed methods are being scaled with high throughput methods to make them suitable for commercial scales.

Several key challenges must be overcome in this third stage of interconnection fabrication. Crucially, they must be printed with high resolutions, speed, conductivity, and reliability on a variety of non-traditional substrates, and many applications require high resistive stability with local strain [9,10,17]. Although local strain can be alleviated with optimized geometries, printed interconnects are often embedded in a polymer matrix, which allows them to form conductive networks that remain conductive with strain [11,35,64]. These interconnections are typically stretchable up to 10% for wearable applications, although in some cases, stretchability up to 100% has been demonstrated [151]. However, the addition of polymer matrices often limits interconnect conductivity, which can often approach the limit set by bulk metals when sintered on temperature-stable substrates. As mentioned previously, these thin films are made flexible despite their high modulus through thin deposition heights, and they can stretch as a system without high local strain through optimized geometries [35]. However, these geometries may require spatial resolutions approaching the limits of fully printed technologies [152].

A summary of recently reported interconnections fabricated with high throughput processing is provided in Table 2, showing the different substrates, materials, fabrication methods, and curing approaches employed in state-of-the-art processes. In addition, resistances and resolutions are compared for each system, indicating which methods are preferred for each specific use case and application. When high conductivity is required, NPs and NWs inks with high material loadings are preferred, and sintering is often required in the case of NPs [17,153,154]. However, Scheideler et al. and Ohsawa et al. were able to achieve high conductivities on polyethylene naphthalate (PEN) substrates using NWs and NPs, respectively, without sintering. In addition to conductivity, the inks should not be significantly higher modulus when cured than the substrate, or advanced geometries are needed to alleviate local strain [35]. With optimized ink compositions and judicious trace patterning, very high reliability during bending, washing, and other wearable use can be demonstrated [82]. Finally, the same geometries that are effective in strain relief for high modulus MEMS interconnects are not always the ideal choice for stretchable interconnects because of the complex mechanics introduced when the substrate itself stretches and

deforms from Poisson effects and the substrate-ink modulus mismatch [35]. Therefore, Huttunen et al. performed an experiment to assess different trace geometries of AgNP inks on a PDMS substrate, determining that triangular patterns maintained conductivity with higher applied strain [35]. An example of several patterns printed on a stretchable PDMS sheet is provided in Figure 10a [35]. In summary, recent developments in high throughput interconnect printing allow one to produce patterns with conductivity and stretchability optimized to many bioelectronic applications. Still, more thorough testing and process optimization are required for these systems to become commercially adopted.


**Table 2.** High-throughput nanomaterial interconnection fabrication.
