*5.1. Strategy 1—Relay Protection*

It is assumed that a pole-to-ground fault occurs on the DC line between MMC 2 and MMC 4. At *t* = 0 s, the test system is in steady state. At *t* = 10 ms, a pole-to-ground fault occurs on the positive line side of B24. Suppose the relay protection completes fault location detection at 20 ms. LCS of B24 and B42 starts action at the same time. UFD of B24 and B42 opens after 0.25 ms. At *t* = 22.25 ms, UFD achieves full contacts separation and MBs start action. During the entire process, if the arm current is higher than twice the rated IGBT current, the converter will be blocked. The rated IGBT current of MMC 1 and MMC 3 is 1.5 kA, and the rated IGBT current of MMC 2 and MMC 4 is 3.0 kA. The blocked MMCs deblock at *t* = 40 ms and operate according to the pre-fault control strategy. Figures 5–7 give the responses of B24, B42, and MMCs, respectively.

It can be seen from Figure 5 that for B24 (CB near the fault), the current when LCS starts action is 23.4 kA, and the current when MBs start action is 19.2 kA. After MBs are fully opened, the maximum voltage across them is 933.0 kV, which is 1.87 times the rated DC voltage. It can be seen from Figure 6 that for B42 (CB far from the fault), the current when LCS starts action is 5.5 kA. Furthermore, the current when MBs start action is 6.5 kA. The maximum voltage across MBs when they finish operation is 823.5 kV, which is 1.65 times the rated voltage of the DC grid. It can be seen from Figures 5 and 6 that it takes about 10 ms for the fault current to decay to zero.

It can be seen from Figure 7 that for MMCs near the fault, the currents of the smoothing reactors reach 14.3 kA and 7.3 kA, respectively. The arm currents are also very large, exceeding twice the rated IGBT current, and blocking MMC 2 and MMC 1. After MBs of B24 and B42 are disconnected, the overvoltage of the whole network reaches the peak value instantly. The voltage of MMC 3 reaches 1162.5 kV, which is more than twice the rated DC voltage (the peak value does not appear at the moment when CB is opened).

#### *5.2. Strategy 2—Local Detection and Local Action*

In this test system, the rated IGBT current of MMC 1 and MMC 3 is 1.5 kA, and the rated IGBT current of MMC 2 and MMC 4 is 3.0 kA. Therefore, MMC 1 and MMC 3 would be blocked when the arm current reaches 3.0 kA; MMC 2 and MMC 4 would be blocked when the arm current reaches 6.0 kA. The maximum currents of all DC lines in the test system under normal conditions are less than 3.0 kA. The defined positive directions of CBs are marked in Figure 4. Therefore, the HVDC CB is supposed to operate as soon as the current through it is in the positive direction and reaches 6.0 kA.

**Figure 5.** Responses of B24 under strategy 1: (**a**) currents flowing through load commutation switch (LCS), main breakers (MBs), and arrester; (**b**) voltages across ultra-fast disconnector (UFD), LCS, and arrester.

**Figure 6.** Responses of B42 under strategy 1: (**a**) currents flowing through LCS, MBs, and arrester; (**b**) voltages across UFD, LCS, and arrester.

 **Figure 7.** Responses of MMCs under strategy 1: (**a**) currents flowing through the smoothing reactors; (**b**) voltages across MMCs; (**c**) arm currents.

It is assumed that a pole-to-ground fault occurs on the DC line between MMC 2 and MMC 4. At *t* = 0 s, the test system is in steady state. At *t* = 10 ms, a pole-to-ground fault occurs on the positive line side of B24. Figure 8 shows the currents flowing through the eight HVDC CBs. It can be seen that the current through B24 and B42 on both sides of the fault line reaches 6.0 kA. B24 and B42 start action at 1.6 ms and 8.8 ms after the fault, respectively. As a result, the DC currents passing through the other CBs begin to decrease, and the other CBs do not operate.

Then, the speed and selectivity of the proposed strategy is studied by complete line fault scanning of the test system. This is achieved by simulation of DC faults at all typical fault locations. The typical fault locations are selected as the sending end, the receiving end, and the midpoint of all the DC lines. The results are shown in Table 5.

**Figure 8.** Currents flowing through eight HVDC breakers.


**Table 5.** The activated CBs and activated time under different faults.

It is noted in Table 5 that this strategy has high speed and protection selectivity. Take the fault on the positive line side of B24 as an example for explanation. Obviously, CBs closest to the fault site are B24 and B21. Therefore, B24 and B21 should be the first CBs to start action. However, B24 is activated but B21 is not. On the one hand, this is because the fault current through B21 is provided by MMC 1. Due to the smoothing reactors and DC line, the fault current through B21 reaches the operating current more than 2 ms later than B24. Therefore, for B21, it will not start action since the fault disappears once B24 starts action. On the other hand, the fault current through B21 is in the opposite direction, whereas the fault current through B24 is in the positive direction. Therefore, according to the local protection and local action strategy, B21 will not start action.

## *5.3. Performance Comparison of Two Strategies*

To show the complete features of strategy 2, comparisons with strategy 1 are given under the pole-to-ground fault on the positive line side of B24. Figures 9–11 give the responses of B24, B42, and MMCs, respectively. It can be seen from Figure 9 that for B24 near the fault, the current when LCS starts action is 6.0 kA. Moreover, the current when MBs start action is 12.6 kA. After MBs are fully opened, the maximum voltage across them is 890.6 kV, which is 1.78 times the rated voltage of the DC grid. It can be seen from Figure 10 that for B42 far from the fault, the current when LCS starts action is 6.0 kA. Furthermore, the current when MBs start action is 7.1 kA. The maximum voltage across MBs after they are disconnected is 831.9 kV, which is 1.66 times the rated DC voltage. Both Figures 9 and 10 show that it takes about 10 ms for the fault current to decay to zero.

**Figure 9.** Responses of B24 under strategy 2: (**a**) currents flowing through LCS, MBs, and arrester; (**b**) voltages across UFD, LCS, and arrester.

**Figure 10.** Responses of B42 under strategy 2: (**a**) currents flowing through LCS, MBs, and arrester; (**b**) voltages across UFD, LCS, and arrester.

**Figure 11.** Responses of MMCs under strategy 2: (**a**) currents flowing through the smoothing reactors; (**b**) voltages across MMCs; (**c**) arm currents.

It can be seen from Figure 11 that for MMC 2 and MMC 1 that are close to the fault, the currents through the smoothing reactors reach 6.6 kA and 4.6 kA, respectively. The arm currents do not exceed twice the rated IGBT currents, and MMC 2 and MMC 1 do not need to be blocked. When B24 and B42 are completely disconnected, the overvoltage of the whole network reaches the peak value instantly. The voltage of MMC 3 reaches 1054.0 kV, which is more than twice the rated DC voltage (the peak value does not appear at the moment when CB is opened).

For the pole-to-ground fault on the positive line side of B24, Table 6 shows the performances of the two strategies. It can be seen from Table 6 that the fault isolation time is earlier in strategy 2. The current level when CBs closest to the fault are activated is much lower in strategy 2 than that in strategy 1. In addition, in strategy 2, the peak currents flowing through the smoothing reactors and the

arms are greatly reduced. More specifically, the MMCs in strategy 2 do not need to be blocked, and the impact of the fault is mitigated. Above all, the transient performance of strategy 2 is improved.


**Table 6.** Performance comparison of the two strategies.

## *5.4. Cost Comparison of Two Strategies*

Taking the pole-to-ground fault on the positive line side of B24, for example, the device costs of CBs can be computed as follows. LCS is not required to withstand high voltages. MBs should be able to withstand the maximum pole-to-ground voltage as well as the maximum fault current after MBs are activated. Therefore, MBs are the main investment in both the two strategies [23].

Assume that the HiPak 5SNA 3000K452300 (ABB, Lenzburg, Switzerland) is adopted as the IGBT module. The rated collector–emitter voltage of the IGBT module is 4.5 kV. The breaking capability is 3 kA. Since the breaker is designed to break the current in either current direction, the direction index is 2. The peak current of the IGBT module can be obtained from Table 6. Moreover, the required breaking capability of CBs is usually larger than that. The IGBTs should be connected in parallel to guarantee sufficient current breaking capacity. In addition, series IGBTs in MBs need to withstand the pole-to-ground voltage. Furthermore, the series index could be calculated based on the maximum pole-to-ground voltage. In HVDC grids, one converter is usually connected to *m* (*m* ≥ 2) DC lines. Therefore, the total required device number of B24 under the two strategies could be computed as listed in Table 7.


 2

 7

 3164 *m*  2

 5

2150 *m*

Direction index

Parallel index

Number of required IGBTs

**Table 7.** Required device number of the two strategies.

It can be seen from Table 7 that as the number of the connected DC lines rises, the number of required IGBTs in strategy 1 increases more. Moreover, it is the same for other CBs. The cost savings

will be more conspicuous if there are more DC lines. Therefore, strategy 2 is very beneficial to reduce the investment of CBs in HVDC grids.
