**4. Discussion**

The switched-biasing technique in which the current source of the VCO is modulated with AC signals can reduce the closed-in phase noise of the VCO to minimize the generation of the flicker noise in the source. However, the effect on the overall performance of the VCO differs depending on the implementation method of generating the AC modulating signal. There are two general methods to generate the modulating signal: one uses the external signal generator and the other uses the oscillation signal coupled with the output of the VCO.

The external-biasing topology, which is a method using an external signal generator, showed that the closed-in phase noise of the VCO can be improved by the AC modulating signal of the current source [32,50]. However, it has drawbacks in the implementation of the integrated circuit because the chip area, power consumption, and design complexity can be increased by providing an external signal generator. In addition, as shown in Figure 15a, it is difficult to show the improvement in the performance caused by the reduction of the closedin phase noise because the induced noise from an external generator can directly result in performance degradation of the VCO. The performance degradation caused by the induced noise from the external generator may be greater than the performance improvement caused by the reduction in the closed-in phase noise. The low correlation between the AC modulation signal and the oscillation signal may also increase the noise contribution of the external generator at the output of the VCO, as depicted in Figure 15b. It has been reported that the noise reduction of the VCO with an external generator is independent in the band below the modulation frequency, but the noise signals that are dependent on the modulation frequency are presented at the output of the VCO [42,49,50,56]. Based on the results of previous studies, it can be understood that the modulation frequency of the current source in the switched-biasing technique should be set to a frequency that does not affect the phase noise of the VCO. For example, the modulation frequency can be set to a frequency over the flicker corner frequency.

**Figure 15.** Characteristic of external-biasing topology: (**a**) conceptual schematic of external biasing (also available in PMOS configuration); (**b**) large noise peaks appearing as harmonics of the modulation frequency correlated with the external signal (reproduced with permission from the author, Experimental study on MOSFET's flicker noise under switching conditions and modelling in RF applications; published by IEEE, 2001) [56].

The self-biasing topology, which is a method using the coupled signal from the VCO output, has been proposed to solve the problem caused by the use of an external generator [34]. As the tail current source of the VCO in the self-biasing topology is modulated by the oscillation signal, the correlation between the modulation signal and the output can be achieved using easy implementation without additional circuitry. The current efficiency driving the VCO core can be increased by decreasing the conduction angle owing to the

correlated AC modulation signal of the current source, based on the ISF theory [47,48]. In addition, the effect of the flicker noise of the current source is dramatically reduced in the self-biasing topology by the modulation frequency in the GHz band, which is higher than the flicker corner frequency. The DC bias voltage of the current source becomes an important design condition when the switched-biasing technique applies to the NMOS VCO using a low power supply voltage of 1.2 V or less. The efficiency of the switching operation is generally determined by the DC bias voltage, which is set near the threshold voltage because the current modulation should be exhibited by a small-sized switching signal. The DC bias of the current source in the initial research stage using the switched-biasing technique was set to the same biasing state as before the AC modulation of the source. However, the bias was changed to the threshold voltage of the current source transistor for clearly switching the on-off states of the current flow due to AC modulation [53,54,63]. The DC bias near the threshold voltage may not sufficiently supply the driving current for VCO operation, because the biasing current is generated at the sub-threshold region of the current source transistor, as shown in Figure 16a. In addition, it is difficult to apply to commercial circuits as operation reliability problems of the current source may occur owing to the PVT variation. Because the thermal noise produced from the voltage source for setting the DC bias can degrade the phase noise of the VCO, a method for reducing the contribution of the thermal noise should be applied to the circuit design for supplying the DC bias [58]. The capacitance of the resonator in the VCO is increased by the output coupling lines for self-biasing, as depicted in Figure 16b, and the resonance frequency of the LC tank can be affected by this increase. The coupling capacitor *CC* in Figure 16b, which determines the amplitude of the modulation signal, should be generally designed to be higher than the parasitic capacitance of the current source [51,58]. The frequency shift due to the additional capacitances becomes an important factor in designing the high-frequency VCO because the total reactance in the LC tank decreases as the oscillation frequency increases. Above all, the major problem in DC biasing near the threshold voltage of the current source is that the current source does not operate in the saturation, and the common node of the VCO does not achieve a high impedance. Low impedance at the common node may cause the deduction of the phase noise as more noise from the switching operation of the current source affects the VCO core [58]. The effect on impedance reduction at the common node by DC biasing near the threshold voltage may be minimized as proposed by the previous studies, which include the method of splitting the current source into several transistors, the method of using a source degeneration capacitor, and the method of implementing an additional filter for noise reduction [52,54,58,60,64].

**Figure 16.** Characteristics of the self-biasing topology: (**a**) description of the self-biasing; (**b**) tuning range limit by the effect of the parasitic capacitances present at the current sources.

When the DC biasing of the current source is set to a voltage higher than the threshold voltage, the flicker noise may not be reduced by degrading the effect of the switching operation at the current source. An adaptive DC biasing technique that sets the biasing voltage differently depending on the amplitude of the oscillation signal has been proposed to reduce the operation problem generated by the fixed DC biasing at the current source. The adaptive biasing technique has the advantage of increasing the stability of the VCO operation and the robustness of the start-up operation. It was shown that the self-biasing topology implementing adaptive DC biasing using a negative peak detector can compensate for PVT variation and the variation of the Q-factor of the varactor that occurs in tuning the oscillation frequency [63]. A self-biasing topology with a pulse generator with three different operating states has been proposed to achieve a low conduction angle in steady state and a fast start-up time [64]. As the main drawback, the auxiliary circuit to implement the adaptive DC biasing requires additional loading to reduce the Q-factor of the LC tank and tuning range and increases the power consumption. The advantages and disadvantages of each topology implementing the switched-biasing technique are summarized in Table 1.

**Table 1.** Characteristics of different bias schemes.


The performances of the CMOS VCO using the switched-biasing technique are summarized in Table 2. The performances of VCOs oscillating at different frequencies are quantitatively compared using the conventional figure-of-merit (*FoM*) and the figure-ofmerit with tuning range (*FoMT*) as follows [65]:

$$FoM[dBc] = L(\Delta f) - 20\log\left(\frac{f\_0}{\Delta f}\right) + 10\log\left(\frac{P\_{DC}}{1mW}\right),\tag{2}$$

$$FoMT[dBc] = L(\Delta f) - 20\log\left(\frac{f\_0}{\Delta f}\right) + 10\log\left(\frac{P\_{DC}}{1mW}\right) - 20\log\left(\frac{TR}{10}\right),\tag{3}$$

where *L*(Δ*f*) is the phase noise of the VCO in dB at the frequency offset Δ*f* from the center oscillation frequency, *PDC* is the power consumption, and *TR* is the frequency tuning range in Hz. The phase noise, *FoM*, and *FoMT* are normalized at a frequency offset of 1 MHz. In the ring-VCO, the self-biasing topology showed more improvement in the phase noise and *FoM* than the external-biasing topology. The LC-VCOs using the self-biasing topology showed a relatively high level of *FoM* below −179 dBc and *FoMT* below −174 dBc. The LC-VCO with a *FoM* of −190 dBc showed a *FoMT* of −179 dBc, which is a relatively low performance owing to the narrow tuning range [60]. The high *FoM* of −190 dBc is based on the phase noise reduction by the switched-biasing technique along with the reduction in the intrinsic noise and current consumption by using a PMOS current source operating in the triode mode [54,60]. The high *FoM* and *FoMT* of the VCO with the adaptive DC voltage, high modulation amplitude, and pulse waveform in the self-biasing topology show that the minimum conduction angle can be useful for improving the VCO performance [64]. Figure 17 shows that the performance of the VCO can be improved by reducing the noise injection when the modulation waveform is implemented as a pulse with a duty cycle of less than π in the switched-biasing technique [64].

**Figure 17.** Conduction angle in the VCO operation: (**a**) description of the conduction angle in the VCO; (**b**) comparison of the conduction angle between the constant-biasing and the switched-biasing techniques.


*Sensors* **2021**, *21*, 316

**Table 2.** Performance summary of CMOS VCO using a switched-biasing technique.
