**3. Experiments**

The proposed AC-DC converter was designed and fabricated in 65 nm low-Vt CMOS, as shown in Figure 8. The majority block was BGR in terms of area. The entire area was 0.081 mm<sup>2</sup> , which is so small that it can be integrated into the same IoT IC chip. The pulse generator available at the lab only generated an AC peak of 10 V. As a result, the AC-DC converter was measured with a 100 kΩ resistor connected with the AC voltage source to an input power larger than 10 µW. A 6 µF capacitor was connected with VDD.

**Figure 8.** (**a**) Layout of the AC-DC converter and (**b**) a die photo.

μ Figure 9a shows IDD vs. VDD by varying the load resistance RL. The AC-DC converter regulates VDD at 1 V with 10 µA or below. Figure 9b shows the measured waveform at different temperatures. The voltage source starts at 0.1 s with an amplitude of 10 V at 100 Hz. The converter charges up the load capacitance CVDD for 0.25 s until VDD reaches about 1 V. The measured average and ripple of VDD are summarized in Table 2. μ

> ℃ േ ℃ േ3 ℃ േ

0 0.2 VIN

30℃(meas.) 50℃(meas.) 70℃(meas.)

**0.9**

**0.46 0.47 0.48 0.49 0.5**

**0.95**


0 0.1 0.2 0.3 0.4 0.5

**[s]**

**[s] (a) (b)**

℃ േ


–25

**Table 2.** Measured VDD vs. temperature.


To verify the effect of the built-in POR, measurements were also performed by connecting the source and drain of PPD. As shown by "VDD without PMOS" in Figure 10, VDD was stuck at the ground level.

**Figure 10.** Measured waveform with and without PPD.
