*2.5. Decoupling Capacitor*

To stabilize VDD even with AC input, a decoupling capacitor CVDD needs to be placed. When a maximum output current of 10 µA at AC power frequency of 100 Hz is needed, the capacitance of CVDD is required to be 10 µA X 5 ms/10 mV~5 µF for a ripple in VDD of 10 mV. The entire AC-DC converter is simulated in AC mode, as well as with different capacitance values of CVDD, as shown in Figure 7. The system can be stable with CVDD of 20 nF or larger.

**Figure 6.** (**a**) Idea of a built-in POR and (**b**) the simulated waveform.

**Figure 7.** Bode plots with CVDD varied. (**a**) Gain vs. freq.; (**b**) Phase vs. freq.

Ω μ μ

1.E-07

10 –7

0 0.25 0.5 0.75 1 1.25

**VDD[V]**

1.E-06

10 –6

1.E-05

10 –5

**IDD[A]**

1.E-04

10 –4

1.E-03

10 –3
