3.1.3. DBS

The Medtronic [57] Deep Brain Stimulation (DBS) system for Epilepsy which was approved by the FDA in 2018 is a device that delivers controlled electrical pulses to the brain. The system consists of a pulse generator (IPG) as shown in Figures 10 and 11, that is implanted under the skin of the upper chest, and two leads implanted in the brain. The Medtronic DBS system for epilepsy helps to decrease the frequency of seizures. Unlike the RNS system, the DBS system applies an open-loop stimulation technique. The stimulation parameters are set within a frequency range of 2 Hz to 250 Hz in voltage mode, and 30 Hz to 250 Hz in current mode, a current range of 0 mA to 25.5 mA, a voltage range of 0 V to 10.5 V and a pulse-width range of 60 μs to 450 μs [58]. The Medtronic DBS system for epilepsy is used in conjunction with antiepileptic drugs in individuals 18 years of age or older, with partial onset seizures, with or without secondary generalization, who have not responded to three or more antiepileptic medications. The DBS system is used in patients who have an average of six or more seizures per month. It has not been evaluated in patients with less frequent seizures.

In [59], 157 patients with implanted DBS were studied over time to measure the average decrease in seizures. This study shows that the average decrease in seizures frequency was 56% after the second year of implantation. This study also shows that 54% of the patients had a seizure reduction of at least 50% after the second year of implantation. During this study, 14 patients were reported seizure-free for at least 6 months.

**Figure 10.** FDA approved deep-brain stimulation (DBS) system for epilepsy (Courtesy Food and Drug Administration (FDA)).

**Figure 11.** FDA approved DBS system for epilepsy [57] (Image with kind permission of Medtronic).

#### *3.2. Commercialized Non-invasive Medical Devices*

Several different commercialized non-invasive medical devices are available in the market. In the following, we mention some of these devices. In general, non-invasive medical devices belong to the two following groups, namely,


#### 3.2.1. External Stimulators

In spite of considerable advantages in terms of efficiency and patient comfort and safety, implantable electronic medical devices for epilepsy control have the disadvantage of invasiveness, which may in some cases be intolerable. In contrast to IEMDs, external stimulators are not invasive and thus, no perioperative risks are taken. External stimulators are cheap and easy to use, although they are not as comfortable as IEMDs. Two types of external stimulators have been shown to affect the seizure frequency, namely the transcutaneous Vagus Nerve Stimulation (tVNS) [60] and the External

Trigeminal Nerve Stimulation (eTNS) or transcranial Trigeminal Nerve Stimulation (tTNS). In the following, each type of external stimulation is reviewed and commercialized products are presented.

The effectiveness of tVNS for depressive disorders treatment is reported in [61]. One hundred and twenty cases with mild and moderate depression were studied in a double-blinded randomized clinical trial. This study shows that tVNS has the same effect as VNS in the treatment of depressive disorders. These results encouraged researchers to investigate the effects that tVNS has on epilepsy. In [62], a group of ten patients with drug-resistant epilepsy were studied. tVNS was applied while keeping the dose of the medication. Stimulation was performed using biphasic pulses of pulse-width of 300 μs with an applied average voltage of 25 V. The stimulation frequency was chosen as 10 Hz. This pilot study shows that employing tVNS could reduce the seizure frequency in half of the patients. However, this study has several drawbacks including a lack of randomized stimulation, due to a small number of patients and an inhomogeneous patient group in terms of the type of seizures (focal, generalized epilepsy). This study led to introducing the Nemos system (Figure 12), manufactured by Cerbomed [63], which was taken over by tVNS Technologies GmbH in October 2018. Nemos, which is a transcutaneous device, stimulates the auricular branch of the vagus nerve using a handheld pulse generator. The patients have to apply the stimulation four hours per day. This device received the CE marking in Europe and costs 2499.00 €. The Gammacore is another device introduced by ElectroCore Medical LLC which employs transcutaneous VNS for the treatment of epilepsy. This FDA-approved device which is mainly designed for the treatment of headaches is also suggested as a treatment for epilepsy [64].

**Figure 12.** Transcutaneous Vagus Nerve Stimulation device for epilepsy control [63] (Image reprinted with kind permission of tVNS Technologies GmbH).

In 2008, Dr. Christopher DeGiorgio started a project pertaining to the long-term study on the effect of external trigeminal nerve stimulation (eTNS) on epilepsy control [65]. The project started with 50 patients. Out of 50 patients, 35 patients continued the long-term study for one year. In this study, it is shown that the median seizure frequency decreases by 34.8% after one year by employing eTNS. The Monarch eTNS system is an external trigeminal nerve stimulation system proposed by NeuroSigma [66]. This device has European approval for the treatment of epilepsy in adults and children 9 years and older.

#### 3.2.2. Seizure Alerting Devices

Seizure alerting devices are designed to notify the onset of a seizure. These devices help the patients to quickly obtain help from their surroundings. Sudden unexpected death in epilepsy (SUDEP) is a fatal circumstance of epilepsy which often occurs during sleep. Seizure alerting devices help the caregivers and family by notifying the seizure onsets. Some seizure alerting devices are capable of monitoring the breathing of the patients during the sleep; upon detecting any abnormal circumstance, they notify the family or the caregiver of the patients. In addition, alerting the parents of an epileptic child is vital since a prolonged seizure can lead to brain damage, and even death. Hence, seizure alerting systems are important recent devices with a new role in epilepsy handling. Nevertheless, seizure alerting devices are by essence not useful for the patients who are alone, or patients who do not accept to be checked by others. Most of these devices detect the seizures by monitoring the repetitive movements of the patient, which may be ineffective to some types of epilepsy, e.g., tonic-clonic seizures or focal motor seizures. Hence, these devices cannot detect the seizures if the patient does not exercise large movements, e.g., during an absence seizure. Four types of seizure alerting devices are available at the time of writing:


Most watch devices used as seizure alerting systems employ an accelerometer to detect abnormal and repetitive movements. Some of these devices have a global positioning system (GPS) device. Hence, if a seizure is detected, the location of the patient is sent by smartphone text messages or email. The Smartwatch Inspyre by Smart Monitor [67] is a smartwatch that detects the repetitive shaking motions and alerts determined contact person(s).

The electrodermal activity (EDA) which is also known as galvanic skin response (GSR) is a biomarker that is shown to be effective in seizure detection. The EDA relates to the electrical characteristic of the skin that changes due to sweating in response to a physiological change in the body. The electrodermal activity is monitored by measuring skin conductance. For example, the conductance can be calculated by applying a low-amplitude constant voltage while measuring the current [68]. In [69], it is shown that using an EDA sensor in addition to the accelerometer used for motion/movement detection increases the quality of the seizure detection, which led to proposing new algorithms for seizure classification reported in [70,71]. This concept is used in the watch device with FDA clearance which was introduced by Empatica Inc. [72]. Embrace2 is the latest watch device for seizure alerting which monitors the EDA, temperature and also employs an accelerometer and gyroscope. This 249 \$ device, which is shown in Figure 13 offers more than 48 h of battery life with fast charging capability (30 min). This device sends the data acquired by the sensors to a compatible smartphone using Bluetooth technology. The smartphone processes the data using an application and alerts the family or a caregiver if a seizure is detected. Empatica Inc. also proposes a 1690 \$ device namely the E4 for scientific research. The E4 has several sensors including a photoplethysmography (PPG) sensor, an electrodermal activity sensor, an infrared thermopile for reading the skin temperature and a three-axis accelerometer. Raw data delivered by the watch can be viewed in real-time and saved for future use.

**Figure 13.** Embrace2 by Empatica Inc. [72] for seizure detection (Image reprinted with kind permission of Empatica Inc.).

The EDA is also one of the most important biomarkers of SUDEP, as shown in [73]. It is reported that post-ictal generalized EEG suppression (PGES) appears to be a flat EEG following a seizure which is found in 100% of cases of SUDEP [73]. It is also shown that the duration of PGES correlates with the amplitude of EDA measured from the skin. This founding confirmed that seizure alerting devices such as the Embrace2 can deliver alert if there is a probability of SUDEP, which could save thousands of lives.

The first FDA cleared seizure alerting system that is not based on EEG recording is the Brain Sentinel monitoring and alerting system (known as SPEAC system) by Brain Sentinel, Inc. This device records the surface electromyography (sEMG) signals from the biceps of the patients. Hence, this device can accurately detect the seizures in case of tonic-clonic seizures. In addition to sEMG recording, the system records the audio during each event. This system helps physicians to accurately measure the seizure frequency characteristics.

Mattress seizure alerting devices are placed under a mattress where they can detect vibrations and movements. If a seizure-like movement is detected, an alarm will be triggered. The main difference between mattress devices and watch devices is that mattress devices are not wearable. The MP5-UTB is a mattress seizure-alerting device, designed by Medpage Ltd. The Emfit MM is a mattress device which is designed by Emfit Ltd. and which monitors the movements during sleep. This device was used in a study [74] including 45 patients. In this study, 78 seizures were detected using video-EEG. The Emfit MM system could detect 23 seizures out of the 78 seizures. Most importantly, this device could detect 11 out of 13 tonic-clonic seizures.

Camera devices are alternate non-wearable seizure alerting devices with which the movement of the patient is recorded and processed. The system warns the family or the caregiver of the patient if any unusual movement is detected. SAMi is a camera-based seizure alerting system by Hipass Design LLC. In this system, a remote infrared camera records the patient movements and sends the data to a smartphone for processing. This device records the audio of each event, as well.

#### **4. Neural Recording Circuit Techniques**

As a common block to most aforementioned systems, the front-end amplifiers in the recording chain represents one of the most challenging part. Owing to the extremely low amplitude of the recorded brain signals, low-noise electronics are required. Simultaneously, low-power design is necessary to guarantee the autonomy of the implantable and also portable systems. These constraints turn into contradictory design specifications and thus trade-offs must be accepted. While solutions have been provided, new challenges appear to emerge with the increase in the number of electrodes and recording channels. This criteria is in contrast to most other blocks of implantable systems which can be limited even to a single unit. Consequently, recording techniques show significant design challenges, which are explored in the following along with their possible solutions.

#### *4.1. Low-Noise Front-End Amplifier*

A neural amplifier is required next to the sensing electrode to amplify the weak neural signals and filter them. A neural amplifier should have five main features as follows:


In addition to the aforementioned features, a neural amplifier may provide integrated low-pass filter functionality. A low-pass filter is an important part of the analog front-end (AFE) to avoid aliasing. In general, neural amplifiers are considered into two categories, including ac-coupled amplifiers and dc-coupled amplifiers.

The ac-coupled amplifiers use a capacitor placed at the input, in the signal path to block the dc level. Several architectures of ac-coupled neural amplifiers are proposed in literature including capacitive-feedback network neural amplifiers, open-loop network neural amplifiers and chopper amplifiers. Figure 14 shows two common architectures for designing ac-coupled capacitive-feedback neural amplifiers.

**Figure 14.** Overview of the ac-coupled capacitive-feedback structure for neural amplifiers. (**a**) Classical feedback topology and (**b**), capacitive T-feedback topology.

Figure 14a presents the general architecture of ac-coupled capacitive-feedback neural amplifiers. In this structure, *C*1 is used to block the dc level that is created at the electrode-electrolyte interface. The value of *C*1 is typically selected smaller than 20 pF since this capacitor affects the input impedance of the amplifier. The mid-band gain of this amplifier is defined as *C*1/*C*2. There is a high-pass corner in the frequency response of this amplifier which is determined by *C*2 and *R*1. For recording low-frequency neural signals, the high-pass corner frequency of the amplifier should be at few MHz to few Hz. Hence, a very large resistance is required to achieve such a corner frequency. In neural amplifiers used in implantable devices, these resistors are implemented as pseudo-resistors to avoid bulky physical resistors. A pseudo-resistor is implemented as a highly-resistive triode-biased MOS transistor as shown in Figure 15a [75]. This type of resistors is highly susceptible to process, voltage and temperature (PVT) variations. In addition, pseudo-resistors are highly non-linear resistors and placing such a resistor between the input and output of an operational transconductance amplifier (OTA) may yield a voltage-dependent resistor. If the voltage swing across this resistor is large, then its value may change significantly with respect to the voltage across it, and thus create a voltage-dependent high-pass pole for the neural amplifier. In addition, the structure shown in Figure 15a is not tunable and only creates one value of resistance. In order to design a neural amplifier with an adjustable high-pass pole, a tunable pseudo-resistor is required as shown in Figure 15b. The voltages across the Gate-Source of the PMOS transistors are set using an NMOS and a current source, such that the equivalent resistance changes [76].

For achieving a high-gain amplification in the structure shown in Figure 14a, *C*2 is typically selected very small. Lowering the value of *C*2 affects the common-mode rejection ratio (CMRR) of the amplifier as well as the gain precision. Figure 14b shows an architecture that is similar to Figure 14a, ye<sup>t</sup> with a minor topological difference. In Figure 14b the capacitor -feedback network is implemented using a capacitive-T topology. This topology allows the implementation of a low-value of the feedback capacitor using higher values of capacitors [77]. This technique improves the matching between feedback capacitors, thus improves the CMRR of the amplifier. The equivalent feedback capacitor in this architecture is calculated as:

$$\mathcal{C}\_{\varepsilon fb} = \frac{\mathcal{C}\_2 \mathcal{C}\_3}{2\mathcal{C}\_4 + \mathcal{C}\_2 + \mathcal{C}\_3}. \tag{1}$$

**Figure 15.** Pseudo-resistor architectures. (**a**) Fixed-value and (**b**) tunable pseudo-resistor.

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**Figure 16.** The ac-coupled chopper amplifier architectures. (**a**) Classical topology with servo loop and (**b**) alternated topology without servo loop.

Amplifying LFP signals using a neural amplifier creates significant issues related to Flicker noise, also named 1/ *f* noise that lies in the same frequency range. In order to deal with this issue, chopper amplifiers are widely used for sensing LFP signals. However, ac-coupled chopper amplifiers carry over new issues which require new circuit and systems solving techniques. The classical architecture of a chopper amplifier is shown in Figure 16a. Chopper switches are placed before the ac-coupling capacitors. Hence, the dc value of the signal is modulated to a higher frequency and the ac-coupling capacitors can not filter it out. In order to filter the dc component of the input signal, a dc servo-loop is used in this circuit. Furthermore, chopper switches used in conjunction with ac-coupling capacitors reduce the input impedance of the amplifier. An impedance-boosting circuit must be used in the architecture of the chopper amplifier. Another issue of this circuit relates to the ripples introduced into the signal path by the chopper switches. This issue is addressed using a ripple-reduction circuit in the architecture of chopper amplifiers.

An alternate architecture employing a chopper amplifier is shown in Figure 16b. The chopper switches are placed after the ac-coupling capacitors in the signal path. Hence, this architecture does not require a dc-servo loop to block the dc component of the input signal. However, placing the chopper switches after the ac-coupling capacitors results into shaping the OTA thermal noise with 1/ *f* characteristic when referred to the input of the neural amplifier [78]. Hence, this architecture requires a very high value of *C*1 (in the order of 300–500 pF) to degrade this effect. In [79], ac-coupling capacitors are implemented using off-chip capacitors.

**Figure 17.** General architecture of dc-coupled amplifiers.

In contrast to ac-coupled amplifiers, dc-coupled amplifiers use a low-pass filter to block the dc component of the input signal, as shown in Figure 17. Several methods are introduced in the literature to implement a dc-coupled amplifier. The low-pass filter used in the structure of a dc-coupled amplifier can be implemented in analog [80], digital [81] or a combination of the domains [82].

#### Amplifier Sharing Methods

A technology trend is currently observed towards increasing the number of recording sites, which in turn creates severe constraints to the amplifier-related microelectronics. Hence, alternate solutions must be explored to satisfy the constraints in dense multichannel designs in terms of silicon area and power consumption. Techniques supporting sharing one amplifier among multiple channels become attractive as the number of recording channels increases. The sharing technique can be either applied at system-level or circuit-level. In circuit-level techniques, the amplifier is not totally shared and the current that is provided to an input differential pair circuit is reused by the other channels' input pairs. This method, which is called orthogonal current reuse technique, is introduced in [83]. System-level techniques are widely presented in the literature. Two different methods aiming at sharing a single amplifier are introduced in literature, namely the time-division multiplexing (TDM) [84] and frequency-division multiplexing (FDM) [85] techniques which are shown in Figure 18a,b, respectively. Several critical design challenges yield from these sharing techniques, such as crosstalk, settling,

accuracy, and filtering. If the amplifier used in TDM is not fast enough, it may introduce large crosstalk between channels. the timing of all signals is very critical in TDM. As discussed in [86], in addition to the crosstalk, timing issues may cause settling errors during the analog-to-digital conversion, in turn causing noise aliasing degrading the noise performance of the circuit.

**Figure 18.** Amplifier sharing techniques: (**a**) time-division multiplexing (TDM) technique proposed in [84] and (**b**) frequency-division multiplexing (FDM) technique proposed in [85].

The first chopper amplifier based on FDM was proposed in [85]. As shown in Figure 18b, inputs are modulated using different chopping frequencies that are orthogonal. In order to guarantee the orthogonality between chopping frequencies, 2*n* × *FM* is proposed, in which *n* = 0, ... , *N* − 1 and *N* is the number of channels. Rademacher functions are actually applied, which are sequences of orthogonal functions that have two values of ±1 and are defined by the conditions expressed in Equation (2).

$$\begin{array}{ll}\phi\_{0}\left(\frac{t}{T}\right) = 1 & \left(0 \le \frac{t}{T} < \frac{1}{2}\right) \\ \phi\_{0}\left(\frac{t}{T}\right) = -1 & \left(\frac{1}{2} \le \frac{t}{T} < 1\right) \\ \phi\_{0}\left(\frac{t}{T} + 1\right) = \phi\_{0}\left(\frac{t}{T}\right) \\ \phi\_{n}\left(\frac{t}{T}\right) = \phi\_{0}\left(\frac{2\pi t}{T}\right) & n = 1, 2, \dots \end{array} \tag{2}$$

in which *φn* is called the *n*th Rademacher's function and *T* is the period of the functions. The waveform of the first four Rademacher's functions are shown in Figure 19. Except *φ*0, Rademacher's functions can be used as the modulating signal in a chopper amplifier based on FDM. Nevertheless, the technique proposed in [85] presents some major drawbacks which are discussed in the following.

A significant issue regarding the usage of different chopping frequency for different channels relates to the mismatch between the input impedance of the channels. An additional issue of the technique relates to the need for a low-pass filter after the demodulation of each channel. Since the chopper is located after the opamp, high-frequency signals that remain in the demodulated signal (Flicker noise and offset) are not filtered out. Therefore, an additional low-pass filter is required to clean the output signal from high-frequency contents. A third issue of the technique relates to the gain mismatch between channels which in turn relates to the bandwidth of the opamp used in the chopper amplifier.

**Figure 19.** First four Rademacher functions.

**Figure 20.** Effect of the dc servo loop on the overall frequency response of the chopper amplifier. (**a**) Topology including a dc-servo loop. (**b**) Block-level frequency responses of the topology including a servo loop. (**c**) Overall frequency response.

The usage of a two-channel chopper amplifier proposed in [85] as a neural amplifier presents a significant drawback. The lack of a dc servo-loop indeed represents a severe issue of two-channel chopper neural amplifiers. A large electrode dc offset can easily saturate the amplifier if it is not filtered. In chopper amplifiers, the dc servos loop (DSL) is employed to implement a high-pass corner in the frequency response of the chopper amplifier, as shown in Figure 20a. Figure 20b,c illustrate the effect of the DSL on the overall frequency response of the amplifier, using control theory. The DSL introduces a high-pass corner at a frequency of (1 + *AB*)*fDSL*, in which *fDSL* is the bandwidth of the integrator used in the DSL. At the circuit level, (Figure 20a), the high-pass corner is calculated using Equation (3).

$$f\_{hp} = \frac{C\_{hp}}{C\_{fb}} f\_{0DSL\prime} \tag{3}$$

in which *f*0*DSL* is the unity-gain frequency of the integrator in the DSL.

The noise performance of a two-channel orthogonal chopper amplifier is also degraded with respect to the single-channel amplifier. In a single-channel amplifier as shown in Figure 21a, the signal gain from input to the output is equal to − *Cin*/*Cf b* and the noise gain from the amplifier input to the output ( *Vout*/*Vn*) is equal to 1 + *Cin*/*Cf b*. In a two-channel chopper amplifier as shown in Figure 21b, the signal gain from the input to the output is equal to − *Cin*/*Cf b*; however, the noise gain from the amplifier input to the output ( *Vout*/*Vn*) is equal to 1 + 2 *Cin*/*Cf b*. Therefore, the input-referred amplifier noise of a two-channel chopper amplifier is approximately two times higher than single-channel chopper amplifier.

**Figure 21.** Noise analysis model of (**a**) a single-channel chopper amplifier and (**b**) a two-channel chopper amplifier.

#### *4.2. Data Compression*

Data compression is a well-known method to reduce the power consumption of wireless transmitters in implantable electronic medical devices. Using data compression also reduces the power consumption of feature extractors as shown in [87]. Compressive sensing (CS) is a compression scheme presenting relevant characteristics for multi-channel neural recording. This emerging compression method has lower complexity in comparison to established compressing methods. Compressive

sensing reduces the number of measurements for a high-dimensional signal with respect to the number of measurements dictated by the Nyquist sampling theorem. Compressive sensing can be applied in three different domains, including analog, digital and multichannel. Analog compressive sensing (ACS) is a method applied to reduce the data rate and digitization power. However, due to the multi-path nature of this technique, a large on-chip silicon area is required. Digital compressive sensing (DCS) is shown to be a superior method over ACS in terms of power consumption [88]. However, this technique requires several accumulation blocks for each channel, which is not tractable in a multi-channel system with a limited silicon area.

**Figure 22.** Multichannel compressive sensing (MCS). (**a**) Overview of the MCS concept. (**b**) Structure of the conventional multi-input single-output compressive sensing (MISOCS) block with 16 inputs.

The multi-channel compressive sensing (MCS) technique has been developed as a hardware-suitable compressive sensing that allows a straightforward circuit design as well as an efficient power × area performance [87]. Figure 22a depicts the simplified concept of the MCS operating over *N* channels. Φ is a measurement matrix that consists of a random sequence of ones and zeros, striclty. Φ is used to project a matrix that stores data from *N* channel into the compressed domain. The result of the operation is a vector comprising data that is the compressed image of the data recorded from *N* channels.

Circuit area and power dissipation can be optimized by applying the MCS at the sensing node. The complexity is deferred to the receiver that applies the data reconstruction algorithm from compressed data. The complex data reconstruction operation is performed in the digital domain and involves a significant latency which would slow down any seizure pattern detection or further feature extraction processes. Feature extraction from spatially filtered data based on the MCS is presented in [87] to the aim of detecting seizures. A multi-input single-output compressive sensing (MISOCS) block carries out the projection of data originating from *N* channels into the compressed domain. The MISOCS block processes the input channels in parallel owing to its implementation as a summing amplifier, which is detailed in the following.

Figure 22b presents the system architecture of a 16-channel (*N* = 16) conventional MISOCS block and the signals that control the corresponding circuit. A compression ratio of 16 (*CR* = 16) is achieved by the system [87]. The 16 inputs to the MISOCS block originate from the front-end neural amplifiers differential outputs. The control signals of the MISOCS block consist of a sampling signal *φs* as well as a measurement matrix Φ ∈ R1×16. Sixteen random sampling signals *φR*1, ... , *φR*16 form the measurement matrix. The conventional MISOCS block operates in two phases. Signal *φs* controls the sampling phase during which the output of the individual channels are sampled. *φs* at the LOW level marks the summation phase. The value presented on the channels that correspond to a random sampling value equal to one in the measurement matrix are accumulated at the output node of the summing amplifier. This conventional architecture of the MISOCS block is straightforward but suffers from circuit-level intricacies.

First, the random nature of the measurement matrix yields a random number of ones in the random sampling signals [87]. The offset of the summing amplifier depends on the number of ones, thus causing an error. In practical terms, a random signal which has a value between zero and *Vos*(1 + *KCin Cf* ) is summed up with the compressed signal, at the output of the summing amplifier. The error is random in nature and derives from the implementation of the method at the circuit level. The random error causes a degradation of the seizure detection efficiency which is due to a degradation of the quality of the signal reconstruction.

In addition, careful consideration must be devoted to controlling the dynamic range of the compressed signal, as it is generated at the output node of the summing amplifier. The dynamic range of the compressed signal at the output of the MISOCS block is calculated in the following, considering the two extreme cases. The first extreme case consists of a full correlation of input signals (C = 1) while the random sampling signals are all at one. This situation yields an output corresponding to a linear sum of all inputs and thus the highest level of the compressed signal. In the highest level worst case, all the *N* random sampling signals are at one; thus, the output consists of a linear sum of the input resulting in a highest value of the compressed signal that is *N* times larger than a single channel. The second extreme case consists of a single random sampling signal at one, while all others are at zero. This situation yields the lowest level of the compressed signal which is meaningful, and corresponds to the RMS noise of a single channel analog front-end (AFE).

The dynamic range of the compressed signal can be expressed from the highest and the lowest meaningful levels that are acceptable at the output node of the amplifier. Consequently, the dynamic range of the compressed signal in an N-channel conventional MCS system is *N* times larger than a single AFE channel. The dynamic range of the compressed signal is thus used in the calculation of the resolution of the ADC that follows the MISOCS block, as expressed in Equation (4).

$$B\_{ADC} \approx B\_{\text{Channel}} + \log\_2 N,\tag{4}$$

where *BChannel* is the required equivalent resolution of the AFEs.

For example, a 16-channel acquisition system with an equivalent bit-resolution of each channel assumed to be equal to 8-bit yields the necessity of a 12-bit ADC to accurately reconstruct the compressed signal.

The mMISOCS block is presented in the following [89] as a modified MISOCS block aiming at overcoming the issues of the conventional architecture that were described above. The mMISOCS architecutre is shown in Figure 23. The circuit topology includes a butterfly switch which is used to invert the output of a channel *Vout*,*<sup>i</sup>* when the corresponding random sampling value is at zero; the result is then summed up with other channels output during the summing phase. Hence, in contrast to the conventional MISOCS block, the mMISOCS architecutre generates compressed data that is composed of data originating from all channels, i.e., not a random number of channels with coefficient at one. As a result, the noise level of the compressed data is fixed at √*N* times the RMS noise of a single AFE. Consequently, the dynamic range of the compressed signal is also fixed at √*N* times larger than the dynamic range of a single AFE. The ADC resolution is thus expressed in Equation (5).

$$B\_{ADC} \approx B\_{\text{Channel}} + \log\_2 \sqrt{N}.\tag{5}$$

As an additional benefit of the mMISOCS topology, the offset signal that appears in the compressed signal for any combination of the values of the sampling signals is fixed because all input signals participate in the output node summation in a positive or negative value. The offset that appears at the output of the summing stage is expressed in Equation (6)

$$V\_{os,err} = V\_{os}(1 + 16\frac{\mathcal{C}\_{in}}{\mathcal{C}\_f}).\tag{6}$$

Consequently, the error is constant and can thus be canceled by processing in the digital domain.

**Figure 23.** Schematic of the proposed multiple-input single-output compressive sensing block, mMISOCS.

#### *4.3. Feature Extraction*

Feature extraction has an important role in the quality of the seizure detection [90]. Several classical features are introduced, which must be implemented in the digital domain, in an implantable epilepsy control device.

Considering a one-dimensional signal representing the electrical activity recorded from the brain, features can be extracted in the time and spectral domains.


Features are typically patient-specific, and thus parameters must be tuned such as to improve the accuracy of the decision. Recently, artificial intelligence and machine learning techniques also including deep-learning methods have been applied to support the feature extraction and classification, Refs. [92–94]. Moreover, the success of advanced AI and deep-learning algorithms in epilepsy detection has opened the way to epilepsy prediction, where interictal signals that are observed between seizures are studied with the aim of extracting reliable markers of a future seizure [95].

The hardware resources that are involved in frequency-domain feature extractors as well as deep-learning and machine-learning methods are important. The nature of the algorithms dictates a large number of memory accesses, multiplications, as well as non-linear operations processed using lookup tables. All of the aforementioned operations are time- and energy-consuming. In addition, the algorithms are developed such as to accurately operate over 32-bit number formats, while reducing the bit representation decreases the reliability. Hence, these techniques are considered not suitable for implantable devices, as excessive consumers of hardware resources and power. Recently, complex deep-learning and machine learning algorithms find adaptations to portable hardware that are dictated by new requirements of internet-of-things. Nevertheless, implantable devices require low-power blocks and feature extraction methods which are best found as the time-domain features presented in the following [96].

• Energy: the energy feature is a popular feature. The average energy of *d* samples is calculated as expressed in Equation (7).

$$Average\ Energy = \frac{1}{d} \sum\_{d} x^{2} [n]. \tag{7}$$

A multiple and accumulate block is used to process the data that streams-into. The inputs of the multiplier are identical, yielding the *x*2 operation.


$$Variance = \frac{1}{d} \sum\_{d} \mathbf{x}^2[n] - \mu^2. \tag{8}$$

The hardware is more complex than the hardware required in the energy extractor, and consists of multipliers and accumulators, subtractors and temporary storage registers.

• Line-length or Coastline: the line-length is a measure of the absolute value of the length between two consecutive data points. Line-length is a feature that increases with low-amplitude while high-frequency signals are presented, as well high-amplitude while low-frequency signals are presented. The line-length feature for *d* samples is calculated as expressed in Equation (9).

$$\text{Line} - \text{length} = \frac{1}{d} \sum\_{d} |\mathbf{x}[n] - \mathbf{x}[n-1]| \tag{9}$$

The hardware is relatively straightforward and consists of multipliers and accumulators, temporary storage registers as well as multiplexers.

• Area: area is a popular feature for seizure detection. The simplicity of the algorithm enables a low-cost and accurate seizure detection. Area is one of the features used in RNS (Section 3.1.2. The area feature for *d* samples of the signal is calculated as expressed in Equation (10).

$$Area = \frac{1}{d} \sum\_{d} |\mathbf{x}[n]| \tag{10}$$

• Non-linear autocorrelation: non-linear autocorrelation feature extraction is based on detecting and accumulating the minimum of the maximum of the samples in three consecutive windows, also detecting and accumulating the maximum of the minima of the samples in three consecutive windows, and finally subtracting the latter from the former result, as expressed in Equation (11).

$$HV = \min(\max(X\_{\text{win}\_i}), \max(X\_{\text{win}\_{i+1}}), \max(X\_{\text{win}\_{i+2}}))$$

$$LV = \max(\min(X\_{\text{win}\_i}), \max(X\_{\text{win}\_{i+1}}), \max(X\_{\text{win}\_{i+2}})) \tag{11}$$

$$Auto = \sum\_{\mathcal{B}} HV - LV.$$

The hardware requires many resources including a multiplier-accumulators, subtractors, storage resisters as well as several comparators.
