**1. Introduction**

Modern sensor nodes perform a set of tasks repeatedly, and thus often exhibit periodic transition between different load states based on a schedule [1–3], as shown in Figure 1. The predictable transition schedule allows the software to proactively reconfigure the voltage converter to supply required amount of current for various load conditions. Under varying load conditions, however, a large Switched Capacitor (SC) converter often provides poor efficiency at smaller loads. It is known that, in recent mobile platforms, around 32% of the overall power is wasted, in step-down conversions [4]. This is because most voltage converters are optimized targeting the average load condition, and thus perform poorly under peak and minimum load conditions.

**Figure 1.** Load behavior with multiple operating states, repeated with a schedule/interval.

Another challenge faced by modern SC converters is the large output ripple voltage, which is often alleviated by having a large output capacitor and/or high switching frequency. These approaches to reducing ripple result in large area overhead and high switching losses, respectively. In [5], a dithered capacitance modulation scheme is presented to reduce ripple at the expense of much higher oscillator frequency than the converters' switching frequency and circuit complexity. A simpler and effective approach to reduce ripple is splitting a converter into smaller units and operating the units at a fixed phase difference [5–7]. A multi-phase converter, due to its low ripple, can offer high conversion efficiency as well. For example, a multiphase operation equally distributes the current surges from the input capacitor, over time. This reduces the ripple voltage ΔV = VMax − VMin on the input capacitor. It is known that charging a capacitor with small voltage difference results in high energy efficiency in charge transfer process between the supply and capacitor voltage [8].

Under light load conditions, the smaller units can be individually turned-off to reduce losses [9]. However, turning off some of the capacitor banks operating at multiphases causes the output ripple voltage to increase unevenly. Therefore, to fully benefit from a converter using multiphase, all capacitor banks must be operational at all times. A popular technique to reduce switching losses is utilizing Pulse Frequency Modulation (PFM), which reduces the switching of the converter depending on the load [6,10,11]. Most of existing PFM methods are reactive (act in response to an event), which change the switching frequency based on the output voltage feedback. This results in a slower response and failure to utilize a wide frequency range, which degrades conversion efficiency at light loads. Furthermore, PFM methods (especially when combined with multi-phase) generate low frequencies from a high-speed oscillator with a fixed phase difference. Therefore, in PFM methods, the control circuit's power consumption dominates for small load current leading to poor conversion efficiency [10].

Multi-phase voltage converters (comprising of multiple units) need a large number of switches and associated control signals. Therefore, it is infeasible to apply the conventional techniques for non-overlapping signal generation, since they adopt a centralized approach [9,11] and need a large number of wires. Due to the large number of wires, the conventional techniques incur disadvantages such as large area, high power consumption, switching uncertainty and susceptibility to noise. The researchers of [5] sugges<sup>t</sup> reducing the number of phases to reduce the power consumption induced by non-overlapping signals and other switching circuits. A distributed non-overlapping scheme is presented in [6], where an additional NMOS or PMOS is added in the MOSFET driver circuit to delay the turning-on. However, adding an additional NMOS or PMOS in the last stage of the driver would add significant area overhead and slowly turn on the MOSFET (in additional to the delay).

This paper proposes a multi-phase SC converter targeting sensor nodes that operate in predictable schedules of alternating active and sleep periods exhibiting a wide range of load as shown in Figure 1. The converter maintains high conversion efficiency by proactively adjusting its switching frequency, using an integrated oscillator, based on the schedules of load current demanded by the target load. This approach allows the converter to operate with a wider frequency range than existing PFM designs. The proposed distributed non-overlapping signal generation is realized in the MOSFET drivers by delaying the turn-on transition with minimal area overhead and reduced power consumption.

Section 2 presents the proposed converter in more detail. Section 3 discusses the implementation of a test chip to evaluate the proposed converter. Section 4 describes the test setup and demonstrates the converter's performance measurements. Section 5 discuss the measurement results and compares with other works. Finally, concluding remarks are presented in Section 6.

#### **2. Proposed SC Voltage Converter**
