*3.3. Boolean Sensitivity Caused by Asymmetric Logic Functions*

As demonstrated in the previous subsection, the presented BCOs do not have fixed points. In this manner, when an autonomous Boolean network is realized experimentally it should include asymmetric Boolean functions to achieve chaotic dynamics [31,35]. As a result, the preference for using logic XOR and XNOR functions in the proposed BCOs lies on the look-up table for these logic operations. Firstly, the idea is considering an equal number of "1"s and "0"s as the output of the XNOR operation to avoid converging into a physical Boolean fixed-point, i.e., where all entries of the

look-up table have the same value, and hence inputs and outputs can be the same. From the look-up tables in Figures 1b and 2b, the outputs are different for all inputs, including the cases "000" and "111". On the other hand, since the number of "0"s and "1"s in the look-up tables is equal, the proposed BCOs can have a higher Boolean sensitivity *E* = 2*Kρ*(1 − *ρ*) [30,35]. This is possible with randomly chosen Boolean functions of bias *ρ* = 0.5 (equal number of zeros and ones) and high in-degree *K* (the number of input connections to a node) or most effectively by using XOR and XNOR Boolean functions as herein.

#### **4. Boolean Chaos Robust to Different Incommensurate Time-Delays**

The chaos-based applications demand the exploration of different typologies and implementations to find those that are the most suitable. In addition, the chaotic behavior must be robust. It means that the chaos should be generated consistently for a wide range of parameter values. In the ongoing literature, the reported autonomous Boolean networks only show chaos in certain ranges of the feedback delays [10,30,31,35–39], as was discussed in the Introduction section. At the experimental level, those approaches incorporate an even number of logic NOT gates in the link to act as a time-delay buffer to add extra signal propagation times. Then, the published works need several pairs of NOT gates to satisfy the specific incommensurate time-delays for each one of their links connecting nodes. Otherwise, the chaotic behavior converges to either periodic oscillations or stable dynamics in the Boolean levels high or low.

Conversely, the proposed BCOs in Figures 1 and 2 do not require additional logic NOT gates to generate chaotic oscillations. This means that the chaos behavior depends solely on the incommensurate time-delays, arising only from the intrinsic delay associated with each XOR and XNOR gate. In this manner, we state the following Lemma and Corollary.

**Lemma 3.** *The Boolean chaotic oscillators of Figures 1 and 2 composed only by logic XOR-XNOR functions evolve to sustained chaotic oscillations not only for different time-delays of the feedback path (additional pairs of logic NOT gates) but also when the time-delays in their links are a function just of the intrinsic delay of each XOR-XNOR gates (no extra logic NOT gates).*

**Corollary 1.** *As a consequence of Theorems 3 and 4, an autonomous Boolean network without fixed points always presents periodic behavior if its delays are commensurate.*

**Proof.** To demonstrate Lemma 3 and Corollary 1, we show the physical implementation of the BCOs in Figures 1 and 2 using commercial off-the-shelf logic gates (74HCXXX family), as shown in Figure 3a. The discrete implementation makes it possible to change the time-delay between feedback nodes easily. Then, we study the dynamics of the proposed BCOs using the Lyapunov exponent method.

The scenario is as follows. First, we consider different cases for the incommensurate time-delays of the links. Those time-delays were realized using a pair of two NOT gates wired in series. Thus, from the experimental output signal of nodes *C* (BCO-1) and *B* (BCO-2) for each case in Tables 1 and 2, respectively, we collect a long enough time series. For instance, the BCO-1 output signal of node *C* for cases 1, 3, and 7 is given in Figure 4a,d,g, respectively. On the other hand, Figure 5a,d present the results for the output signal of node *B* of BCO-2 for cases 1 and 5, respectively.

Next, we compute the largest Lyapunov exponent, *λmax*, applying the Boolean distance algorithm introduced in Section 2.3. The results in Tables 1 and 2 shows the largest Lyapunov exponent, *λmax*, is positive for all cases indicating the proposed BCOs generate robust Boolean chaos. Besides, the chaotic behavior was also verified in the BCOs (both cases 1 in Tables 1 and 2, respectively), without extra time-delays with exception from those incommensurate intrinsic delays of the logic XOR and XNOR gates, i.e., the BCO-1 and BCO-2 do not include any logic NOT gates in the feedback paths.

**Figure 3.** Experimental setup for BCOs in Figures 1 and 2 using (**a**) logic gates 74HCXXX, (**b**) GAL 22V10, and (**c**) FPGA Spartan6.

**Figure 4.** Chaotic oscillations from the output voltage in the node C for BCO-1. The measurements exhibit a 100 ns of time and a 2 V of voltage grid per square. Case 1 in Table 1 with (**a**) logic gates 74HCXXX, (**b**) GAL22V10, and (**c**) FPGA Spartan6. Case 3 in Table 1 with (**d**) logic gates 74HCXXX, (**e**) GAL22V10, and (**f**) FPGA Spartan6. Case 7 in Table 1 with (**g**) logic gates 74HCXXX, (**h**) GAL22V10, and (**i**) FPGA Spartan6.

**Figure 5.** Chaotic oscillations from the output voltage in the node B for BCO-2. The measurements exhibit a 100 ns of time and a 2 V of voltage grid per square. Case 1 in Table 2 with (**a**) logic gates 74HCXXX, (**b**) GAL22V10, and (**c**) FPGA Spartan6. Case 5 in Table 2 with (**d**) logic gates 74HCXXX, (**e**) GAL22V10, and (**f**) FPGA Spartan6.

Tables 1 and 2 suggest the most suitable case for obtaining Boolean chaos is when no other delay paths are incorporated in the links because the higher the time-delays, the lower the magnitude of the largest Lyapunov exponent. From the physical implementation point of view, that is a remarkable feature because we can get a small form factor with the proposed Boolean chaos oscillators. Moreover, since the chaos generation does not depend on determined time-delays, the proposed BCOs can be implemented with several hardware technologies, as demonstrated in the next subsection.

**Table 1.** Largest Lyapunov exponent (*λmax*) of the BCO in Figure 1 for different time-delays in the feedback paths. The symbol "-" means no extra time-delay, while "√" refers to a time-delay composed of two logic NOT gates.


**Table 2.** Lyapunov exponent of BCO in Figure 2 for different time-delays in the feedback paths.

