*3.3. Electrical Properties of InP-MOS Capacitors*

### 3.3.1. Capacitance-Voltage Measurements

The frequency dependent capacitance-voltage curves of sample S1, S2, and S3 with double sweep mode are shown in Figure 6a–c. When the frequency increases, all samples show a decreased accumulation capacitance.

**Figure 5.** (**a**) Valence band spectra; (**b**) Schematic band diagram of S1, S2, and S3 sample.

**Figure 6.** (**a**–**c**) Capacitance–voltage (C–V) curves for S1–S3 measured at different frequency (0.6–1 MHz). (**d**) Capacitance–voltage (C–V) curves for all samples measured at 1 MHz.

ᶭ Meantime, at high frequency conditions, the series resistance will deviate from the predetermined theoretical value due to the disappearance of the interface trap charge. On the contrary, at low frequencies, when the oxide capacitance (Cox) connects with the space charge capacitance (Csc), the value of the accumulation region increases with the series resistance due to the interface state showing frequency-dependent properties [28–30].

The decrease in the accumulation capacitance can be attributed to the fact that the interfacial traps do not have enough time to respond to the voltage frequency [30]. The maximum accumulation capacitance and minimum hysteresis voltage were observed in the S3 sample, indicating that the Al2O3 passivation layer suppressed the appearance of In and P oxides and the formation of low-K interfacial layers. To evaluate the interface quality, important electrical parameters such as equivalent oxide thickness (EOT), dielectric constant (k), flat band voltage (V*fb*), hysteresis voltage (ΔV*fb*), oxidation charge density (*Qox*), and boundary trapped oxide charge density (*Nbt*) were extracted from the test curves, and these data are presented in Table 1. The variation of V*fb* depends on the values of oxide capacitance and bulk oxide charge [31]. The k values corresponding to samples S1, S2, and S3 are calculated to be 12.96, 14.39, and 14.75, which are consistent with the previous investigation [4].



A small V*fb* of 0.19 V was observed for sample S3. This phenomenon can be explained by the following statement: electrons are easily captured by oxygen vacancies to form negatively charged interstitial oxygen atoms [32] and as fewer oxygen vacancies exist at the interface, the smaller the positive flat voltage required to maintain the band unbent [33]. Also, the hysteresis voltage depends on the boundary trap caused by the intermixing of the high K layer and the interfacial layer [34]. The value of the hysteresis voltage reaches a minimum (1.55 mV) for S3, indicating that the boundary trapping charge becomes weaker after the insertion of Al2O3 between the gate dielectric and the substrate. The *Qox* and *Nbt* values were calculated from the obtained V*fb* and ΔV*fb* values by the following equations [35].

$$Q\_{ox} = -\frac{\mathcal{C}\_{\text{max}} \left( v\_{fb} - \varphi\_{ms} \right)}{qA} \tag{5}$$

$$N\_{bt} = -\frac{\mathcal{C}\_{\text{max}} \triangle \mathcal{V}\_{fb}}{qA} \tag{6}$$

where *ϕms* is the contact potential difference between Al electrode and InP substrate, *q* is the electronic charge, and *A* is the Al electrode areas. According to Table 1, it can be noticed that S3 has the lowest *Qox* and *Nbt*, which implies the reduction of interfacial trap defects and the optimization of interfacial properties.
