**1. Introduction**

Transformerless photovoltaic (PV) systems have increased their popularity due to their high performance in terms of efficiency, size, and price. Nevertheless, the loss of galvanic isolation involves other challenges, for instance, reducing or eliminating leakage currents (LKC) that appear in the ground path.

In three-phase transformerless PV systems, conventional topologies such as the sixswitch three-phase inverter or the three-phase cascade multilevel inverter (3P-CMI) generate high-frequency common-mode voltage (CMV) components, which due to the structure of the system, cause the common-mode current (CMC), also known as LKC. The CMC is the major issue in transformerless grid connected PV systems, as it can lead to additional power losses, protection tripping, important safety problems, and high total harmonic distortion (THD) of the current injected into the grid. Due to these issues, international norms have been developed to limit the CMC circulation through the PV system to guarantee the security of the system and humans in contact with it, for instance, the international standard DIN VDE 0126-1-1 establishes the maximum limit of the *RMS* value of the CMC in 300 mA. The scientific community has reported several techniques based on different approaches to mitigate the CMC. Among these, pulse width modulation (PWM) solutions

**Citation:** Vazquez-Guzman, G.; Martinez-Rodriguez, P.R.; Sosa-Zñniga, J.M.; Aztatzi-Pluma, D.; Langarica-Cordoba, D.; Saldivar, B.; Martínez-Méndez, R. Hybrid PWM Techniques for a DCM-232 Three-Phase Transformerless Inverter with Reduced Leakage Ground Current. *Micromachines* **2022**, *13*, 36. https:// doi.org/10.3390/mi13010036

Academic Editor: Francisco J. Perez-Pinal

Received: 7 December 2021 Accepted: 23 December 2021 Published: 28 December 2021

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have been popular because it is not necessary to increase the number of semiconductors in the topology or to implement complex control systems. Furthermore, additional functions such as voltage balancing of capacitors can be performed in split DC bus topologies as in neutral point clamped (NPC) inverters, and total system efficiency can be improved through a proper modulation design.

The six-switch three-phase inverter (3P-FB) has been widely studied under space vector modulation techniques for transformerless grid connection and motor drive applications. In [1], a near-state PWM (NSPWM) method was proposed; here, a comparison with similar PWM methods is performed. The NSPWM method makes use of a set of three voltage vectors to match the output and volt-second references. The three voltage vectors are two adjacent vectors together with a near-neighbor vector; then, nonzero voltage vectors are utilized. The sectors are displaced from each other by 30◦ ; therefore, new regions are defined with respect to the conventional distribution. As no zero voltage vectors are used, the CMV does not take values produced by those vectors; therefore, CMV variations are reduced. In the case of PV systems, in [2], an evaluation of three-phase converters without galvanic isolation is reported. The analysis considers the conventional 3P-FB, the 3P-FB with split capacitor (3P-FBSC), and the three-phase NPC inverter (3P-NPC). The results demonstrate that the 3P-FBSC and 3P-NPC inverters produce low CMC, which make them two suitable solutions in three-phase transformerless inverters.

Derived from the 3P-FB inverter topology, some modified topologies have been also proposed to solve the CMC issue. For example, by adding passive components, as in the Z-source inverter topology presented in [3], it is possible to avoid the use of a boost stage at the input of the system. Additionally, the CMC magnitude can be reduced by modifying the PWM strategy as in [4], where the authors proposed a modified Z-source inverter and a space vector based modulation (SVM) technique that reduces the CMC magnitude. Moreover, in [5–7], a family of topologies called Quasi Z-source inverters is presented, the main idea is to reduce the component rating, the source stress, and component count and to make some contributions to simplify the control strategies. Another approach consists in the addition of active components in order to deal with the CMC, for instance, diodes, IGBTs, or MOSFETs as in [8], where additional diodes connected as a three-phase rectifier plus an IGBT are used to implement the null vectors in an SVM technique. The main idea is to connect the output of the inverter to *Vdc*/3 or to 2*Vdc*/3, thus avoiding some CMV transitions and reducing the magnitude of the CMC. Another alternative based on the traditional 3P-FB inverter is to use the idea of DC decoupling developed in the H5 and H6 topologies for single-phase systems [9,10]. In this case, [11,12] proposed the H7 topology and a study of several SVM techniques to reduce the CMC, and [13] proposed that the H8 topology and its SVM technique are presented. In both cases, the main idea is to disconnect the DC bus during the null vectors, which in combination with an adequate sequence of active vectors allows us to mitigate the CMC. Another topology that is a combination of a NPC topology and the 3P-FB inverters is presented in [14] where a type of NPC circuit is added at the output of the inverter following the idea of the HERIC single-phase inverter [15]. The null vectors are now implemented in a freewheeling circuit, which reduces the transitions of the CMV in the circuit, obtaining a reduction in the CMC magnitude.

The DCM-232 topology and its space vector PWM strategy have been designed to deal with the CMC issue. The main objective as in the aforementioned cases is to reduce the fast changes in the CMV by as much as possible and consequently to decrease the magnitude of the CMC. This inverter is based also on the 3P-FB topology at the AC output side, while on the DC input side, there are two DC sources that can be completely decoupled from the 3P-FB circuit by means of two semiconductors switched at the same time [16]. The PWM strategy is based on the space vector PWM technique, where the main difference is that the active vectors are implemented in the 3P-FB circuit and that the zero vectors are implemented by decoupling the DC sources using power semiconductor switches. In the literature, some PWM strategies have also been designed for the DCM-232 inverter; see for instance [17], where a carrier-based PWM is proposed to solve the CMC issue using the principle explained above.

In this paper, three PWM methods based on the Space Vector PWM (SVPWM) technique are studied to reduce the CMC components. The proposed modulation strategies are used to control the three-phase DCM-232 topology. The time intervals to control on and off conditions for each switch are defined using the waveforms obtained by means of the SVPWM concept and then a comparison with a triangular carrier signal is performed. Finally, the resulting signals are processed by a Boolean function implemented in a Complex Programable Logic Device (CPLD) to determine the final sequence for each switch. The DCM-232 topology consists in a 3P-FB inverter plus four switches that decouples the signal to generate two independent DC sources, i.e., two PV generators. The main idea is to control the decoupling switches in order to keep the CMV constant, thereby achieving a reduction in the CMC. The CMV evaluation is performed by driving the Common Mode Model (CMM) of the DCM-232 inverter. In addition, the paper considers an efficiency analysis based on numerical results obtained by means of the implementation of the real models of the semiconductors. Finally, a comparative analysis between the proposed PWM techniques and some solutions available in the literature is performed.
