**3. Numerical Results**

To validate the proposed SVM technique for the three-phase DC-232 inverter, the numerical results are reported using the parameters shown in Table 3. It is important to highlight that the numerical results are obtained in an open loop configuration, since the main objective is to validate the proposed SVM techniques operating with this topology. The general scheme implemented in the PSIM software is shown in Figure 7, where (a) the three-phase signals, (b) the Clark transformation, (c) the module and angle of the reference

vector, (d) time vector calculation, (e) the reference signals for the space vectors, and (f and g) PWM signal generation are presented. In the particular case of the block (e), the reference signals are defined in different ways for the three-proposed SVM strategies. In Figure 8, the reference signals for CSSVM, CASVM, and DSVMMAX are depicted. Note that the reference signals for CSSVM have only positive values, CASVM is centered at zero and has positive and negative values, and DSVMMAX is centered at zero but has an unsymmetrical waveform. Note that these reference signals are generated by the addition of the time intervals calculated for each vector along each sector and their magnitude is related to the switching period. Moreover, the block depicted in (f) is dedicated to generate the PWM signals, in particular, the signals for the switches on the DC side are generated using the digital circuit depicted in Figure 9 according to (22) and (23).

**Figure 7.** Block diagram of the implemented system in the PSIM software: the block (**a**) represents the three-phase signals; (**b**) is the Clarke transformation; (**c**) is the module and angle of the reference vector; (**d**) is the time vectors calculation; (**e**) reference signals for space vectors; and (**f**,**g**) represent the PWM signal generation.

**Figure 8.** Reference signals for (**a**) CSSVM, (**b**) CASVM, and (**c**) DSVMMAX.

**Figure 9.** Digital circuit to generate the PWM signals for S7 and S8 switches.


**Table 3.** Simulation and experimental parameters.

The numerical results were obtained for the three SVM techniques; however, the waveforms for the output currents and voltages are very similar in the three cases. Therefore, for brevity, only the waveforms for the CSSVM technique are included. Figure 10 shows the simulation results for the three-phase output currents, line-to-neutral voltages, and line-to-line voltages. As observed, these waveforms are similar to those typical waveforms of a three-phase conventional inverter. It can be observed also that the switching ripple appears at the sinusoidal current waveforms in which peak current is around 2.5 A. It is important to note that, under these conditions, the ripple magnitude is large and the measured THDi is around 16%, which is not allowed by the international standard, for instance, IEEE 519-2014 (considering a low grid voltage). It should be also noted that, in this case, a first-order low-pass filter is used at the output of the inverter (see Figure 11), so this can be improved by implementing a third-order filter. It is possible to increase the switching frequency or the rated power to improve the THDi as well; however, in this case, these parameters are limited by the experimental setup. On the other hand, the common mode voltage and current are also obtained by simulations; in this case, the three sets of results are presented in Figure 12. As it can be observed, the results show that these two parameters are similar for the three proposed cases. In the case of the CMV, the magnitude is predominantly constant, and in the case of the CMC, the maximum value is around 40 mA, which is well below the limits imposed by the DIN VDE 0126-1-1 international standard, which is up to 300 mA (RMS). It should be noted that the numerical simulations were performed considering a balanced DC-bus, that is *VDC*<sup>1</sup> = *VDC*<sup>2</sup> . However, in a transformerless PV application, when the irradiance changes along a day, the voltage at the maximum power point also changes. This variation, which is typically around 10% to 20%, produces a DC component at the output of the DCM-232 inverter. Under these conditions, the inverter is still capable of operating but with a DC component which is not allowed. To solve this problem, a balance technique should be implemented, and this can be solved either by implementing a balance control loop or by modifying the modulation strategy; however, this issue is out of the scope of this paper.

To better compare the three SVM strategies under study, an efficiency analysis was performed. For this purpose, the IGBT model was loaded into the Thermal Module of the PSIM software and the total losses of the DCM-232 converter were calculated. The model loaded in the software considers the parameters provided by the manufacturer; then, the behavior of the power losses is expected to be close to the real behavior. The results of the switching and conduction losses are shown in Figure 13. As can be observed, the sum of the switching and conduction power losses is greater for the DSVMMAX with respect to the other techniques, while the CASVM presents the lowest total power losses. Therefore, the CASVM should be expected to present the highest efficiency. To validate this parameter, the efficiency of the system was also measured and the results are presented in Table 4, where, as expected, the CASVM technique presents the best efficiency.

**Figure 11.** Experimental setup of the DCM-232 inverter.

**Figure 12.** Simulation results of common mode voltage (CMV) and common mode current (CMC) of the three-phase DCM-232 inverter under the (**a**) CSSVM, (**b**) CASVM, and (**c**) DSVMMAX techniques.

**Table 4.** Efficiency of the DCM-232.

