**3. Numerical Analysis and Discussion**

In this section, a numerical analysis is described to better demonstrate the performance of the proposed converter under different operating conditions, as well as to evaluate the electrical stress on the semiconductor devices. In a PV application scenario, we used a photovoltaic module LUXEN LNSA-160P (Luxen Solar Energy Co., Suzhou, China). The PV module (listed in Table 3) was characterized under the following conditions:

814 W/m<sup>2</sup> solar irradiance, ambient temperature 29.2 ◦C, and operating temperature of 63.13 ◦C.



Now, we turn our attention to the three studied cases (voltage converter application, PV application with resistive load, and PV application with clamped output voltage) under equal nominal operating conditions, but taking into account the maximum power point (MPP) of the PV module. The specifications of the proposed converter are: nominal supplied voltage *E* = 14.01 V, nominal PV current *Ipv* = 7.413 A, output port voltage of 56 V, nominal power of 103.9 W, and resistive load *R* = 30.183 Ω. Using the aforementioned specifications allowed us to determine the nominal operating point of the converter in each application, described in Table 4.

**Table 4.** Nominal operating point of the proposed converter.


From the previous analysis, we observed that the proposed converter presents a buckboost voltage conversion ratio that depends on the square of the duty ratio. Figure 8 plots the converter gain as a function of the duty ratio for the three application cases. In this plot, the voltage/PV applications with resistive load present the same voltage gain;,whereas the PV application with clamped voltage has a constant gain for *D* ≤ 0.633, and then it exhibits the same gain. This behavior is due to the operating characteristics of the PV module, where the voltage at the terminals has a limited range, given by 0 < *Vpv* < *Voc*, with *Voc* being the maximum voltage in the PV module (zero power supply). Expression (32) shows that the point of constant gain can change depending on the characteristics/technology of the PV module and the selected output voltage.

**Figure 8.** Voltage conversion gain (data 1: voltage converter appl; data 2: PV appl, resistive load; data 3: PV appl, clamped voltage).

The converter presents the same voltage gain (or partially) in different application cases; however, the voltages and currents in the converter are different due to the PV module's behavior. Figure 9 shows the voltages in the capacitors as a function of the duty ratio. In a voltage converter application (data 1, solid line), it is evident that supply voltage is constant (ideal voltage source); for this reason, when the duty cycle increases, the voltage in capacitors *C*<sup>1</sup> and *C*<sup>2</sup> (output port) increases too. A PV application with a resistive load (data 2, dashed line) behaves differently. In this scenario, for low duty ratios, the voltage at the terminals of the PV module is equal to *Voc*, and when the duty cycle increases, the voltage *Vpv* reduces. This finding implies that the voltage in the PV module can be controlled by the duty cycle signal, as well as the power delivered by the PV module. Additionally, the output voltage increases until the maximum PV power (nominal operating point) is reached; after this point, the output voltage decreases as the voltage and current in the PV module tend to zero. Finally, in the PV application with clamped output voltage (data 3, dotted line), *Vpv* is constant (equal to *Voc*) at low duty cycles since the voltage gain of the converter is lower than the relation *VC*2/*Voc*. When the duty cycle increases and reaches an appropriate voltage converter gain (*M*(*D*) = *VC*2/*Voc*), a further increase in the duty ratio implies a reduction in *Vpv*, where the voltage in the PV module can be controlled by the converter. Then, the operative region of the converter depends on the gain of the converter, clamped output voltage, and voltage range (0 < *Vpv* < *Voc*) of the PV module.

**Figure 9.** Capacitor voltages in the steady state of the proposed converter (data 1: voltage converter appl; data 2: PV appl, resistive load; data 3: PV appl, clamped voltage). (**a**) Input port. (**b**) Capacitor *C*1 . (**c**) Output port.

Figure 10 shows the inductor currents of the converter for the three cases analyzed. Here, it can be observed that the inductor currents in the voltage converter application increase with duty cycle, and these currents are higher above the nominal operating point due to the increase in the power demand. In the case of a PV with a resistive load, the inductor currents increase until the nominal operating point is reached; after, the current decreases as a function of the duty cycle and the current *Ipv*, which tends to the maximum current *Isc*. In the case where the output voltage is clamped, the inductor currents are zero until the converter reaches an appropriate voltage gain, after which the currents increase in value.

**Figure 10.** Inductor currents in the steady state of the proposed converter (data 1: voltage converter appl; data 2: PV appl, resistive load; data 3: PV appl, clamped voltage). (**a**) Inductor *L*<sup>1</sup> . (**b**) Inductor *L*2.

Now, considering the voltage and current stress on semiconductor devices, and based on the expressions in Table 1, it can be shown that the voltage and current stress on active switch *S*<sup>1</sup> and passive switch *S*<sup>2</sup> are related to voltage *VC*<sup>1</sup> and current *IL*1; the current stress on semiconductors *S*<sup>3</sup> and *S*<sup>4</sup> is related to current *IL*2. For semiconductors *S*<sup>1</sup> and *S*2, the voltage stress is equal (*VS*<sup>1</sup> = *VS*<sup>2</sup> = *VC*<sup>1</sup> ), as shown in Figure 9b. In this plot, the PV application presents a greater voltage stress than the voltage source application, which can be explained by the voltage of the PV module being near the *Voc* value. After this value, the voltage stress reduces as the voltage of the PV module tends to zero. In turn, the current stresses (*IS*<sup>1</sup> = *IS*<sup>2</sup> = *IL*<sup>1</sup> and *IS*<sup>3</sup> = *IS*<sup>4</sup> = *IL*2) for the clamped voltage application are lower than for the voltage source application, since the PV module current approaches zero when the PV module voltage is near the *Voc* value (Figure 10). After the maximum power point of the PV module, the current stress is limited since the PV module current is practically constant. Finally, the voltage stress on semiconductors *S*<sup>3</sup> and *S*<sup>4</sup> is plotted in Figure 11. Here, it can be observed that the voltage stress is greater for the output voltage clamped case than for the PV application with load resistance case.

**Figure 11.** Voltage stress on semiconductors *S*<sup>3</sup> and *S*<sup>4</sup> (data 1: voltage converter appl; data 2: PV appl-, resistive load; data 3: PV appl, clamped voltage).
