**6. Converter Design**

 

Now, the design of a 500 W power converter using the procedure shown in Section 3 is now described. The input voltage *E* is 30 V, the output voltage *V*<sup>0</sup> is set to 220 V, and the load *R* is 96.8 Ω. A switching frequency of *f<sup>s</sup>* = 100 kHz is selected with an ideal duty cycle of *D* = 0.63. The selection criterion of the switching frequency was made based on the sizing of the passive elements, which increase in value with low switching frequencies. Due to the above, the power efficiency decreases when high inductance and capacitance values are selected. On the other hand, generally the value of the switching frequency used for medium and high power DC-DC converters ranges from 25 kHz to 100 kHz. The corresponding parameters for the designed converter are shown in Table 3.

**Table 3.** Parameters of the proposed converter.


where *r<sup>I</sup>* = 100 × (∆*IL*/*IL*) and *r<sup>V</sup>* = 100 × (∆*VC*/*VC*).

The theoretical power efficiency at the nominal load of the proposed configuration is 95.4%, which was obtained using (14)–(16). The parameters of Table 2 were computed using the datasheet of the semiconductor devices used used to build the prototypes. The ESR values of the two inductors and two capacitors were measured using the meter model LCR-821 from GW Insteak. The theoretical duty cycle, including the power losses, is *Dloss* = 0.635.

Figure 11 shows a comparison between the ideal gain obtained with expression (3) and the gain given in expression (14), where all losses are included. It can be observed that both plots are similar until the duty cycle reaches 0.8; after that, the non-idealities produce a difference as shown in the plot.

**Figure 11.** Comparison between the ideal gain and the gain including the power losses.
