*2.3. Modes of Operation*

As the operation is dependent on the directions of the load current, each mode has two cases. The detailed circuit operation for mode 1 and mode 2 is shown in Figure 4.

Mode 1: In this mode, the output will be a positive voltage. A two-output load current is possible in this case, as shown in Figure 5a,b for for *i<sup>L</sup>* > 0 and *i<sup>L</sup>* < 0, respectively. During this mode, the gate pulse is received only by *S*1, *S*2, and *S*<sup>6</sup> switches while other switches remain OFF. In the case of *i<sup>L</sup>* > 0, the current will flow through the split inductor *L*<sup>1</sup> because of the ON state of the switches *S*<sup>1</sup> and *S*2. Similarly, when the load current direction is reversed, i.e., *i<sup>L</sup>* < 0, the current flows through another split portion of the inductor in *L*2. The inverter output voltage will be 0.5 *Vdc* in this mode irrespective of the load current direction, and it is depicted in Figure 4. Whether the load current is positive or negative, the current through the two split inductors, i.e., *L*<sup>1</sup> or *L*2, will always be unidirectional. Therefore, unlike the split-NPC inverter that only can work for unity power factor because of one load direction current, the proposed hybrid ANPC inverter due to its two different load current direction can work on a wide range of power factors.

**Figure 5.** Switching paths of the hybrid ANPC inverter during positive half cycle: (**a**) mode 1 with *iL* > 0, (**b**) mode 1 with *iL* < 0, (**c**) mode 2 with *iL* > 0, and (**d**) mode 2 with *iL* < 0. **Figure 5.** Switching paths of the hybrid ANPC inverter during positive half cycle: (**a**) mode 1 with *i<sup>L</sup>* > 0, (**b**) mode 1 with *i<sup>L</sup>* < 0, (**c**) mode 2 with *i<sup>L</sup>* > 0, and (**d**) mode 2 with *i<sup>L</sup>* < 0.

*2.3. Modes of Operation*  As the operation is dependent on the directions of the load current, each mode has two cases. The detailed circuit operation for mode 1 and mode 2 is shown in Figure 4. Mode 1: In this mode, the output will be a positive voltage. A two-output load current is possible in this case, as shown in Figure 5a,b for for *iL* > 0 and *iL* < 0, respectively. During this mode, the gate pulse is received only by *S*1, *S*2, and *S*<sup>6</sup> switches while other switches remain OFF. In the case of *iL* > 0, the current will flow through the split inductor *L*1 because of the ON state of the switches *S*1 and *S*2. Similarly, when the load current direction is reversed, i.e., *iL* < 0, the current flows through another split portion of the inductor in *L*2. Mode 2: The operation of this mode is different from mode 1 because, here, the application of zero state, particularly *O3*, is performed. In other words, the state of the *S*1, *S*4, *S*5, and *S*<sup>6</sup> switches will be the same as mode 1, however, the state of *S*<sup>2</sup> and *S*<sup>3</sup> will be changed so that zero output voltage can be obtained. It is evident that at the neutral point, the output voltage will be clamped. The identical current flow path can be seen in Figure 5c,d. In this case, when the load current is positive, the current will flow through switch *S*<sup>6</sup> and the split portion of the inductor *L*1. Similarly, for a negative load current, the current path will be through switch *S*<sup>3</sup> and other split portion *L*<sup>2</sup> of the inductor. The analytical study for the inverter will be presented in the next section.

### The inverter output voltage will be 0.5 *Vdc* in this mode irrespective of the load current direction, and it is depicted in Figure 4. Whether the load current is positive or negative, **3. Performance Analysis, Results, and Discussions of Hybrid ANPC Inverter**

the current through the two split inductors, i.e., *L*1 or *L*2, will always be unidirectional. Therefore, unlike the split-NPC inverter that only can work for unity power factor because of one load direction current, the proposed hybrid ANPC inverter due to its two different load current direction can work on a wide range of power factors. Mode 2: The operation of this mode is different from mode 1 because, here, the application of zero state, particularly *O3*, is performed. In other words, the state of the *S*1, *S*4, By analyzing the switching states given in Table 3, the value of the output voltage can be derived. Since the output terminal has split inductors, the voltage depends on the variation in the inductor current. This ultimately means that if the rate of current change is large, the output voltage will see a decline because of the losses associated with the inductors. Therefore, the output voltages of the proposed inverter can be derived by using (1) and (2) for the positive half cycle and negative half cycle, respectively:

$$V\_{an} = 0.5 \times S\_2 V\_{DC} - L\_1 \frac{di}{dt} \tag{1}$$

$$V\_{an} = L\_1 \frac{di}{dt} - 0.5 \times S\_3 V\_{DC} \tag{2}$$

path will be through switch *S*3 and other split portion *L*2 of the inductor. The analytical study for the inverter will be presented in the next section. It is noticeable that as the current passes through *S*<sup>2</sup> and *S*3, the current stress (*di*/*dt*) is declined considerably because of using Ga2O<sup>3</sup> based switches. If (1) is utilized, then

the rate of change of current through *S*<sup>2</sup> for state transition from *O*<sup>3</sup> state to *P* state can be calculated by:

$$di = 0.5 \times \text{S}\_2 V\_{\text{DC}} \times \frac{dt}{L\_1} \tag{3}$$

Here, *dt* is denoted for the time interval for the *S*<sup>2</sup> switch to transit from *O*<sup>3</sup> state to *P* state. Typically, the turn ON (*ton*) time for each switch, including both Si and Ga2O<sup>3</sup> switches will be comprised in this period. The nominal value of *dt* is acquired from the manufacturer's datasheets for Si-based switches, whereas for Ga2O3, the information is obtained from [30]. The summary is demonstrated in Table 4. It is clear from expression (3) that the *di*/*dt* stress is inversely proportional to the value of the first split inductor (*L1*). This also pointed out the fact that as Ga2O<sup>3</sup> switches have little *ton* time (approximately 28.6 ns), the split inductance (*L1*) value would be proportionally small to constrain the current stress of the ANPC inverter. Therefore, the voltage drop across *L<sup>1</sup>* would also be comparatively smaller than the DC-link voltage under steady-state operation. In addition to the reduced *di*/*dt* stress and voltage drop, under steady-state operating conditions, the inverter will experience reduced power loss across the inductor. Furthermore, as illustrated in Figure 1, the split inductors (*L<sup>1</sup>* and *L2*) are contributing to decoupling Ga2O<sup>3</sup> switches *S<sup>2</sup>* from *D<sup>2</sup>* as well as *S<sup>3</sup>* from *D3*. The overshoots are significantly damped out because of this decoupling.

**Table 4.** Switching parameters of Si and Ga2O<sup>3</sup> switches.


The common-mode voltage (CMV) of the hybrid ANPC inverter with 100 V DC-link can be calculated as follows:

$$V\_{an} = 0.5 \times 100 - \frac{1 \times 10^{-6} di}{28.6 \times 10^{-9}} = 50 - 34.96 di. \tag{4}$$

The CMV of the conventional ANPC inverter with 100 V DC-link can be calculated as follows:

$$V\_{an} = 100 - \frac{1 \times 10^{-6} di}{50 \times 10^{-9}} = 100 - 20 di.\tag{5}$$

It can be observed that for a certain value of *di*, the CMV of hybrid ANPC is almost 64.96% less than the CMV of conventional ANPC.
