**3. Validation of the CMI Model for the Boost Converter**

In this section, the validations for the non-CPL model developed in Equations (19) and (20) are presented (validation of the model of Equations (22) and (23) is not presented here because clearly, it provides a very smooth CCM-DCM switching in comparison with the model of Equations (19) and (20); the dynamic behavior is almost the same for other conditions except during this switching); this is done by comparing the classic CCM model in [1] (Equations (1) and (2) in this paper), and the s-domain linear DCM model presented in [14]. PSIM 2020a is used to generate the control group data.

Consider *E* = 100 V, *L* = 15 µH, *C* = 100 µF, *R* = 10 Ω, and *f* = 20 kHz; 0.0693 < *u*<sup>1</sup> < 0.7091 values allow DCM while other values allow CCM operation. Zero initial conditions and steps from *u*<sup>1</sup> = 0.10 to *u*<sup>1</sup> = 0.90 are introduced. It can be easily noted from Figure 6 that the CMI model shows minimum voltage error compared to the other models. The DCM model shows minimal error only around the linearization point (*u*<sup>1</sup> = 0.35, which is in the middle of the DCM range). The CCM classic model is inaccurate if the converter operates in DCM (shadowed area in Figure 2). To show the error quantitatively, Figure 7 shows a comparative plot of the MSE against *u*<sup>1</sup> for the three models. MSE for the inductor current, although not presented here, shows very similar results.

**Figure 6.** Comparative of the output voltage for PSIM (averaged), CCM, DCM, and CMI models, using steps from *u*<sup>1</sup> = 0.0 to *u*<sup>1</sup> = 0.90.

**Figure 7.** Voltage mean-squared error for CCM, DCM, and CMI models, in logarithmic scale. The CMI model presented in this paper provides the lowest MSE in almost all the *u*<sup>1</sup> range.

Figure 8 shows the comparatives of *v* and *i* during the switch/change between conduction modes as a function of *u*1. A slow ramp with a positive slope is introduced to force the DCM to CCM change about 0.1 s, showing no impulsive effects in both PSIM and CMI model dynamics. Note that the model presented in this paper can accurately follow the slope change during the DCM to CCM switch; this is not the case for the classic CCM model or the DCM model.

**Figure 8.** A comparison of the output voltages and inductor's currents obtained with the PSIM (averaged) and CMI models for a ramp input with unitary slope. The model presented in this paper can accurately follow the response-curves change during the DCM to CCM switch.

As an additional validation, an experimental 200-W Boost converter is built with the parameters mentioned above (see Figure 9) to validate the non-CPL CMI model. The inductor's current is measured with a current transducer from LEM USA Inc., and the load (resistive for this test) is emulated with a BK PRECISION-8510 electronic load. Figure 10 shows representative output voltages and inductor currents for several values of *u*1; from experimental and CMI model simulation data, the current error is on average 0.223 A, and the RMS voltage error is approximately 3.12 V for *u*<sup>1</sup> = 0.1 up to *u*<sup>1</sup> = 0.8.

**Figure 9.** PCB used for the experimental tests presented in this paper.

**Figure 10.** Output voltage and inductor current for the experimental validation, with (**a**) *u* = 0.1, (**b**) *u* = 0.2, (**c**) *u* = 0.3, and (**d**) *u* = 0.4. The current error is at an average of 0.223 *A*, and the RMS voltage error is approximately 3.12 *V*.

It is important to mention at this point that the CMI model with a CPL can hardly be validated experimentally in an open-loop scenario (essentially, for high power and low duty-cycle values, the converter's operating point becomes unstable, as illustrated in Figure 11). As shown below, a CPL induces instability, and it is preferable and less risky to validate a stable dynamic instead.

**Figure 11.** Illustration of open-loop, unstable behavior dependence on *u*<sup>1</sup> . For this example, the same previous parameters are used with *P* = 500 W. Average output voltage and inductor current are obtained by PSIM (averaged values) and shown in logarithmic scales. *u*<sup>1</sup> is introduced as a (slow-dynamics) triangular wave to show how values lower than approximately 72% destabilizes the converter with a CPL; even worse, even if the active cycle increases again, stability cannot be recovered. Note that for high values of *u*<sup>1</sup> , the voltage and current do not show large amplitude oscillations, but as the cycle decreases, the oscillations increase considerably.
