**7. Experimental Verification**

Experimental verification with a 500 W laboratory prototype is provided in this section. The prototype was designed according to the parameters given in Table 3, and it is shown in Figure 12. The prototype for QBC-SC and QBC-SS converter is shown in Figure 13. Both converters were built in the same prototype, only one switch was replaced by a diode and vice versa.

**Figure 12.** Laboratory prototype of the proposed converter.

The experimental set-up of the converter is described in Figure 14. The relationship of the voltage gain (*V*0/*E*) is 220 V/30 V, and the peak value of the ramp signal is 5 V. Additionally, QBC-SC (Figure 15) and QBC-SS (Figure 16) prototypes were built to compare the experimental power efficiencies of the three configurations.

For a fair comparison, all converters were built using the same components. For the QBC-SS, the active switch *S*<sup>1</sup> was replaced by the Schottky diode DSA90C200HB.

The parameters of the QBC-SC and the QBC-SS are shown in Table 4. The parameters were obtained by using the expressions developed in [26]. The theoretical and experimental plots for the comparison of efficiencies are shown in Figure 17. The teoretical plot was obtained using the Equations (14)–(16), while the experimental plots of the three converter were obtained for a voltage gain of 220 V/30 V, and varying the load from 484 Ω (100 W) to 96.8 Ω (500 W), with steps of 100 W. The voltage and current values were obtained using the osciloscopie model MDO3034 and the current probe model TCP303 from Tektronix. As can be seen, the theoretical and experimental plots for the proposed converter are similar, only with small variations. The experimental efficiency of the proposed converter ranges from 97.8% (20% of nominal load) to 95.1% (nominal load). It can be noticed that the proposed configuration offers an improvement in the power efficiency due to the non-series power transfer. One part of the energy processed by the first converter flows directly to the output through the transfer capacitor without being reprocessed by the second converter. A pie chart of breakdown losses for nominal load is shown in Figure 18. It is clear that the biggest losses are in the diodes and inductors, while the switch losses are not significant due to the low ESR value of both switches.

**Figure 13.** Laboratory prototype of the QBC-SC and QBC-SS converters.

**Figure 14.** Experimental schematic for the proposed converter.

**Figure 15.** Circuit of the QBC-SC prototype for the experimental efficiency comparison with the proposed converter.

**Figure 16.** Circuit of the QBC-SS prototype for the experimental efficiency comparison with the proposed converter.



**Figure 17.** Comparison of power efficiencies. (From top to bottom) (**a**) Proposed converter, (**b**) theoretical efficiency, (**c**) QBC-SC, and (**d**) QBC-SS.

**Figure 18.** Pie chart of loss breakdown at nominal load.

The inductor and output currents of the prototype are exhibited in Figure 19. The average value of *iL*<sup>1</sup> is 17.5 A, the average value of *iL*<sup>2</sup> is 6.3 A, and for *I*<sup>0</sup> is 2.7 A. In Figure 20, the input and capacitors voltages are exhibited The value of *E* is 30 V, the average transfer capacitor voltage *VC<sup>p</sup>* is 139 V, while the average output capacitor voltage *V*<sup>0</sup> is 220 V.

**Figure 19.** Current waveforms of the prototype. (From top to bottom) Load current *I*<sup>0</sup> (1 A/div), second inductor current *iL*<sup>2</sup> (5 A/div), and first inductor current *iL*<sup>1</sup> (10 A/div) (10 µs/div).

The voltage waveforms in the active switch *S*<sup>1</sup> and the diode *DS*<sup>1</sup> are exhibited in Figure 21. The voltage stress on *S*<sup>1</sup> and *DS*<sup>1</sup> is 98 V. The voltage waveforms in the active switch *S*<sup>2</sup> and the diode *DS*<sup>2</sup> are exhibited in Figure 22, where the voltage stress on *S*<sup>2</sup> and *DS*<sup>2</sup> is 222 V.

Voltage and current ripples of the prototype are exhibited in Figure 23. The value of ∆*v*<sup>0</sup> is 2.8 V (1.30%), the value of ∆*vC<sup>p</sup>* is 2.2 V (1.60%), the value of ∆*iL*<sup>2</sup> is 1.7 A (27%), and the value of ∆*iL*<sup>1</sup> is 3 A (17.1%).

**Figure 21.** Voltage waveforms in the input of converter. (From top to bottom) Voltage waveforms in *DS*<sup>1</sup> (50 V/div) and *S*<sup>1</sup> (50 V/div) (10 µs/div).

**Figure 23.** Voltage and current ripples of the prototype. (From top to bottom) Output capacitor ripple ∆*v*<sup>0</sup> (5 V/div), transfer capacitor ripple ∆*vC<sup>p</sup>* (5 V/div), second inductor ripple ∆*iL*<sup>2</sup> (2.5 A/div) and first inductor ripple ∆*iL*<sup>1</sup> (5 A/div) (10 µs/div).
