*Article* **A Computationally Efficient Model Predictive Current Control of Synchronous Reluctance Motors Based on Hysteresis Comparators**

**Wagner Benjamim, Imed Jlassi \* and Antonio J. Marques Cardoso**

CISE—Electromechatronic Systems Research Centre, University of Beira Interior, Calçada Fonte do Lameiro, P-6201-001 Covilhã, Portugal; wagner.benjamim@ubi.pt (W.B.); ajmcardoso@ieee.org (A.J.M.C.) **\*** Correspondence: jlassi-imed@hotmail.fr

**Abstract:** Model predictive current control (MPCC) has recently become a powerful advanced control technology in industrial drives. However, current prediction in MPCC requires a high number of voltage vectors (VVs) synthesizable by the converter, thus being computationally demanding. Accordingly, in this paper, a computationally efficient MPCC of synchronous reluctance motors (SynRMs) that reduces the number of VVs used for prediction is proposed. By making the most of the simplicity of hysteresis current control (HCC) and integrating it with the MPCC scheme, only four out of eight predictions are needed to determine the best VV, dramatically reducing algorithm computations. The experimental results show that the execution time can be shortened by 20% while maintaining the highest control efficiency.

**Keywords:** model predictive control; hysteresis current control; execution time; synchronous reluctance motors

#### **1. Introduction**

Synchronous reluctance motors (SynRMs) have, in recent years, attracted much attention due to their high-efficiency output and nature of their construction denoted by the lack of expensive magnetic materials, thus cheapening the overall cost whilst increasing in robustness. These benefits have made the SynRM a strong contender against other established electric motors in the market, namely, permanent magnet synchronous motors (PMSMs) and induction motors (IMs) [1–4].

In order to achieve high control performance and efficiency from the SynRM drive, a suitable control technique is required. The finite-control-set model predictive control (MPC) has recently gained attention and notoriety [5–18]. It has distinguished itself from conventional control techniques, such as vector and direct control strategies, due to its ability to deal straightforwardly and intuitively with multi-objective control and integrate nonlinearities and constraints into a predefined cost function while providing a fast dynamic response and superior performance.

Although advantageous, MPC demands a high computational burden due to all the voltage vectors (VVs) combinations of the power converter being used for prediction and evaluation [15]. For example, 8 VVs are used to predict and evaluate the cost function of a two-level voltage source inverter (2L-VSI). Furthermore, 16 VVs are used in a two-level back-to-back converter (2L-BTB). In addition, 32 and 64 VVs are needed for 5- and 6-leg converters, respectively. On the other hand, 27 and 125 VVs are required for MPC of 3L-VSI/matrix converter and 5L-VSI, respectively.

The sampling time for MPC algorithms has been reported in the literature to be 50 μs for the 2L-VSI and 2L-BTB [16] and 100 μs for the 5-leg converter [17]. A sampling time of 65 μs is required for matrix converters [19]. In turn, sampling times of 52 μs and 93 μs are needed for 3L-VSI and 5L-VSI, respectively [20].

**Citation:** Benjamim, W.; Jlassi, I.; Cardoso, A.J.M. A Computationally Efficient Model Predictive Current Control of Synchronous Reluctance Motors Based on Hysteresis Comparators. *Electronics* **2022**, *11*, 379. https://doi.org/10.3390/ electronics11030379

Academic Editors: Tamás Orosz, David Pánek, Anton Rassõlkin and Miklos Kuczmann

Received: 14 December 2021 Accepted: 24 January 2022 Published: 27 January 2022

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**Copyright:** © 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/).

Accordingly, with the increase in the complexity of the converter, the quantity of feasible VVs increases; therefore, the computation effort rises. Thus, high sampling times are required, producing large current ripples and reducing the overall drive efficiency. Consequently, costly digital processors are needed to keep up with the computational demand, thereby affecting the cost-effectiveness of MPC and subsequently slowing its widespread acceptance in the industry.

To deal with the issues previously mentioned, some predictive control strategies have recently been proposed. MPC is combined with a graphical approach to reduce the computation effort [21]. In [22], a control scheme based on a predefined voltage reference is implemented to predict only one VV in a 2L-VSI. In [23,24], deadbeat control is paired with MPC to select three out of the eight predictions in 2L-VSI- and 2L-BTB-fed PMSMs, respectively. Furthermore, the same approach can be seen in [25], resulting in less computational power being used. However, the graphical approach used in [21] is not intuitive and straightforward and the deadbeat control algorithms used in [23–25] are complex and highly dependent on system parameters, being sensitive to parameter uncertainty.

Alternatively to complex MPC schemes, hysteresis-based control techniques are simple in both concept and implementation. For instance, in [26], direct torque control (DTC) and direct power control (DPC) were applied to permanent magnet synchronous generator (PMSG) drives, with results showing that the execution time is considerably lower than that of direct MPC. Consequently, given its straightforwardness, fast dynamic response and low parameter dependency, direct control techniques could present themselves as a solution, conferring significant advantages when paired with MPC techniques. In [27–29], a reduction in the candidate VVs and computation was achieved by reformulating new DTC switching tables and combining them with direct MPC. In [30], new DTC and DPC switching tables were combined with direct the MPC of a 2L-BTB-fed PMSG, significantly reducing the number of candidates from 16 to 6 VVs and requiring less computation. DTC-based MPC has also been proposed in [19,31] for matrix-converter-fed PMSMs. Furthermore, regarding the multilevel converters, a decrease in execution time was obtained by minimizing the number of VVs in 3L-VSI through the estimation of the position and deviation of the stator flux relative to its reference [32], an analysis of the voltage reference vector [33] or, a branch-and-bound approach [34]. For the 3L-BTB-fed PMSG, again, the deadbeat based on system parameters is employed to reduce the candidate VVs, successfully decreasing the algorithm execution time [35].

Unfortunately, the solutions presented so far, although promising, still show some significant disadvantages, with most of the computationally efficient MPC methods being based on either a DTC switching table or deadbeat concept that, due to their need for system parameters, add further parameter dependency on the already heavily dependent predictive algorithm schemes, amplifying the adverse effects of a model-based predictive approach.

MPC solutions require sophisticated algorithms to achieve superior efficiency at the expense of computational effort. The literature survey shows a substantial shortage of research into a practical and easy MPC scheme that offers attractive characteristics such as simplicity, high control performance and low computational effort. On the other hand, hysteresis current control (HCC) bears a far more straightforward approach, both practically and conceptually, displaying a zero-parameter dependency on the system's model and less significant computational cost requirements.

However, to the authors' knowledge, a less computationally demanding MPCC based on HCC, which aims to obtain superior control performance, has not yet been reported in the literature. Accordingly, this paper intends to solve the issues mentioned earlier, thus proposing a combination of HCC–MPCC for SynRM drives with enhanced control performance and robustness in the form of less parameter dependence in the HCC while being low in both complexity and computational burden. As a result, the number of required VVs was effectively reduced from eight to four VVs; consequently, a low computational time

was achieved, requiring less sampling time and enhancing the control performance. The proposed control algorithm was tested and validated by intensive experimental results.

#### **2. Proposed HCC–MPCC of the VSI**

The proposed control scheme HCC–MPCC intends to reduce the computational burden of the classical predictive scheme whilst maintaining an excellent control performance by combining the benefits of HCC with MPCC, thus also equipping the proposed control scheme with the robustness and simplicity derived from the HCC and superior control performance derived from MPCC. Ultimately, a lower execution time was achieved using 4 VVs for prediction and evaluation instead of all 8 available VVs of the VSI whilst maintaining good control performance with minor current ripples.

#### *2.1. VV Selection from HCC*

HCCs, also known as bang–bang controllers, are among the most straightforward and intuitive control types. They work by directly controlling the motor phase currents whilst displaying their already mentioned benefits, such as robustness, simplicity, excellent dynamic response limited merely by the switching speed and the load time constant and independence of system parameters, making it attractive for this paper's intended purposes. The following expression summarizes the operation principle of an HCC:

$$S\_X = \begin{cases} \begin{array}{c} 1 \text{ if } i\_x^\* > i\_x + \frac{B\_{\text{lys}}}{2} \\ 0 \text{ if } i\_x^\* < i\_x - \frac{B\_{\text{lys}}}{2} \end{array} \ge \in \{a, b, c\} \tag{1} $$

where *Sx* denotes the switching state of the upper semiconductor in the inverter arm of each phase, while the lower semiconductor takes the state complementary to the upper semiconductor; *ix* and *i* ∗ *<sup>x</sup>* are the actual current and the reference, respectively, where the subscript "*x*" denotes the phase and *Bhys* denotes a defined hysteresis band.

The HCC control strategy is focused on the utilization of three hysteresis comparators to generate the converter gate signals, where each comparator has, as an input, the error between the measured current and its reference in the corresponding phase. The controllers then use the error in each phase to maintain their values within a defined hysteresis band *Bhys*, such that, if the error crosses the upper band limit, the upper semiconductor is turned ON and the lower semiconductor is turned OFF. Conversely, if the error crosses the lower band limit, the upper semiconductor is turned OFF and the lower one is turned ON, thus maintaining the current within the hysteresis band limits. Therefore, the hysteresis bandwidth sets the standard for the current tracking performance of the HCC.

Initially, the proportional-integral (PI) controller generates the torque-producing component (*iq*), while the *id* componentis obtained as a function of *iq* according to the maximum torque per ampere (MTPA) detailed in the following section. Furthermore, the hysteresis bandwidth value is fixed for better control performance. Then, the reference VV is calculated by using three hysteresis comparators for each phase with the operation principle summarized by (1) and further detailed above, in which each hysteresis comparator takes, as an input, the stator current and its respective reference obtained from the transformation of the reference current components in the rotor reference frame to the *abc* reference frame, thus generating the initial reference VV. Subsequently, the VVs neighbor near to the initial reference VV are selected according to Table 1. For instance, if HCC computes the vector *V*<sup>1</sup> (green) as the reference VV, then the neighbor vectors *V*0, *V*<sup>2</sup> and *V*<sup>6</sup> (red) are also selected. Figure 1 depicts the aforementioned scenario, where the reference and near neighbor VVs selection process are shown in green and red, respectively. Moreover, a diagram and a flowchart comprising the VV selection process from the HCC can be seen in Figures 2 and 3, respectively.

**Table 1.** VV selection used in HCC–MPCC.

**Figure 1.** Hexagon VVs in the *α*–*β* frame and the corresponding switching states. HCC computed reference VV (green) and selected near neighbor VVs (red).

**Figure 2.** Block diagram of the HCC–MPCC.

**Figure 3.** Flowchart of the proposed HCC–MPCC.

It is important to emphasize that the inverter allows only eight switching states to exist, resulting in six active VVs and two identical zero VVs at the origin of the coordinates, namely, *V*<sup>0</sup> or *V*7. However, given the difficulty of differentiating between the two output voltages for the zeroVVs, choosing either switching states can significantly reduce the difficulty in implementation [36]. In terms of the scope of this work, only *V*<sup>0</sup> is defined as the zero VV for the sake of simplicity and further reduction in the employed VV, to be used in conjunction with the active VVs, thus ensuring more ripple reduction [30]. Table 1 presents the relation of the near neighbor VV (*NVHCC* ) selection based on the HCC reference VV (*VHCC*) calculation, where *VHCC*|*i*(*i* = 0, . . . , 7).

The 4selected 4 VVs are then used in the proposed HCC–MPCC to predict the stator currents and determine the cost function. Subsequently, the optimal VV is chosen by minimizing the cost function presented in the next section.

#### *2.2. HCC–MPCC*

Since the main focus of this paper is to reduce the number of VVs for MPC, thereby reducing the computational burden, the saturation effect of the SynRM is neglected for the sake of simplicity. Therefore, the stator voltage and current equations of the SynRM in a synchronous rotating frame can be expressed as follows:

$$\begin{cases} \upsilon\_d = R\_s i\_d - \omega\_c L\_q i\_{qm} + L\_d \frac{di\_{dm}}{dt} \\ \upsilon\_q = R\_s i\_q + \omega\_c L\_d i\_{dm} + L\_q \frac{di\_{qm}}{dt} \\ \ i\_d = i\_{dm} - \frac{1}{R\_c} (\omega\_c L\_q i\_{qm}) \\ \ i\_q = i\_{qm} - \frac{1}{R\_c} (\omega\_c L\_d i\_{dm}) \end{cases} \tag{2}$$

where *Ld* and *Lq* are the direct and quadrature inductances, *vd* and *vq* are the direct and quadrature axis terminal voltages, *id* and *iq* are the direct and quadrature axis terminal currents, *idm* and *iqm* are the direct and quadrature axis torque-producing currents, *Rs* and *Rc* are the stator resistance and iron loss resistance per phase and *ω<sup>e</sup>* is the rotor's electrical angular speed. This is defined as a model without saturation. Since this model does not consider magnetic saturation, the inductances are assumed to be constant [37,38].

Given that the resistance *Rc* typically approaches very high values [39,40] and the motor used in this analysis is of high efficiency, the iron losses are dismissed [41]. Consequently, the torque producing currents *idm* and *iqm* are made equal to the stator currents *id* and *iq*, respectively. Therefore, given (2), the equivalent stator voltage equations can be expressed as

$$\begin{cases} \upsilon\_d = R\_s i\_d - \omega\_d L\_q i\_q + L\_d \frac{di\_d}{dt} \\ \upsilon\_q = R\_s i\_q + \omega\_d L\_d i\_d + L\_q \frac{di\_q}{dt} \end{cases} \tag{3}$$

Considering the discrete-time version equations corresponding to (3), the predicted stator currents in the (*k* + 1)*th* sampling period can be stated as

$$\begin{cases} \begin{array}{c} i\_d^{\;k+1} = \left(1 - \frac{R\_s T\_s}{L\_d}\right) i\_d^{\;k} + \omega\_c T\_s \frac{L\_q}{L\_d} i\_q^{\;k} + \frac{T\_s}{L\_d} \upsilon\_d^k\\\ i\_q^{\;k+1} = \left(1 - \frac{R\_s T\_s}{L\_q}\right) i\_q^{\;k} - \omega\_c T\_s \frac{L\_d}{L\_q} i\_d^{\;k} + \frac{T\_s}{L\_q} \upsilon\_q^k \end{array} \end{array} \tag{4}$$

where *Ts* is the sampling interval, *id <sup>k</sup>* and *iq <sup>k</sup>* are the direct and quadrature axis terminal measured currents at the (*k*)*th* instant and *vd <sup>k</sup>* and *vq <sup>k</sup>* are the direct and quadrature axis voltages obtained from the optimal VV applied to the VSI at the instant (*k*)*th*. Using the MPCC with delay compensation from [42] and according to (4), the predicted currents in the (*k* + 2)*th* sampling period can be written as

$$\begin{cases} \begin{array}{c} i\_d k^{+2} = \left(1 - \frac{R\_s T\_s}{L\_d}\right) i\_d k^{+1} + \omega\_d T\_s \frac{L\_q}{L\_d} i\_q k^{+1} + \frac{T\_s}{L\_d} \upsilon\_d k^{+1} \\\ i\_q k^{+2} = \left(1 - \frac{R\_s T\_s}{L\_q}\right) i\_q k^{+1} - \omega\_d T\_s \frac{L\_d}{L\_q} i\_d k^{+1} + \frac{T\_s}{L\_q} \upsilon\_q k^{+1} \end{array} \end{array} \tag{5}$$

In the proposed HCC–MPCC, *vd <sup>k</sup>*+<sup>1</sup> and *vq <sup>k</sup>*+<sup>1</sup> are the direct and quadrature axis voltages computed from four VVs obtained from HCC according to Table 1. However, in classic MPCC, *vd <sup>k</sup>*+<sup>1</sup> and *vq <sup>k</sup>*+<sup>1</sup> are reconstructed from the 8 VVs of the hexagon voltage that the converter can synthesize, turning (5) into a computationally demanding task.

Then, the cost function is defined with an emphasis on the desired behavior of the SynRM. Therefore, considering that the implemented algorithm focuses on predictive currents, the cost function is then defined to evaluate the error between the predicted currents and their respective references. Hence, the cost function is given by

$$(g(k)|\_{\mathbf{x}\_l} = \left[i\_d^\* - i\_d^{k+2}\right]^2 + \left[i\_q^\* - i\_q^{k+2}\right]^2; \ l = 0, \ldots, 3\tag{6}$$

In the SynRM control, the reference current *i* ∗ *<sup>q</sup>* is generated by the speed controller, while *i* ∗ *<sup>d</sup>* is derived from considering the MTPA strategy in [39], given by

$$i\_d^\* = -0.0589i\_q^{\*2} + 1.0515i\_q^\* - 0.2374\tag{7}$$

Regarding Table 1, it can be further observed that each reference VV previously computed by the HCC *VHCC* corresponds to a combination of 4 selected VVs *NVHCC* , thus yielding predicted current values through (5). Therefore, by optimizing (6), the optimal VV can be determined as follows:

$$V\_{VSI}(k) = \arg\min\_{\{\mathbf{x}\_0, \mathbf{x}\_1, \mathbf{x}\_2, \mathbf{x}\_3\}} \mathbf{g}(k)|\_{\mathbf{x}\_l}; \ l = 0, \dots, 3 \tag{8}$$

where the optimal VV satisfying the criteria defined by (8) by which the chosen (minimal) value of the defined cost function *g*(*k*), which is dependent on the 4-element VV, is then adopted to control the six insulated gate bipolar transistors (IGBTs) of the VSI in the (*k* + 2)*th* sampling period, according to Table 2, where the relationship between the output voltages *VVSI* and the conducing modes of the VSI is presented, with *VVSI <sup>j</sup>*(*j* = 0, . . . , 7).

**Table 2.** Converter VVs.


In (5)–(8) of the proposed HCC–MPCC control scheme, only 4 out of the 8 available VVs of the VSI, previously calculated by HCC, are used to perform the prediction of the current and evaluation of the cost function within every sampling interval Ts, thus, computing the optimal VV, which is then applied to the converter. However, it is essential to distinguish that, in classical MPCC, all 8 VVs are used to predict the current and to evaluate the cost function.

#### **3. Results and Discussion**

The considered configuration of the drive system consists of a three-phase 2L-VSI linked to the SynRM, where the control system outputs the optimal VV through a combination of the switching signals *sa*, *sb* and *sc*. In addition, a closed-loop scheme with feedback sensors, where rotor location, stator currents and dc-link voltage are measured, is considered for high drive efficiency. Figure 2 shows the block diagram configuration for the proposed HCC–MPCC strategy in detail. Furthermore, the flowchart for the proposed algorithm can be seen in Figure 3. In addition, the algorithm for the proposed control strategy comprises the following steps:


The experimental test rig comprised a 2.2 kW SynRM coupled to an AC electric machine used as a load due to its similar power characteristics and speed range as the SynRM used for the proposed method. The AC electric machine in question was a 2.2 kW PMSG with a nominal speed of 1750 rpm. A Powerex POW-R-PAK VSI, a diode bridge rectifier and a dSPACE DS1103 digital controller were also part of the experimental configuration, as shown in Figure 4. The SynRM parameters are given in Table 3.

**Figure 4.** Experimental configuration of the SynRM drive.

**Table 3.** Parameters of the used SynRM.


The classical MPCC and the proposed HCC–MPCC algorithms were applied to the VSI. The same PI speed controller for closed-loop speed control was used for both control schemes. For the proposed HCC–MPCC, the hysteresis band was imposed at 0.2 A, approximately 3.5% of the rated current, for better control performance.

#### *3.1. Computational Effort*

The classical MPCC and the proposed HCC–MPCC algorithms were separately implemented, under the MATLAB/Simulink environment, into the dSPACE digital controller board. The computational prerequisites of a given algorithm are determined by the complexity and demands of the applied programming language. One way to estimate such prerequisites is to calculate the computational effort placed on the controller in order to execute all the algorithmic calculations. Considering the procedure described in [43], Table 4 presents the average execution times taken by each algorithm in the dSPACE DS1103 controller and the real-time implementation details. The computation effort of the proposed HCC–MPCC algorithm took only 18.82 μs to complete the code, which is significantly lower than the classical MPCC's execution time of 24.26 μs. Therefore, given that the sampling time Ts must be greater than the execution time and that the control variable ripples are heavily dependent on the Ts, the Ts for the classical MPCC cannot be considerably less than 35 μs due to the high algorithmic computation time. However, by using four VVs in the proposed HCC–MPCC, the Ts could be effectively reduced to 28 μs, thereby improving the overall performance of the control process.


**Table 4.** VV number and execution time of HCC–MPCC and classical MPCC.

#### *3.2. Control Performance*

For an adequate assessment of the proposed algorithm's control efficiency and performance analysis, the total harmonic distortion (*THD*) expression was employed to quantify the distortion of the currents [30], further in compliance with the IEEE guidelines specified in [44]. Similarly, the total waveform oscillation (*TWO*) factor was employed to quantify the ripple/oscillation content of said quantity, where a high ripple content is undesirable [30,45]. The *THD* can be expressed as

$$THD = \sqrt{\frac{THD\_A^2 + THD\_B^2 + THD\_C^2}{3}} \times 100\% \tag{9}$$

Furthermore, the *TWO* can be given by

$$TWO = \frac{\sqrt{X\_{\varepsilon RMS}^2 - X\_{\varepsilon DC}^2}}{|X\_{\varepsilon DC}|} \times 100\% \tag{10}$$

where *XeRMS* and *XeDC* stand for the RMS values and average values of a given quantity, respectively.

Extensive experimental tests were conducted to validate the proposed HCC–MPCC strategy, feasibility and control performance. Furthermore, the classic MPCC was applied alongside the proposed algorithm for comparative purposes, but with different sampling times. Both control schemes were tuned in order to give the best possible performance and they were tested under the same conditions. The performance evaluation considered the analysis of the system's dynamic response to a set of operating conditions as well as the *THD* of the phase stator currents and the *TWO* values of the d-q axis currents.

Figure 5 shows a comparison between the classical MPCC at 35 us (Figure 5a), the proposed HCC–MPCC at 35 us (Figure 5b) and the proposed HCC–MPCC at 28 μs (Figure 5c) under a step-torque torque. The speed reference was set to 1000 rpm, whereas the load step-torque was applied at t = 0.5 s, ranging from 0 to 5 Nm. It can be observed that all control strategies exhibited a similar rapid dynamic response for the considered operation conditions, showcasing good and precise speed tracking capability, thus exhibiting their strength in withstanding rapid and load torque variations. Consequently, the d–q-axis currents presented an expected behavior as they varied according to the demanded load torque, displaying a good torque response. Moreover, it can also be observed that the stator current waveforms were effectively sinusoidal.

Nonetheless, unlike classical MPCC, the proposed HCC–MPCC did not test all the eight possible VVs of the VSI for evaluation and prediction; therefore, classical MPCC displayed a slightly better performance than the proposed HCC–MPCC for the same sampling time of Ts = 35 μs, evidenced by the fact that, for the same sampling time of Ts = 35 μs, classical MPCC (Figure 5a) had an overall slightly better performance indicated by the lower *TWO* values and *THD* in d–q-axis currents and the stator current waveform, respectively, in comparison with HCC–MPCC (Figure 5b), given the slightly higher *TWO* values and *THD* of the latter. However, in contrast with classical MPCC, as previously mentioned, the proposed HCC–MPCC reduced the VVs used for prediction and evaluation of the cost function, thus inherently requiring a shorter execution time, which translates itself to a shorter sampling time. Therefore, as indicated in Table 4, the sampling time of the proposed HCC–MPCC (Figure 5c) was set to Ts = 28 μs, consequently displaying

superior control performance evidenced by the decrease in the overall *TWO* values in the d– q-axis currents and, subsequently, a lower ripple content in the stator current waveforms in comparison with the previously mentioned control configurations, evidenced in the zoomed stator currents. Furthermore, it is important to highlight that a smaller sampling time of Ts = 28 μs was not available for classical MPCC, thus this was set to Ts = 35 μs. In addition, it is also necessary to emphasize that, given the MPCC's high parameter dependency on the SynRM model, slight deviations between the q-axis current and its respective reference can be observed in Figure 5 for the employed control strategies. Moreover, the nonlinear nature of the operation conditions inherent to the experimental procedure and several other reasons are also contributing factors for the SynRM modeling accuracy.

**Figure 5.** Experimental results: (**a**) MPCC (Ts = 35 μs), (**b**) HCC–MPCC (Ts = 35 μs) and (**c**) HCC– MPCC (Ts = 28 μs), under a step-torque load.

Figure 6 shows the control scheme performance under a speed progression from 500 to 1000 rpm, with a load torque of 2 Nm imposed to the SynRM. The change in the speed reference was given at t = 0.5 s with an acceleration rate of 1000 rpm/s. It can be observed that, for both MPCC and HCC–MPCC control strategies, the new speed reference value was tracked accurately and without any noticeable overshoot, evidenced by the waveform smoothness under the employed speed progression (see Figure 6a–c). Similarly, the d–q-axis currents tracked their reference well, changing along with the speed progression, displaying a great dynamic response in the transient state. However, similarly to the previous operating condition, for the same sampling time of Ts = 35 μs, given its higher resolution, classical MPCC (Figure 6a) exhibited lower *TWO* values and ripple content in the d–q-axis currents and the stator current waveforms, respectively, in contrast with the proposed HCC–MPCC (Figure 6b). Nonetheless, for the employed control strategy in Figure 6c with a lower sampling time of Ts = 28 μs, it can be observed that the d–q-axis currents presented lower *TWO* values than the other control scheme configurations with a higher sampling time, consequently leading to sinusoidal stator currents with less harmonic distortion, showcasing the proposed HCC–MPCC's superior control performance.

**Figure 6.** Experimental results of (**a**) MPCC (Ts = 35μs), (**b**) HCC–MPCC (Ts = 35 μs) and (**c**) HCC– MPCC (Ts = 28 μs), under speed variations.

In summary, it deserves restating that, for the same sampling time of Ts = 35 us, Figures 5b and 6b showcase slightly higher *TWO* values and *THD* in the d–q-axis currents and the stator current waveform, respectively, under both step-load torque and speed variations, in comparison with the classical MPCC's results in Figures 5a and 6a, that is, due to a lower resolution of the proposed control scheme at a sampling time of Ts = 35 us, with such occurrence lying in two main reasons. Firstly, the predicted vectors were selected based on the hysteresis current controller (HCC) reference VV, which is solely dependent on the HCC bandwidth. Secondly, not all feasible voltage vectors (VV) were used for prediction and evaluation of the cost function. Nonetheless, it is essential to note that the computational running time for each algorithm's execution varied. Table 4 presents and compares the average execution times of the algorithms. In comparison to conventional MPCC, the proposed HCC–MPCC eliminates the need for excessive calculations. As a result, the execution time was significantly reduced. In particular, the proposed HCC– MPCC dispensed with evaluating all feasible VVs of the VSI, reducing the number of candidate voltage vectors (VV) for prediction and evaluation in the cost function from eight to four VVs. This ultimately reduced the algorithm's execution time.

Therefore, to reap the benefits of the related decrease in execution time, the sampling time could also be reduced. Thus, the sampling time could be set to 28 μs for the proposed HCC–MPCC, given that only four VV were evaluated, where a sampling time lower than 35 μs is not available for classical MPCC. The implementation details in Table 4 reveal a 20% reduction in the excessive computational burden inherent to classical MPCC, further conceiving additional benefits to the proposed HCC–MPCC, thereby excelling and showcasing the best control performance by exhibiting lower *TWO* values and *THD* in the d–q-axis currents and the stator current waveforms, respectively, as shown in Figures 5c and 6c compared to the classical strategy and further widening its applicability to cheap and less power-demanding microprocessors.

#### **4. Conclusions**

This paper presents a computationally efficient HCC–MPCC control scheme of SynRM drives. The reduction in the computational cost was achieved by a merger between MPCC and HCC, thus defining only four VVs used to predict the current and evaluate the cost function. Compared with classical MPCC, the adoption of the proposed HCC–MPCC represents a reduction of20% in the computational effort while simultaneously maintaining and exhibiting the best control performance, making it an attractive, cost-effective solution.

Moreover, the proposed HCC–MPCC scheme further proved to improve on the inherent drawbacks of both HCC and MPCC, with the conducted experimental results also showing an overall reduction in the *TWO* values and harmonic distortion content as well as the ability to withstand parameters variability, yielding overall excellent results compared with HCC and MPCC alone.

**Author Contributions:** Conceptualization, W.B. and I.J.; methodology, A.J.M.C., I.J. and W.B.; formal analysis, W.B., I.J. and A.J.M.C.; investigation, W.B. and I.J.; resources, A.J.M.C.; data curation, W.B.; writing—original draft preparation, W.B.; writing—review and editing, W.B., I.J. and A.J.M.C.; visualization, W.B., I.J. and A.J.M.C.; supervision, I.J., A.J.M.C.; project administration, A.J.M.C.; funding acquisition, A.J.M.C. All authors have read and agreed to the published version of the manuscript.

**Funding:** This work was supported by the European Regional Development Fund (ERDF) through the Operational Programme for Competitiveness and Internationalization (COMPETE 2020), under Project POCI-01-0145-FEDER-029494 and by National Funds through the FCT—Portuguese Foundation for Science and Technology—under Projects PTDC/EEI-EEE/29494/2017, UIDB/04131/2020 and UIDP/04131/2020.

**Conflicts of Interest:** The authors declare no conflict of interest.

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