*Article* **Design of Power/Ground Noise Suppression Structures Based on a Dispersion Analysis for Packages and Interposers with Low-Loss Substrates**

**Youngwoo Kim**

Nara Institute of Science and Technology, Division of Information Science, Ikoma-shi 630-0192, Japan; youngwoo@is.naist.jp; Tel.: +81+743-72-5953

**Abstract:** In this study, power/ground noise suppression structures were designed based on a proposed dispersion analysis for packages and interposers with low-loss substrates. Low-loss substrates are suitable for maintaining signal integrity (SI) of high-speed channels operating at high data rates. However, when the power/ground noise is generated in the power delivery network (PDN), low-loss substrates cannot suppress the power/ground noise, thereby causing PDN-induced crosstalk and various power integrity (PI) issues. To solve these issues, noise suppression structures generating electromagnetic bandgap were proposed and designed. The mechanism of the proposed structures was examined based on a proposed dispersion analysis. The proposed structures were designed and fabricated in glass interposer test vehicles, and the effectiveness of the structures on power/ground noise suppression was experimentally validated by measuring the noise suppression band. The proposed dispersion analysis was also verified by comparing the derived noise stopband edges (*f*<sup>L</sup> and *f*U) with electromagnetic (EM) simulation and experimental results, and they all showed good agreement. Compared to EM simulation, the proposed method required smaller computational resources but showed good accuracy. Using the proposed dispersion analysis, various power/ground noise suppression bands were designed considering the applications and design rules of packages and interposers. With measurements and EM/circuit simulations, the effectiveness of the designed structure in maintaining SI/PI was verified. By adopting the designed structures, the noise transfer properties in the PDN were suppressed in the target suppression frequency band, which is key for PI design. Finally, it was verified that the proposed structures were capable of suppressing power/ground noise propagation in the PDN by analyzing PDN-induced crosstalk in the high-speed channel.

**Keywords:** electromagnetic bandgap (EBG); interposers; low-loss substrates; noise suppression structures; packages; power delivery network (PDN); power/ground noise

## **1. Introduction**

Transistor scaling based on Moore's law is facing a limit. At the same time, the realization of electrical systems with wide bandwidth, superior performances, small form factor, low power consumption, and reduced manufacturing cost has been a continuous challenge. System scaling based on through-silicon via and interposer technologies is a promising solution for current industrial challenges [1–5]. Recently, silicon interposers have been widely used to integrate graphic processing unit (GPU) and high bandwidth memory (HBM) to form 2.5-dimensional (2.5-D) systems to realize over terabyte per second (TB/s) system bandwidths for extremely high-performance computing [6,7]. However, reducing the manufacturing cost of silicon interposers is still difficult due to the throughput issues associated with limited wafer dimension. Even though silicon interposer-based integration and packaging provides promising solutions, reducing the manufacturing cost is difficult due to the following reasons: throughput issues associated with limited wafer dimension and additional fabrication steps to isolate metal layers from the conductive silicon substrate.

**Citation:** Kim, Y. Design of Power/Ground Noise Suppression Structures Based on a Dispersion Analysis for Packages and Interposers with Low-Loss Substrates. *Micromachines* **2022**, *13*, 1433. https://doi.org/10.3390/ mi13091433

Academic Editor: Wensheng Zhao

Received: 30 July 2022 Accepted: 26 August 2022 Published: 30 August 2022

**Publisher's Note:** MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

**Copyright:** © 2022 by the author. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/).

Moreover, the finite conductivity of the silicon substrate can generate signal integrity (SI) issues in the high-frequency range, which may limit high-speed digital signaling, radio frequency (RF) applications, and mixed-signal integrations [8]. Because of these limitations, packages and interposers with low-loss substrates have gained attention as a long-term alternative to silicon interposers. conductive silicon substrate. Moreover, the finite conductivity of the silicon substrate can generate signal integrity (SI) issues in the high-frequency range, which may limit highspeed digital signaling, radio frequency (RF) applications, and mixed-signal integrations [8]. Because of these limitations, packages and interposers with low-loss substrates have gained attention as a long-term alternative to silicon interposers. Packages and interposers with low-loss substrates have been continuously devel-

poser-based integration and packaging provides promising solutions, reducing the manufacturing cost is difficult due to the following reasons: throughput issues associated with limited wafer dimension and additional fabrication steps to isolate metal layers from the

Packages and interposers with low-loss substrates have been continuously developed. Glass substrates have several advantages, such as dimensional stability, coefficient of thermal expansion (CTE) similar to silicon, smooth surface, submicron metallization, doublesided build-up lamination, and superior electrical resistivity enabling low insertion loss up to millimeter (mm)-wave range [9–11]. Recently, glass substrates have been widely adopted for various packaging applications, such as bandpass filters for 5G communication [12], MEMS [13], millimeter-wave radar for autonomous driving [14], and antennas [15,16]. Fan-out packages with low-loss materials have also been widely adopted [17]. Ultrathin, high-permittivity, and low-loss substrates have been released in the market for printed circuit boards (PCBs), which can also be embedded in packages to realize embedded decoupling capacitors [18,19]. These substrate materials are fabricated from panels that are much larger in dimension compared to silicon wafers. Therefore, these substrates also have the potential to reduce the fabrication cost due to increased yield. The advantages are depicted in Figure 1. oped. Glass substrates have several advantages, such as dimensional stability, coefficient of thermal expansion (CTE) similar to silicon, smooth surface, submicron metallization, double-sided build-up lamination, and superior electrical resistivity enabling low insertion loss up to millimeter (mm)-wave range [9–11]. Recently, glass substrates have been widely adopted for various packaging applications, such as bandpass filters for 5G communication [12], MEMS [13], millimeter-wave radar for autonomous driving [14], and antennas [15,16]. Fan-out packages with low-loss materials have also been widely adopted [17]. Ultrathin, high-permittivity, and low-loss substrates have been released in the market for printed circuit boards (PCBs), which can also be embedded in packages to realize embedded decoupling capacitors [18,19]. These substrate materials are fabricated from panels that are much larger in dimension compared to silicon wafers. Therefore, these substrates also have the potential to reduce the fabrication cost due to increased yield. The advantages are depicted in Figure 1.

*Micromachines* **2022**, *13*, x FOR PEER REVIEW 2 of 20

**Figure 1.** Advantages of low-loss substrate for packages and interposers. (**a**) Ultrathin (sub 100 μm) and fine-pitch metallization; (**b**) high fabrication yield, which has great potential for cost reduction; (**c**) low signal loss, enabling high-speed signaling. **Figure 1.** Advantages of low-loss substrate for packages and interposers. (**a**) Ultrathin (sub 100 µm) and fine-pitch metallization; (**b**) high fabrication yield, which has great potential for cost reduction; (**c**) low signal loss, enabling high-speed signaling.

Despite these advantages and potentials, low-loss substrates are vulnerable to power/ground noise generated in the power delivery network (PDN) [20]. Low-loss substrates are excellent for high-frequency signaling, but at the same time, it is difficult to suppress power/ground noise induced in the PDN. The noise can be induced in the PDN due to various reasons, such as simultaneous switching noise (SSN), return current discontinuity of the signal via penetration of the PDN, and coupling from other signal/power/ground interconnections. When the power/ground noise is generated, it propagates along the PDN without suppression, causing various SI/PI (power integrity) and electromagnetic interference (EMI) issues. These issues are shown in Figure 2. When designing a PDN, the allowed power/ground noise margin is becoming tighter because the operating voltages of electrical systems are continuously decreasing to realize low power consumption [21]. Moreover, due to recent trends requiring system-in-package, heterogeneous integration, and mixed modes, various noises are generated in the broadband frequency range. To maximize the advantages of low-loss substrates, power/ground noise must be suppressed and effective suppression bands should be analyzed in advance. Despite these advantages and potentials, low-loss substrates are vulnerable to power/ground noise generated in the power delivery network (PDN) [20]. Low-loss substrates are excellent for high-frequency signaling, but at the same time, it is difficult to suppress power/ground noise induced in the PDN. The noise can be induced in the PDN due to various reasons, such as simultaneous switching noise (SSN), return current discontinuity of the signal via penetration of the PDN, and coupling from other signal/power/ground interconnections. When the power/ground noise is generated, it propagates along the PDN without suppression, causing various SI/PI (power integrity) and electromagnetic interference (EMI) issues. These issues are shown in Figure 2. When designing a PDN, the allowed power/ground noise margin is becoming tighter because the operating voltages of electrical systems are continuously decreasing to realize low power consumption [21]. Moreover, due to recent trends requiring system-in-package, heterogeneous integration, and mixed modes, various noises are generated in the broadband frequency range. To maximize the advantages of low-loss substrates, power/ground noise must be suppressed and effective suppression bands should be analyzed in advance.

**Figure 2.** Issues related to low-loss substrate. When the noise is induced in the PDN due to SSN, P/G noise, or return current loading, low substrate loss cannot suppress it. The noise propagates along the PDN and causes SI/PI problems. **Figure 2.** Issues related to low-loss substrate. When the noise is induced in the PDN due to SSN, P/G noise, or return current loading, low substrate loss cannot suppress it. The noise propagates along the PDN and causes SI/PI problems.

Decoupling capacitor arrays and schemes may be insufficient for achieving broadband power/ground noise suppression. Moreover, assembling various decoupling capacitors to achieve broadband suppression can increase the lateral dimensions of packages and interposers, which directly affects the fabrication yield. For security applications, exposed decoupling capacitors attached to the cryptographic core PDN cause electromagnetic (EM) information leakages and security issues [22,23]. Various electromagnetic bandgap (EBG) structures that are mostly embedded inside the PDN have been proposed and validated to achieve wideband power/ground noise suppression [24–31]. Considering recent trends requiring broadband noise suppression without dramatically affecting lateral dimensions of the package/interposer and unexposed areas for some applications, adopting the EBG structure embedded in the PDN is one of the most promising solutions to solve the power/ground noise issues associated with low substrate loss. However, such structures have not been widely developed and applied for packages and interposers with low-loss substrates. Therefore, an efficient design method considering design parameters and material properties is desired. Using the method, noise suppression structures should Decoupling capacitor arrays and schemes may be insufficient for achieving broadband power/ground noise suppression. Moreover, assembling various decoupling capacitors to achieve broadband suppression can increase the lateral dimensions of packages and interposers, which directly affects the fabrication yield. For security applications, exposed decoupling capacitors attached to the cryptographic core PDN cause electromagnetic (EM) information leakages and security issues [22,23]. Various electromagnetic bandgap (EBG) structures that are mostly embedded inside the PDN have been proposed and validated to achieve wideband power/ground noise suppression [24–31]. Considering recent trends requiring broadband noise suppression without dramatically affecting lateral dimensions of the package/interposer and unexposed areas for some applications, adopting the EBG structure embedded in the PDN is one of the most promising solutions to solve the power/ground noise issues associated with low substrate loss. However, such structures have not been widely developed and applied for packages and interposers with low-loss substrates. Therefore, an efficient design method considering design parameters and material properties is desired. Using the method, noise suppression structures should be developed and verified.

be developed and verified. In this study, power/ground noise suppression structures were designed based on a proposed dispersion analysis for packages and interposers with low-loss substrates. The mechanism of noise suppression was thoroughly examined based on the proposed dispersion analysis. The structures were designed and fabricated in glass interposer test vehicles, and the effectiveness of the structures was experimentally validated by measuring the noise suppression band. The proposed dispersion analysis was also verified by comparing derived noise stopband edges (݂ and ݂) with electromagnetic (EM) simulation. It was confirmed that ݂ and ݂ estimations based on the proposed analysis method showed good agreement with those acquired from experiments and simulations. Compared to EM simulation, the proposed method required smaller computational resources but showed good accuracy, which is suitable for early design stages. Using the proposed dispersion analysis, various power/ground noise suppression bands were designed considering the applications and design rules of packages and interposers. With measure-In this study, power/ground noise suppression structures were designed based on a proposed dispersion analysis for packages and interposers with low-loss substrates. The mechanism of noise suppression was thoroughly examined based on the proposed dispersion analysis. The structures were designed and fabricated in glass interposer test vehicles, and the effectiveness of the structures was experimentally validated by measuring the noise suppression band. The proposed dispersion analysis was also verified by comparing derived noise stopband edges (*f*<sup>L</sup> and *f*U) with electromagnetic (EM) simulation. It was confirmed that *f*<sup>L</sup> and *f*<sup>U</sup> estimations based on the proposed analysis method showed good agreement with those acquired from experiments and simulations. Compared to EM simulation, the proposed method required smaller computational resources but showed good accuracy, which is suitable for early design stages. Using the proposed dispersion analysis, various power/ground noise suppression bands were designed considering the applications and design rules of packages and interposers. With measurements and EM simulations, the effectiveness of the designed structure in maintaining SI/PI was ver-

ments and EM simulations, the effectiveness of the designed structure in maintaining

ified. Finally, it was shown that the proposed structures were capable of suppressing power/ground noise propagation in the PDN by analyzing PDN-induced crosstalk in the high-speed channel.

## **2. Proposed Dispersion Analysis: Mechanism of Noise Suppression Band Formation and Stopband Edge Estimation**

In this section, a dispersion analysis is proposed to explain the mechanism of noise suppression band formulation in the PDN. The proposed dispersion analysis is also capable of deriving noise suppression (stopband) edges. The proposed dispersion analysis is based on a transmission line (TL) theory and mathematics. Compared to full EM simulations, which require heavy computational resources, the proposed method can efficiently estimate the suppression band. In addition, the impacts of material properties and design rules on the suppression band can be easily understood.

Compared to mesh or grid-type PDN structures in silicon interposers, plane-type PDN can be fabricated in packages and interposers with low-loss substrates, such as glass, ceramic, and organic materials [9,18]. In the plane-type PDN, the power/ground noise propagates in forms of transverse electromagnetic (TEM) and quasi-TEM modes. The PDN becomes a transmission line (TL) for the noise wave. To suppress noise propagation, a noise suppression band can be formed by designing certain repetitive structures generating lumped capacitance (*C*) and inductance (*L*). The band must be analyzed and engineered to cover the target noise band. In this study, power/ground noise propagation is analyzed in the +*x-*direction (**N**(*x*) = *e* <sup>−</sup>*jk<sup>x</sup> <sup>x</sup>***a***x*). *k<sup>x</sup>* is an effective phase constant defined as *k<sup>x</sup>* = *αx*+ *jβx*, where *α<sup>x</sup>* becomes an attenuation constant and *β<sup>x</sup>* is a propagation constant of the power/ground noise wave propagating in the +*x*-direction. Let the size of the repetitive structure formed in the PDN be *W*u. A two-dimensional periodic structure can be reduced into a one-dimensional array of unit cells (size of *W*u) by placing perfect magnetic conductor (PMC) walls at *y* = ±*W*u/2, as depicted in Figure 3. This assumption and dimension reduction can be applied as the PMC wall can be located anywhere where there is a zero tangential magnetic (*H*) field [31–33]. By adopting the PMC boundary condition, the noise suppression structure and the PDN can be modeled as TL with lumped *C* and *L*. In the following sections, detailed equations for *C* and *L* are provided considering the design, physical dimensions, and material properties.

In typical advanced packages and interposers, build-up layers exist in between the substrate and metal layers (ML), as shown in Figure 3. The power/ground noise propagating in the form of the quasi-TEM mode can be modeled into a TL. The TL has a thickness of *t*PDN, which is summation of the substrate thickness (*t*sub) and the thickness of two build-up layers (*t*bu). The dielectric layers in between power and ground planes can be modeled as a single dielectric mixture layer represented with the effective complex dielectric constant (*ε*mix(*ω*)) shown in the following equation:

$$
\varepsilon\_{\rm mix}(\omega) = \frac{\varepsilon\_{\rm sub}(\omega)\varepsilon\_{\rm bu}(\omega)}{q\varepsilon\_{\rm sub}(\omega) + (1-q)\varepsilon\_{\rm bu}(\omega)}\tag{1}
$$

where *q* is the volume fraction of the dielectric layers; *ε*sub(ω) and *ε*bu(ω) are complex permittivity of the substrate and build-up layer, respectively [34]; and *ω* is the angular frequency (2π*f*). Real parts of the *ε*mix(ω), *ε*sub(ω), and *ε*bu(ω) are defined as *ε*r,mix, *ε*r,sub, and *ε*r,bu, respectively.

**Figure 3.** One-dimensional equivalent circuit model of the PDN with structure generating *C* and *L*. Considering the *H*-field direction, PMC boundary condition is adopted to reduce the two-dimensional PDN into one-dimensional domain in the *x*-direction. ܉ is a unit vector. **Figure 3.** One-dimensional equivalent circuit model of the PDN with structure generating *C* and *L*. Considering the *H*-field direction, PMC boundary condition is adopted to reduce the two-dimensional PDN into one-dimensional domain in the *x*-direction. **a***x* is a unit vector.

In typical advanced packages and interposers, build-up layers exist in between the substrate and metal layers (ML), as shown in Figure 3. The power/ground noise propa-Characteristic impedance (*Z*0, PDN) and phase constant (*β*PDN) of the TL without *C* and *L* can be expressed as follows:

$$Z\_{0, \text{PDN}} = \frac{\eta\_0}{\sqrt{\varepsilon\_{\text{r,mix}}}} \frac{t\_{\text{PDN}}}{\mathcal{W}\_{\text{u}}} \, \, t\_{\text{PDN}} = t\_{\text{sub}} + 2t\_{\text{ub}} \tag{2}$$

modeled as a single dielectric mixture layer represented with the effective complex and

$$
\beta\_{\rm PDN} = \sqrt{\varepsilon\_{\rm r,mix}} \omega / c \tag{3}
$$

ߝ୫୧୶(ω) <sup>=</sup> ߝୱ୳ୠ(ω)ߝୠ୳(ω) where *η*<sup>0</sup> is the wave impedance of free space, and *c* is the speed of light in a vacuum.

ߝݍୱ୳ୠ(ω) <sup>+</sup> (1−ݍ(ߝୠ୳(ω) (1) where *q* is the volume fraction of the dielectric layers; ߝୱ୳ୠ(ω) and ߝୠ୳(ω) are complex permittivity of the substrate and build-up layer, respectively [34]; and ߱ is the angular frequency (2π݂). Real parts of the ߝ୫୧୶(ω), ߝୱ୳ୠ(ω), and ߝୠ୳(ω) are defined as ߝ୰,୫୧୶, ߝ୰,ୱ୳ୠ, and ߝ୰,ୠ୳, respectively. Characteristic impedance (*Z*0, PDN) and phase constant (*β*PDN) of the TL without *C* and To derive the dispersion equations to estimate the noise stopband, *ABCD* parameters of the TL shown in Figure 3 is analyzed. The unit cell of the TL has an effective phase constant *kx*. Compared to the silicon, the substrate and build-up layer of the target study have much lower loss factors. Therefore, lossless condition is adopted for an efficient calculation during the dispersion analysis. The *ABCD* parameters of the TL's unit cell can be expressed as follows:

where ߟ0 is the wave impedance of free space, and *c* is the speed of light in a vacuum.

$$
\begin{bmatrix} A\_{\text{u}} & B\_{\text{u}} \\ C\_{\text{u}} & D\_{\text{u}} \end{bmatrix} = \begin{bmatrix} \cos(k\_{\text{x}} \mathcal{W}\_{\text{u}}) & jZ\_{\text{0},1}\sin(k\_{\text{x}} \mathcal{W}\_{\text{u}}) \\ jZ\_{\text{0},1} - \sin(k\_{\text{x}} \mathcal{W}\_{\text{u}}) & \cos(k\_{\text{x}} \mathcal{W}\_{\text{u}}) \end{bmatrix}
$$

$$
= \begin{bmatrix} \cos\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) & jZ\_{\text{0-PDN}}\sin\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) \\ jZ\_{\text{0-PDN}} - \sin\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) & \cos\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) \end{bmatrix} \times \begin{bmatrix} 1 & 0 \\ Y & 1 \end{bmatrix} \times \begin{bmatrix} \cos\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) & jZ\_{\text{0-PDN}}\sin\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) \\ jZ\_{\text{0-PDN}} - \sin\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) & \cos\left(\beta\_{\text{PDN}} \frac{\mathcal{W}\_{\text{u}}}{2}\right) \end{bmatrix} \tag{4}
$$

*L* can be expressed as follows:

where *<sup>Y</sup> = jωC/(*<sup>1</sup> <sup>−</sup> *<sup>ω</sup>*2*LC)*, and *<sup>Z</sup>*0,u is the characteristic impedance of TL with the structure inducing *L* and *C.* Among the four parameters, *A*<sup>u</sup> is the simplest. By analyzing *A*u, a dispersion equation is derived as follows:

$$A\_{\mathbf{u}} = \cos(k\_x \mathcal{W}\_{\mathbf{u}}) = \cos(\beta\_{\text{PDN}} \mathcal{W}\_{\mathbf{u}}) + j \frac{Z\_{\text{0,PDN}} \mathcal{Y}}{2} \sin(\beta\_{\text{PDN}} \mathcal{W}\_{\mathbf{u}}) \tag{5}$$

From (5), the effective phase constant *k<sup>x</sup>* is derived as follows:

$$k\_{\rm x} = \frac{1}{W\_{\rm u}} \cos^{-1} \left[ \cos(\beta\_{\rm PDN} W\_{\rm u}) - \frac{\omega}{2(1 - \omega^2 L C)} \sin(\beta\_{\rm PDN} W\_{\rm u}) \right] \tag{6}$$

In this study, the lossless condition has been assumed. However, the effective phase constant *k<sup>x</sup>* becomes a complex number. The effective phase constant has an imaginary part when the argument of the inverse cosine function in (6) is outside the interval [−1, 1]. The noise stopband is formed at the frequency range where the imaginary part of (6) is nonzero and changes dramatically. The wave becomes evanescent at this frequency range.

To graphically explain the noise propagation characteristics, dispersion diagrams are estimated from (6) and plotted in Figure 4 as an example. The design parameters and values to derive dispersion diagrams shown in Figure 4 are summarized in Table 1. Values are carefully chosen to derive diagrams that can graphically support the method and concept. Without noise suppression structures in the PDN, the propagation constant of the power/ground noise has a constant slope (2π √*ε*r,mix/*c*) in the frequency domain, which is nondispersive. When the structure forming the *L* and *C* is inserted in the PDN, the power/ground noise propagating in the +*x*-direction (*e* −*jk<sup>x</sup> x* ) will experience sudden attenuation at certain frequency band. Let −*jk<sup>x</sup>* = −*αx*−*jβx*, and *α<sup>x</sup>* becomes an attenuation constant and *β<sup>x</sup>* represents propagation constant of the power/ground noise wave. In this case, *β<sup>x</sup>* is periodic due to periodicity of the inverse cosine function.

**Table 1.** Summary of important design parameters and values used to derive dispersion diagrams shown in Figure 4.


As can be seen from Figure 4, there are frequency bands where the slope of *β<sup>x</sup>* becomes closer to zero (or *β<sup>x</sup>* is at the Brillouin zone boundaries) or the attenuation constant *α<sup>x</sup>* becomes nonzero. These frequency bands are theoretical noise bandgap or electromagnetic bandgap (EBG) where power/ground noise is suppressed and cannot propagate. However, except for the fundamental stopband, the attenuation constant for other bands are too small to suppress noise propagation.

In this study, the dispersion equations are calculated and plotted under the assumption of lossless substrate and build-up layer. In reality, there always exists attenuation of the wave associated with dielectric loss. Usually, noise suppression bands are valid if they can achieve −40 dB or lower isolation characteristics. Therefore, theoretical upper bands marked in Figure 4 cannot play a role as a suppression band. A band that can suppress power/ground noise will exist inside the fundamental stopband marked in Figure 4.

**Figure 4.** Dispersion diagrams. Without noise suppression structures in the PDN, the power/ground noise is nondispersive. With noise suppression structures, theoretical stopbands are generated. **Figure 4.** Dispersion diagrams. Without noise suppression structures in the PDN, the power/ground noise is nondispersive. With noise suppression structures, theoretical stopbands are generated.

**Table 1.** Summary of important design parameters and values used to derive dispersion diagrams shown in Figure 4.  *C L* ܝ ۼ۲۾, ܠܑܕ,ܚࢿ 4.25 9.14 Ω 3.2 mm 125.49 pH 22.831 pF The lower edge of the noise suppression band (*f* <sup>L</sup>) can be derived by finding the condition satisfying "A<sup>u</sup> = cos(*kxW*u) = −1". Among various cases, "*kxW*<sup>u</sup> = π" is selected in this study. Because *β*PDN*W*<sup>u</sup> is located far from the Brillouin zone boundary at the lower cut-off frequency, the small-angle approximation "sin(*β*PDN*W*u) ≈ *β*PDN*W*u" and "cos(*β*PDN*W*u) ≈ 1" can be used. Under these conditions, (6) can be rewritten as follows:

$$-1 = 1 - \frac{\omega Z\_{0, \text{PDN}} \text{C}}{2(1 - \omega^2 \text{LC})} \beta\_{\text{PDN}} \mathcal{W}\_{\text{u}}.\tag{7}$$

ߙ*x* becomes nonzero. These frequency bands are theoretical noise bandgap or electromagnetic bandgap (EBG) where power/ground noise is suppressed and cannot propagate. However, except for the fundamental stopband, the attenuation constant for other bands Because the wave impedance of free space (*η*0) can be expressed as *µ*0*c*, the lower edge of the noise suppression band (*f*L) can be derived from (7) and is shown in the following equation:

$$f\_{\rm L} = \frac{1}{\pi \sqrt{\mathbb{C} \left(\mu\_0 t\_{\rm PDN} + 4L\right)}}\tag{8}$$

the wave associated with dielectric loss. Usually, noise suppression bands are valid if they can achieve −40 dB or lower isolation characteristics. Therefore, theoretical upper bands marked in Figure 4 cannot play a role as a suppression band. A band that can suppress By setting different boundary condition, it is possible to estimate the upper edge of the noise suppression band (*f* <sup>U</sup>). It can be obtained by adopting conditions that satisfy "Au= cos(*k<sup>x</sup> W*u) = +1". Under this condition, (6) becomes the following:

study. Because ߚPDN*W*u is located far from the Brillouin zone boundary at the lower cutoff frequency, the small-angle approximation "sin(ߚୈܹ୳) ൎ ߚPDN*W*u" and "cos(ߚୈܹ୳) ൎ

$$\tan\left(\frac{\beta\_{\rm PDN}\mathcal{W}\_{\rm u}}{2}\right) = \frac{-\omega \subset \mathcal{Z}\_{0,\rm PDN}}{2(1-\omega^2 L\mathcal{C})}\tag{9}$$

1" can be used. Under these conditions, (6) can be rewritten as follows:

If *f* <sup>U</sup> and the resonant frequency (*f*R= 1 2*π* √ *LC* ) are far away from each other, (9) can be approximated as follows: approximated as follows: tan ቆߨඥߝ୰,୫୧୶ܹ୳ 1 <sup>=</sup> ܼ,ୈ 1

−1 = 1 − ఠబ,ౌీొ

݂ <sup>=</sup> <sup>ଵ</sup>

Because the wave impedance of free space (ߟ0 (can be expressed as ߤܿ, the lower edge of the noise suppression band (*f*L) can be derived from (7) and is shown in the fol-

గඥ (ఓబ௧ౌీొାସ)

<sup>2</sup> ൰ = −߱ ܥ ܼ,ୈ

ଶ

By setting different boundary condition, it is possible to estimate the upper edge of the noise suppression band (*f*U). It can be obtained by adopting conditions that satisfy "Au=

*Micromachines* **2022**, *13*, x FOR PEER REVIEW 8 of 20

cos(*kx W*u) = +1". Under this condition, (6) becomes the following:

If *f*U and the resonant frequency (݂ୖ= <sup>ଵ</sup>

tan ൬ߚୈܹ୳

lowing equation:

$$\tan\left(\frac{\pi\sqrt{\varepsilon\_{\rm r,mix}}\mathcal{W}\_{\rm U}}{c}f\_{\rm U}\right) \approx \pi cf\_{\rm R}^2 Z\_{0,\rm PDN} \frac{1}{f\_{\rm U}} = \frac{Z\_{0,\rm PDN}}{4\pi L} \frac{1}{f\_{\rm U}}\tag{10}$$

(ܥܮଶ1−߱(2

ଶ(ଵିఠమ) ߚୈܹ୳. (7)

ଶగ√) are far away from each other, (9) can be

(8)

(9)

From (10), it is difficult to directly estimate *f* <sup>U</sup>. A graphical (numerical) approach is applied to estimate *f* <sup>U</sup>, and an example is shown in Figure 5. In Figure 5, the left-hand side (LHS) and right-hand side (RHS) of (10) are plotted in the frequency domain. The frequency where the two graphs intersect is the upper edge of the noise suppression band (*f* <sup>U</sup>). applied to estimate *f*U, and an example is shown in Figure 5. In Figure 5, the left-hand side (LHS) and right-hand side (RHS) of (10) are plotted in the frequency domain. The frequency where the two graphs intersect is the upper edge of the noise suppression band (*f*U).

The following section outlines the design and fabrication of test vehicles with thin and low-loss glass substrate and low-loss polymer as a build-up material. The test vehicles were measured to validate the proposed dispersion analysis and effectiveness of the proposed structures on noise suppression. The following section outlines the design and fabrication of test vehicles with thin and low-loss glass substrate and low-loss polymer as a build-up material. The test vehicles were measured to validate the proposed dispersion analysis and effectiveness of the proposed structures on noise suppression.

#### **3. Verification of the Proposed Dispersion Analysis and Noise Suppression Structures 3. Verification of the Proposed Dispersion Analysis and Noise Suppression Structures** *3.1. Design and Fabricated Test Vehicles*

*3.1. Design and Fabricated Test Vehicles*  To validate the proposed dispersion analysis and noise suppression structures, two structures were designed and fabricated. In Figure 6, cross-sections/top views of the structures in the glass interposer test vehicles are shown. As shown in Figure 6a, this structure To validate the proposed dispersion analysis and noise suppression structures, two structures were designed and fabricated. In Figure 6, cross-sections/top views of thestructures in the glass interposer test vehicles are shown. As shown in Figure 6a, this structure (Type A) had double patches to increase capacitance. Four metal layers (MLs) were needed to form this structure. In Figure 6b, a simpler structure (Type B) is shown, which only had one patch and three MLs were required. Because the copper used to form metal layers (MLs) does not adhere to the glass substrate directly, low-loss polymer was used between the substrate and MLs. In glass packages and interposers, using a low-loss polymer provides various advantages, such as additional mechanical strength, prevention of substrate cracking, prevention of moisture contact, and CTE control [35]. In each test vehicle, 25 (5 in x-direction and 5 in y-direction) unit structures, shown in Figure 6, were embedded in the PDN. The top view of the test vehicle with 25 Type A unit structures is shown in Figure 6c. Similarly, the top view of the test vehicle with 25 Type B unit structures is shown in Figure 6d. In Table 2, the physical dimensions and material properties of the test vehicles are summarized. More detailed process design rules and explanations of the structures have been described in previous works [36,37].

of the structures have been described in previous works [36,37].

(Type A) had double patches to increase capacitance. Four metal layers (MLs) were needed to form this structure. In Figure 6b, a simpler structure (Type B) is shown, which only had one patch and three MLs were required. Because the copper used to form metal layers (MLs) does not adhere to the glass substrate directly, low-loss polymer was used between the substrate and MLs. In glass packages and interposers, using a low-loss polymer provides various advantages, such as additional mechanical strength, prevention of substrate cracking, prevention of moisture contact, and CTE control [35]. In each test vehicle, 25 (5 in x-direction and 5 in y-direction) unit structures, shown in Figure 6, were embedded in the PDN. The top view of the test vehicle with 25 Type A unit structures is shown in Figure 6c. Similarly, the top view of the test vehicle with 25 Type B unit structures is shown in Figure 6d. In Table 2, the physical dimensions and material properties of the test vehicles are summarized. More detailed process design rules and explanations

**Figure 6.** Designed noise suppression structures in the glass interposer test vehicles. (**a**) Type A: double-patch structure; (**b**) Type B: single-patch structure. Top view of the fabricated test vehicles composed with (**c**) Type A and (**d**) Type B. Each test vehicle has 25 unit structures. **Figure 6.** Designed noise suppression structures in the glass interposer test vehicles. (**a**) Type A: double-patch structure; (**b**) Type B: single-patch structure. Top view of the fabricated test vehicles composed with (**c**) Type A and (**d**) Type B. Each test vehicle has 25 unit structures.


**Table 2.** Physical dimensions and material properties of the glass interposer test vehicles.

Each structure has different lumped capacitance (*C*) and inductance (*L*). First, the structure of Type A was analyzed to derive lumped *C* and *L*. The lumped capacitance (*C*A) can be

derived by adding capacitance between patches and planes (*C*pa) and capacitance between the power/ground through-glass via (TGV) pair (*C*TGV) [38]. They can be summarized as follows:

$$\mathbf{C\_A} = \mathbf{C\_{pa}} + \mathbf{C\_{TGV}} \tag{11}$$

$$\mathcal{C}\_{\rm pa} = \frac{\varepsilon\_0 \varepsilon\_{\rm r,bu} \left( 2 \left( W\_{\rm pa} \right)^2 - \pi \left( d\_{\rm TGV\_{-T}} / 2 \right)^2 - \pi \left( d\_{\rm TGV\_{-B}} / 2 \right)^2 \right)}{t\_{\rm bu2} - t\_{\rm m}} \tag{12}$$

*C*TGV = Z *t*bu1 *z*=0 *πε*r,bu cos h−<sup>1</sup> (*p*TGV/2*r*(*z*)) *dz* + Z *t*bu1+*t*sub *z*=*t*bu1 *πε*r,sub cos h−<sup>1</sup> (*p*TGV/2*r*(*z*)) *dz* + Z 2*t*bu1+*t*sub *z*=*t*bu1+*t*sub *πε*r,bu cos h−<sup>1</sup> (*p*TGV/2*r*(*z*)) *dz* (13)

where

$$r(z) = \frac{d\_{\rm TGV\\_B}}{2} + \frac{d\_{\rm TGV\\_A} - d\_{\rm TGV\\_B}}{2(2t\_{\rm ub1} + t\_{\rm sub})}z \tag{14}$$

The lumped inductance (*L*A) can be modeled as follows:

$$L\_{\rm A} = L\_{\rm TGV} + 2L\_{\rm \mu \rm via} \tag{15}$$

$$L\_{\rm TGV} = \int\_{z=0}^{2\hbar\_{\rm bu1} + t\_{\rm sub}} \frac{\mu\_0}{\pi} \cos \mathbf{h}^{-1} (p\_{\rm TGV} / 2r(z)) \, dz \tag{16}$$

$$L\_{\text{\tiny\mu\text{via}}} = \frac{\mu\_0 (t\_{\text{bu2}} - t\_{\text{m}})}{4\pi} \left[ \ln \left( \frac{4 \text{ W}\_{\text{u}}^2}{\pi d\_{\text{\tiny\mu\text{via}}}^2} \right) + \frac{\pi d\_{\text{\tiny\mu\text{via}}}^2}{4 \text{ W}\_{\text{u}}^2} - 1 \right] \tag{17}$$

Equation (16) has a close relationship with (13), which dominates *L*A. Derivation of (16) is shown in [38]. Because microvia is not paired, the derivation of (17) is a bit different from (16). *L*µvia can be derived from the magnetic energy in the unit structure, which is known as *U*<sup>m</sup> = 1 2 R **B**·**H** *dv*. By adopting boundary condition *U*<sup>m</sup> = 1 2 *I <sup>2</sup>L*, it is possible to derive (17) [24,39]. This relationship can be used to derive the inductance of the single TGV in the Type B structure. Because microvia is relatively shorter than the TGV pair, *d*µ\_T and *d*µ\_B was averaged to derive *d*µvia in (17).

The Type B structure shown in Figure 6b is simple compared to Figure 6a. The lumped capacitance (*C*B) can be expressed as follows:

$$\mathcal{C}\_{\mathsf{B}} = \frac{\varepsilon\_{0}\varepsilon\_{\mathrm{r,bu}}\left(2\left(\mathcal{W}\_{\mathrm{pa}}\right)^{2} - \pi\left(d\_{\mathrm{TGV}\_{\mathrm{T}}}\mathcal{T}\right)^{2}\right)}{t\_{\mathrm{bu2}} - t\_{\mathrm{m}}}\tag{18}$$

The inductance of the single TGV can be obtained by modifying (17). It can be summarized as follows:

$$L\_{\rm B} = L\_{\rm single-TGV} = \int\_{z=0}^{\hbar\_{\rm bu1} + t\_{\rm sub}} \left[ \ln \left( \frac{\mathcal{W}\_{\rm u}^{\prime 2}}{dS(z)} \right) + \frac{dS(z)}{\mathcal{W}\_{\rm u}^{\prime 2}} - 1 \right] dz \tag{19}$$

where

$$dS(z) = \pi \left(\frac{d\_{\rm TGV\\_B}}{2} + \frac{d\_{\rm TGV\\_A} - d\_{\rm TGV\\_B}}{2(2t\_{\rm ub1} + t\_{\rm sub})} z\right)^2. \tag{20}$$

Basically, the derivation process of (17) and (19) is identical because they are both single via confined in the unit cell. Therefore, the two equations are similar. In (19) and (20), the tapered structure of the TGV is reflected. If the length of the TGV is very short and it is not tapered, the integral calculation in (19) can be simplified as in (17). The derived parameters can be inserted into the proposed dispersion analysis explained in the previous section to analyze the noise suppression band.

In Figure 7, fabricated glass interposer test vehicles are shown. Metal patches generating *C*, through-glass via (TGV), and planes are shown. Optical microscope and scanning electron microscope (SEM) were used to take images of various structures inside the glass

interposer test vehicles. As can be seen from Figure 7, measurements were conducted on the probe station. Various measurements were conducted in both frequency and time domains. After verifying the effectiveness of the dispersion analysis, more structures were designed, as outlined in Section 4. interposer test vehicles. As can be seen from Figure 7, measurements were conducted on the probe station. Various measurements were conducted in both frequency and time domains. After verifying the effectiveness of the dispersion analysis, more structures were designed, as outlined in Section 4.

The Type B structure shown in Figure 6b is simple compared to Figure 6a. The

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*Micromachines* **2022**, *13*, x FOR PEER REVIEW 11 of 20

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Basically, the derivation process of (17) and (19) is identical because they are both single via confined in the unit cell. Therefore, the two equations are similar. In (19) and (20), the tapered structure of the TGV is reflected. If the length of the TGV is very short and it is not tapered, the integral calculation in (19) can be simplified as in (17). The derived parameters can be inserted into the proposed dispersion analysis explained in the

In Figure 7, fabricated glass interposer test vehicles are shown. Metal patches generating *C*, through-glass via (TGV), and planes are shown. Optical microscope and scanning electron microscope (SEM) were used to take images of various structures inside the glass

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**Figure 7. Figure 7.** Measurement of fabricated glas Measurement of fabricated glass interposer test vehicles. s interposer test vehicles.

## *3.2. Verification by Measurement and EM Simulation*

Measured power/ground noise couplings (*S*21) are plotted and compared in Figure 8. Two microprobes (Picoprobe GS type with 250 µm pitch, GGB industries Inc., Naples, FL, USA), two coaxial cables (W.L. Gore & Associates, Inc., Newark, DE, USA), and a calibration kit (CS-14, GGB industries Inc., Naples, FL, USA) were used to measure power/ground noise couplings. A vector network analyzer (VNA) (N5230A, Keysight, Santa Rosa, CA, USA) was used to measure the couplings in the PDN and validate the noise suppression band in the frequency domain up to 20 GHz. As a reference, a PDN without noise suppression structures was also measured. The distance between the two measurement ports (port 1 and port 2 shown in Figure 6c,d) was approximately 15.5 mm (≈5 × *W*u). In such cases, it is difficult to suppress the generated noise in the PDN due to low-loss substrate and polymer build-up layer. By adopting the proposed structures (Types A and B), −40 dB noise suppression bands were generated. In these frequency bands, the power/ground noise will be significantly attenuated and isolated.

Due to the double patches and paired through vias, the Type A structure had much larger lumped capacitance (*C*) than the Type B structure. The total lumped inductance (*L*) of the Type A structure was 130.80 pH, whereas it was 89.65 pH for the Type B structure. As can be seen from (8), the Type A structure had a lower *f*<sup>L</sup> compared to Type B due to larger capacitance. With larger *C*, the noise suppression band can be expanded by lowering *f*L. However, the Type A structure had larger *L* compared to the Type B structure, which also lowered *f*H. To achieve wider noise suppression band, higher *f*<sup>H</sup> is desired. In the following section, the impacts of various design parameters and material properties on the noise suppression band is analyzed. A design direction to achieve wider noise suppression band is also given.

bands, the power/ground noise will be significantly attenuated and isolated.

Measured power/ground noise couplings (*S*21) are plotted and compared in Figure 8. Two microprobes (Picoprobe GS type with 250 μm pitch, GGB industries Inc., Naples, FL, USA), two coaxial cables (W.L. Gore & Associates, Inc., Newark, DE, USA), and a calibration kit (CS-14, GGB industries Inc., Naples, FL, USA) were used to measure power/ground noise couplings. A vector network analyzer (VNA) (N5230A, Keysight, Santa Rosa, CA, USA) was used to measure the couplings in the PDN and validate the noise suppression band in the frequency domain up to 20 GHz. As a reference, a PDN without noise suppression structures was also measured. The distance between the two measurement ports (port 1 and port 2 shown in Figure 6c,d) was approximately 15.5 mm (ൎ5 × *W*u). In such cases, it is difficult to suppress the generated noise in the PDN due to low-loss substrate and polymer build-up layer. By adopting the proposed structures (Types A and B), −40 dB noise suppression bands were generated. In these frequency

*3.2. Verification by Measurement and EM Simulation* 

**Figure 8.** Comparison of the measured power/ground noise couplings (*S*21) in the PDN. **Figure 8.** Comparison of the measured power/ground noise couplings (*S*21) in the PDN.

Due to the double patches and paired through vias, the Type A structure had much larger lumped capacitance (*C*) than the Type B structure. The total lumped inductance (*L*) of the Type A structure was 130.80 pH, whereas it was 89.65 pH for the Type B structure. As can be seen from (8), the Type A structure had a lower ݂ compared to Type B due to larger capacitance. With larger *C*, the noise suppression band can be expanded by lowering ݂. However, the Type A structure had larger *L* compared to the Type B structure, which also lowered ݂ୌ. To achieve wider noise suppression band, higher ݂ୌ is desired. In the following section, the impacts of various design parameters and material properties on the noise suppression band is analyzed. A design direction to achieve wider noise suppression band is also given. In Figure 9, the measurement results are compared with simulated results. Using the In Figure 9, the measurement results are compared with simulated results. Using the 3-D EM simulator Ansys high-frequency structure simulator (HFSS) (version 2020 R2), noise coupling (*S*21) of each structure was estimated and compared. The measurement and simulation results showed good agreement up to 20 GHz in the frequency domain for both structures. To verify the proposed dispersion analysis, estimated stopband edges (*f*<sup>L</sup> and *f*U) were compared with the simulated and measured edges. In Table 3, edges obtained by different methods are summarized and compared. The estimated edges showed good correlation with the simulated and measured edges. The accuracy of the proposed dispersion analysis for stopband edge estimation was verified. When fabricating the glass interposer test vehicles, the diameter of the TGV showed process variations associated with substrate drilling and copper plating. If the process becomes more mature, more accurate results are expected. *Micromachines* **2022**, *13*, x FOR PEER REVIEW 13 of 20 interposer test vehicles, the diameter of the TGV showed process variations associated with substrate drilling and copper plating. If the process becomes more mature, more accurate results are expected.

**Figure 9.** Measured power/ground noise couplings are compared with simulated results. structures on power/ground noise suppression and decoupling. **Figure 9.** Measured power/ground noise couplings are compared with simulated results.

**Table 3.** Summary and comparison of measured, simulated, and estimated stopband edges.

݂ 8.91 GHz 8.75 GHz

݂ 5.82 GHz 5.50 GHz

݂ 9.66 GHz 9.75 GHz

Compared to 3-D EM simulation, the proposed method required less time and computational resources to estimate the stopband edges. When designing the structure, the proposed dispersion analysis could effectively estimate the stopband considering the design rules and target noise band. After preliminary analysis, the structure could be designed in the 3-D EM simulator for further analysis and validation before tape-out.

In this section, design directions are discussed based on the proposed dispersion analysis. The impacts of various design parameters and material properties are considered. Some candidates are chosen, and noise stopbands are estimated. Additional measurements and 3-D EM simulations are conducted to verify the impacts of the proposed

**(Error)** 

(1.00%)

(1.83%)

(5.49%)

(0.93%)

**Estimation (Error)** 

2.51 GHz (0.04%)

8.59 GHz (3.61%)

5.87 GHz (0.86%)

10.4 GHz (7.66%)

Type A

Type B

**Low-Loss Materials** 

**Structures Edges Measurement Simulation** 

**4. Design and Analysis of Noise Suppression Structures with Various** 


**Table 3.** Summary and comparison of measured, simulated, and estimated stopband edges.

Compared to 3-D EM simulation, the proposed method required less time and computational resources to estimate the stopband edges. When designing the structure, the proposed dispersion analysis could effectively estimate the stopband considering the design rules and target noise band. After preliminary analysis, the structure could be designed in the 3-D EM simulator for further analysis and validation before tape-out.

#### **4. Design and Analysis of Noise Suppression Structures with Various Low-Loss Materials**

In this section, design directions are discussed based on the proposed dispersion analysis. The impacts of various design parameters and material properties are considered. Some candidates are chosen, and noise stopbands are estimated. Additional measurements and 3-D EM simulations are conducted to verify the impacts of the proposed structures on power/ground noise suppression and decoupling.

#### *4.1. Noise Suppression Band Formulation with Various Materials*

In general, broadband noise suppression is desired to cover various applications. To achieve broadband, the lower stopband edge (*f*L) should be designed toward lower frequency. At the same time, the upper stopband edge (*f*U) should be formed at higher frequency. Design parameters and material have significant impacts, but not all of them can be realized and adopted. It can be limited by process design rules or have a conflict with usages of advanced packages and interposers. In Table 4, the stopband expansion method by changing design parameters and impacts is summarized.


**Table 4.** Stopband expansion method by changing design parameters and impacts.

By analyzing the proposed dispersion equations, the impacts of design parameters can be easily determined. As can be seen from (8), increasing lumped capacitance (*C*), inductance (*L*), and PDN thickness will lower *f*L. Adopting build-up materials with high permittivity can increase *C.* At the same time, selecting thinner build-up materials will have the same impact. However, using larger structures can increase the overall *x–y* dimensions of the packages/interposers. The *x–y* dimensions directly affect the overall fabrication yield, so this design direction is not desired. Moreover, a design direction that increases

the PDN thickness should be avoided. Adding defects in power/ground planes increases *L* [31]. In terms of power integrity, this can be a good solution. However, adding defects can cause return current discontinuity issues. If such a design is adopted, routings, fan-out, and signal integrity analysis should be carefully conducted as well.

The diameter of the through-substrate via affects both stopband edges, so it is highlighted in Table 4. When the diameter is altered, RHS of (10) is affected more dramatically, which is inversely proportional to *<sup>L</sup>*, whereas (8) is inversely proportional to <sup>√</sup> *L*. Moreover, the diameter of the through substrate is heavily determined by the process design rule. It is difficult to freely modify the diameter when designing packages/interposers. It is more realistic to adopt parallel through via scheme than changing the diameter to achieve lower *L.* A design that can achieve higher characteristic impedance (*Z*0,PDN) shifts RSH of (10) and can formulate *f*<sup>U</sup> at higher frequency. However, compared to other parameters, changing *Z*0,PDN is not easy as it will have multiple impacts. The easiest method is increasing the PDN thickness, but this direction is not desired in advanced packages/interposers.

In Figure 10, dispersion diagrams with design parameters and material properties are plotted for comparison. For fare comparison, the normalized value in radian (*βxW*u) is plotted instead of the propagation constant (*βx*). Fundamental bandgaps are formed in the bands where *βxW*<sup>u</sup> does not exist. High-*K* material alumina can be embedded in polymer build-up layers of glass packages and interposers to increase *C* [40]. Moreover, ultrathin and high-*K* materials, such as FaradFlex substrate, can be embedded in the build-up layers of packages [18]. These materials can also be used for miniaturization of structures instead of increasing *C*. By adopting parallel trough via arrays, the suppression band is expanded toward higher frequency. *Micromachines* **2022**, *13*, x FOR PEER REVIEW 15 of 20 up layers of packages [18]. These materials can also be used for miniaturization of structures instead of increasing *C*. By adopting parallel trough via arrays, the suppression band is expanded toward higher frequency.

**Figure 10.** Dispersion diagrams for comparison. The impact of each parameter on stopband edge is **Figure 10.** Dispersion diagrams for comparison. The impact of each parameter on stopband edge is also marked.

In the following subsection, additional results obtained by measurement and 3-D EM/circuit simulations are provided. The impacts of noise suppression/isolation are In the following subsection, additional results obtained by measurement and 3-D EM/circuit simulations are provided. The impacts of noise suppression/isolation are graphically delivered in the time domain.

In Figure 11, measured power/ground noise coupling results are plotted and com-

were used to conduct measurements in the time domain. The Type B structure explained in Section 3 was used for the experiment. Twelve gigabits per second (GB/s) clock signal (0 to 1 V, 30 ps rise-and-fall time and all ports terminated with 50 ohm) was injected to the interposer PDN (port 1 in Figure 6d) as a noise source. Frequency band of the injected noise existed in the suppression band of the Type B structure. From the noise source to the measurement location in the PDN (port 2 in Figure 6d), five unit structures existed, and the distance was approximately 15.5 mm. Without the noise suppression structure, 142 mV peak-to-peak voltage (*V*pp) was measured, which corresponded to 14.2% of the input voltage. When the proposed noise suppression structure was fabricated in the PDN, 51 mV *V*pp was observed. Significant noise suppression/isolation was achieved by adopt-

*4.2. Impacts of Power/Ground Noise Decoupling Using the Proposed Structures* 

graphically delivered in the time domain.

ing the proposed structure.

also marked.

## *4.2. Impacts of Power/Ground Noise Decoupling Using the Proposed Structures*

In Figure 11, measured power/ground noise coupling results are plotted and compared in the time domain. A pulse-pattern generator (PPG) (Anritsu MP-1763C, Atsugi, Japan) and a digital sampling oscilloscope (Tektronix TDS800B, Beaverton, OR, USA) were used to conduct measurements in the time domain. The Type B structure explained in Section 3 was used for the experiment. Twelve gigabits per second (GB/s) clock signal (0 to 1 V, 30 ps rise-and-fall time and all ports terminated with 50 ohm) was injected to the interposer PDN (port 1 in Figure 6d) as a noise source. Frequency band of the injected noise existed in the suppression band of the Type B structure. From the noise source to the measurement location in the PDN (port 2 in Figure 6d), five unit structures existed, and the distance was approximately 15.5 mm. Without the noise suppression structure, 142 mV peak-to-peak voltage (*V*pp) was measured, which corresponded to 14.2% of the input voltage. When the proposed noise suppression structure was fabricated in the PDN, 51 mV *V*pp was observed. Significant noise suppression/isolation was achieved by adopting the proposed structure. *Micromachines* **2022**, *13*, x FOR PEER REVIEW 16 of 20

**Figure 11.** Comparison of the measured power/ground noise coupling results in the time domain without and with the noise suppression structure (Type B). By adopting the proposed structure, power/ground noise was significantly suppressed in the interposer with low-loss substrate. **Figure 11.** Comparison of the measured power/ground noise coupling results in the time domain without and with the noise suppression structure (Type B). By adopting the proposed structure, power/ground noise was significantly suppressed in the interposer with low-loss substrate.

Additional 3-D EM/circuit simulations were conducted to verify the effectiveness of the proposed structure. In this study, eye diagrams of the through-substrate (glass or FaradFlex) via channel under the influence of power/ground noise coupling were simulated and compared. The through-substrate via channel (victim) was designed to penetrate the PDN, and the noise source was located far away from the victim. In this scenario, the noise induced in the PDN propagates without attenuation, couples to the victim channel, and degrades SI of the victim channel (PDN-induced crosstalk). This scenario is likely to happen as there are thousands of signal through-substrate vias escaping packages or interposers, such as SerDes. Pseudo-random binary sequence (PRBS) of 28−1, 0 V to 1.2 V, with rise-and-fall time of 30 ps and data rate (DR) of 2 GB/s was injected to the victim channel. The total length of the victim channel was designed to be approximately 14 mm, including the through via, microvia, interposer channel, and PCB channel located under the package. At the receiving location of the victim channel where eye diagrams were monitored, a capacitive termination was applied. This simulation scenario was graphically depicted in Figure 12. Additional 3-D EM/circuit simulations were conducted to verify the effectiveness of the proposed structure. In this study, eye diagrams of the through-substrate (glass or FaradFlex) via channel under the influence of power/ground noise coupling were simulated and compared. The through-substrate via channel (victim) was designed to penetrate the PDN, and the noise source was located far away from the victim. In this scenario, the noise induced in the PDN propagates without attenuation, couples to the victim channel, and degrades SI of the victim channel (PDN-induced crosstalk). This scenario is likely to happen as there are thousands of signal through-substrate vias escaping packages or interposers, such as SerDes. Pseudo-random binary sequence (PRBS) of 2<sup>8</sup> <sup>−</sup> 1, 0 V to 1.2 V, with rise-and-fall time of 30 ps and data rate (DR) of 2 GB/s was injected to the victim channel. The total length of the victim channel was designed to be approximately 14 mm, including the through via, microvia, interposer channel, and PCB channel located under the package. At the receiving location of the victim channel where eye diagrams were monitored, a capacitive termination was applied. This simulation scenario was graphically depicted in Figure 12.

In Figure 13, eye diagrams of the victim channel are plotted and compared without and with the proposed structure. In Figure 13, the Type B structure is used as a representative. In Table 5, additional results are also summarized for other structures, and eye-

three cases, eye diagrams of the through-substrate via channel were improved by adopting the proposed structures. Low-loss substrates for packages and interposers provide various advantages. However, power/ground noise must be isolated and suppressed. In this study, noise suppression was conducted by designing various structures in the PDN. The structures were analyzed and determined by the proposed dispersion analysis. Compared to full 3-D EM simulations, the proposed dispersion analysis is fast and requires smaller computational resources. Therefore, the proposed dispersion analysis is useful at

the preliminary PDN design stage.

**Figure 12.** Graphical depiction of the simulation scenario. Aggressor channel escaping the package or interposer induces noise in the PDN. The noise propagates and couples to the victim channel. Eye diagrams of the victim channel are compared without and with noise suppression structures. **Figure 12.** Graphical depiction of the simulation scenario. Aggressor channel escaping the package or interposer induces noise in the PDN. The noise propagates and couples to the victim channel. Eye diagrams of the victim channel are compared without and with noise suppression structures.

In Figure 13, eye diagrams of the victim channel are plotted and compared without and with the proposed structure. In Figure 13, the Type B structure is used as a representative. In Table 5, additional results are also summarized for other structures, and eye-opening voltage, jitter, and maximum *V*pp noise at logics zero/one are compared. For all three cases, eye diagrams of the through-substrate via channel were improved by adopting the proposed structures. Low-loss substrates for packages and interposers provide various advantages. However, power/ground noise must be isolated and suppressed. In this study, noise suppression was conducted by designing various structures in the PDN. The structures were analyzed and determined by the proposed dispersion analysis. Compared to full 3-D EM simulations, the proposed dispersion analysis is fast and requires smaller computational resources. Therefore, the proposed dispersion analysis is useful at the preliminary PDN design stage. **Figure 12.** Graphical depiction of the simulation scenario. Aggressor channel escaping the package or interposer induces noise in the PDN. The noise propagates and couples to the victim channel. Eye diagrams of the victim channel are compared without and with noise suppression structures.

FaradFlex based (Figure 10) 1.05 V → 1.11 V 21 ps (4.2) →<sup>13</sup> ps (2.6) 70 mV <sup>→</sup> <sup>39</sup> mV **Figure 13.** Verifications of the impacts of the proposed structure by eye diagram simulations. By adopting the proposed structure, power/ground noise coupling from the PDN to through-substrate via channel was suppressed. (**a**) P/G planes only. (**b**) embedded Type B structure. **Figure 13.** Verifications of the impacts of the proposed structure by eye diagram simulations. By adopting the proposed structure, power/ground noise coupling from the PDN to through-substrate via channel was suppressed. (**a**) P/G planes only. (**b**) embedded Type B structure.

**Table 5.** Summary of the eye diagram improvement by adopting the proposed structures.

Type A 784 mV → 838 mV 36.5 ps (7.1)<sup>→</sup>

Type B (Figure 13) 1.08 V → 1.15 V 18 ps (3.6) → 7 ps

In this study, dispersion analysis was proposed to efficiently design power/ground noise suppression structures for packages and interposers with low-loss substrates. The mechanism of noise suppression/isolation was thoroughly explained based on the proposed dispersion analysis. By conducting the proposed dispersion analysis, the impacts on physical design parameters and material properties on the suppression band could be

In this study, dispersion analysis was proposed to efficiently design power/ground noise suppression structures for packages and interposers with low-loss substrates. The mechanism of noise suppression/isolation was thoroughly explained based on the proposed dispersion analysis. By conducting the proposed dispersion analysis, the impacts on physical design parameters and material properties on the suppression band could be

**Voltage Jitter (% of UI) P/G Noise at 0 or 1** 

22.2 ps (4.4) 60 mV → 19 mV

(1.4) 62 mV <sup>→</sup> <sup>36</sup> mV

ps (2.6) 70 mV <sup>→</sup> <sup>39</sup> mV

**Structures Eye-Opening** 

**5. Conclusions** 

**5. Conclusions** 


**Table 5.** Summary of the eye diagram improvement by adopting the proposed structures.

#### **5. Conclusions**

In this study, dispersion analysis was proposed to efficiently design power/ground noise suppression structures for packages and interposers with low-loss substrates. The mechanism of noise suppression/isolation was thoroughly explained based on the proposed dispersion analysis. By conducting the proposed dispersion analysis, the impacts on physical design parameters and material properties on the suppression band could be easily explained. To validate the proposed dispersion analysis, noise suppression structures were designed and fabricated in the glass interposer PDN and measured. It was verified that *f*<sup>L</sup> and *f*<sup>U</sup> estimated based on the proposed analysis method showed good agreement with those acquired from experiments and simulations. Compared to EM simulation, the proposed method required smaller computational resources but showed good accuracy. Various structures were designed and analyzed based on the proposed dispersion analysis. The effectiveness of the proposed structures was further validated by additional experiments and simulations in the time domain. The proposed structures suppressed power/ground noise propagation and coupling.

Low-loss substrates for packages and interposers provide various advantages, especially for high-speed signaling. However, power/ground noise must be isolated and suppressed. To solve issues, this article proposed an efficient dispersion analysis method, fabricated the noise suppression structures, and applied the structures. The proposed structures have minimal impacts on the channel routing, fan-out, and return current path. However, the structures proposed in this article require additional metal layers. These designs increase the fabrication cost. Even though they provide promising solutions toward power/ground noise issues with minimal impacts on channel properties and designs, more cost-effective designs are desired in the near future. Because the proposed dispersion analysis can be expanded to various designs, such as defects in the plane, development of a new structure based on the proposed method without increasing the number of metal layer remains the subject of work for the near future.

**Funding:** This work was supported in part by JSPS KAKENHI Grant Number 20K14719 and in part by JSPS KAKENHI Grant Number 22K14241. In addition, this work was supported in part by the MKE through the International Collaborative Research and Development Program "Glass interposer based RF FEM for Next Generation Mobile Smart Phone" under Grant N0000899.

**Conflicts of Interest:** The author declares no conflict of interest.

## **References**

