*3.2. Freewheeling Period (t<sup>1</sup>* − *Tsw/2)*

The diodes are turned off naturally when *iLm* and *iLs* are equal at the completion of the first interval, and thus the secondary side no longer receives the primary side energy. Now, *L<sup>m</sup>* is not fixed to the output voltage; it begins to resonate with the series *L<sup>s</sup>* and *C<sup>s</sup>* , enabling the series resonant current to pass through it. Therefore, there is a shifting of resonant frequency from *ω<sup>r</sup>* to *ωr*1. This mode's differential equations are as follows:

$$V\_l = L\_s \frac{di\_{Ls}(t)}{dt} + v\_{\mathbb{C}s}(t) + v\_{Lm}(t) \tag{14}$$

$$i\_{Ls}(t) = \mathcal{C}\_s \frac{dv\_{Cs}(t)}{dt} \tag{15}$$

$$w\_{Lm}(t) = L\_m \frac{di\_{Lm}(t)}{dt} \tag{16}$$

Solving the above equations, we get

$$i\_{\rm Ls}(t) = i\_{\rm Ls}(t\_1) \cos[\omega\_{\rm I1}(t - t\_1)] - \frac{v\_{\rm Cs}(t\_1)}{Z\_1} \sin[\omega\_{\rm I1}(t - t\_1)] + \frac{V\_{\rm I}}{Z\_1} \sin[\omega\_{\rm I1}(t - t\_1)] \tag{17}$$

$$v\_{\mathbb{C}s}(t) = Z\_1 i\_{Ls}(t\_1) \sin[\omega\_{r1}(t - t\_1)] + v\_{\mathbb{C}s}(t\_1) \cos[\omega\_{r1}(t - t\_1)] + V\_i[1 - \cos(\omega\_{r1}(t - t\_1))] \tag{18}$$

$$i\_{Ls}(t) = i\_{Lm}(t) \tag{19}$$

The transfer of energy only occurs between 0 and *t*1, where *t*<sup>1</sup> alters on *t<sup>d</sup>* . As a result, *t<sup>d</sup>* cannot be considered as a fixed value when computing the starting current, or the voltage values and the voltage gain, for LLC-RC since it changes depending on the load circumstances. Closed-form expressions would not apply to all loading scenarios. Therefore, for an exact TDA, starting values of capacitor voltage, resonant current, and voltage gain are proven to be implicit functions of *t<sup>d</sup>* and *ω*. Thus, the average output current may be expressed as follows:

$$I\_0 = \frac{2}{T\_{sw}} \int\_0^{t\_1} (i\_{Ls}(t) - i\_{Lm}(t))dt\tag{20}$$

$$I\_0 = \frac{2}{T\_{\rm sp}\omega\_r} \left[ i\_{Ls}(0)\sin(\omega\_l t\_1) + \left[ \frac{V\_l - \frac{v\_0}{\hbar} - v\_{\rm cs}(0)}{z\_0} \right] (1 - \cos(\omega\_l t\_1)) - \frac{V\_0\omega\_r^2}{m\omega\_r L\_m} \frac{t\_1^2}{2} - i\_{Lm}(0)\omega\_l t\_1 \right] \tag{21}$$

The steady-state waveforms exhibit anti-half-wave symmetry. Therefore, the evaluation may be conducted for half a switching cycle using the resulting circumstances:

$$i\_{Ls}(0) = i\_{Lm}(0) = -i\_{Ls} \left(\frac{T\_{sW}}{2}\right) \tag{22}$$

$$v\_{\mathbb{C}s}(0) = -v\_{\mathbb{C}s}\left(\frac{T\_{\mathbb{s}W}}{2}\right) \tag{23}$$

$$i\_{Ls}(t\_1) = i\_{Lm}(t\_1) \tag{24}$$

Equations to evaluate the resonant capacitor voltage, *vCs*(0), initial series resonant current, *iLs*(0), and voltage gain are obtained by a reduction of the resultant set of equations. As a consequence, the resultant equations can be written in the following form:

$$i\_{Ls}(0) = -V\_i \alpha\_1 + nGV\_i \beta\_1 \tag{25}$$

$$
v\_{\mathbb{C}s}(0) = -V\_{\text{i}}\mathbb{a}\_2 + nGV\_{\text{i}}\beta\_2\tag{26}$$

where

$$\alpha\_1 = \frac{2(Z\_1 \sin(\mathfrak{x}) \cos(\mathfrak{y}) + Z\_0 \cos(\mathfrak{x}) \sin(\mathfrak{y})}{L} \tag{27}$$

$$\beta\_1 = \frac{Z\_1 \sin(\mathbf{x}) \cos(\mathbf{y}) + Z\_0 \cos(\mathbf{x}) \sin(\mathbf{y}) + Z\_1 \sin(\mathbf{x}) - Z\_0 \sin(\mathbf{y})}{L} \tag{28}$$

$$\alpha\_2 = \frac{\sin(x)\sin(y)\left(Z\_1^2 - Z\_0^2\right)}{L} \tag{29}$$

$$\beta\_2 = \frac{Z\_1^2 \sin(\mathfrak{x}) \sin(y) - Z\_1 Z\_0 (1 - \cos(\mathfrak{x}) - \cos(y))}{L} \tag{30}$$

$$\mathbf{L} = 2Z\_1 Z\_0 + 2Z\_1 Z\_0 \cos(\mathbf{x}) \cos(\mathbf{y}) - \sin(\mathbf{x}) \sin(\mathbf{y}) \left( Z\_1^2 + Z\_0^2 \right) \tag{31}$$

$$
\omega = \frac{\omega\_r}{\omega\_{sw}} t\_d \pi \tag{32}
$$

$$y = \frac{\omega\_{r1}}{\omega\_{sv}}(1 - t\_d)\pi \tag{33}$$

Therefore, for the DCM boost operating mode, the voltage gain, *G*, is expressed as follows:

$$G = \frac{V\_0}{nV\_i} = \frac{\left[\sin(\mathbf{x}) + a\_1 Z\_0 (1 - \cos(\mathbf{x})) + a\_2 \sin(\mathbf{x})\right]}{\left[t\_d \frac{\text{TswZ}\_0}{2 \text{ L}\_w} + \sin(\mathbf{x}) + \beta\_2 \sin(\mathbf{x}) + \beta\_1 Z\_0 (1 - \cos(\mathbf{x}))\right]} \tag{34}$$

The negative current of *iLs*(0) is the turn-off current because of the anti-half wave symmetry of the steady state waveforms, as illustrated in (22). To simplify the equation, we may replace (32) and (33) in (21) to obtain the following value of the average output current:

$$I\_0 = \left[ A\_1(\sin(\mathbf{x})) + B\_1(1 - \cos(\mathbf{x})) - \frac{nGV\_i\mathbf{x}^2}{2\omega\_r L\_m} - i\_{\rm Cs}(0)\mathbf{x} \right] \frac{\omega}{\pi} \tag{35}$$

where

$$A\_1 = i\_{Ls}(0)\tag{36}$$

$$B\_1 = \frac{[V\_i - nGV\_i - v\_{Cs}(0)]}{Z\_0} \tag{37}$$

The equivalent AC load can be calculated by using the above expression of average output voltage:

$$V\_o = I\_o R\_{load} \tag{38}$$

$$R\_{load} = \frac{V\_0}{\left[A\_1 \sin(\mathbf{x}) + B\_1(1 - \cos(\mathbf{x})) - \frac{G}{2\omega\_r Lm} - i\_{\mathbb{C}s}(0)\mathbf{x}\right] \frac{\omega}{\pi}}\tag{39}$$

In DCM, *Rload* is reliant on *t<sup>d</sup>* and *ω*, which is given in the expression (39). In contrast to the usual equation given by *Rac*= 8 *<sup>π</sup>*<sup>2</sup> *Req*, this is applicable for the continuous conduction mode of operation, i.e., in the above resonance operation. The equation used to determine the ZVS angle is

$$\phi = \frac{\pi}{\omega} \tan^{-1} \left( \frac{-A\_1}{B\_1} \right) \tag{40}$$

The resonant tank inductor current's RMS value is given by

$$i\_{Ls-RMS} = \sqrt{\frac{\pi}{\omega} \left( I\_{RMS-P} + I\_{RMS-O} \sqrt{\frac{L\_S + L\_m}{L\_S}} \right)}\tag{41}$$

where

$$I\_{RMS\\_P} = \left(A\_1^2 + B\_1^2\right) \left[\frac{\chi}{2} - \frac{1}{4} \left\{ \sin \left[2\left(\chi + \tan^{-1}\left(\frac{A\_1}{B\_1}\right)\right) \right] + \sin \left[2\tan^{-1}\left(\frac{A\_1}{B\_1}\right) \right] \right\} \right] \tag{42}$$

$$I\_{RMS\\_O} = \left(A\_2^2 + B\_2^2\right) \left[\frac{y}{2} - \frac{1}{4} \left\{ \sin\left[2\left(y + \tan^{-1}\left(\frac{A\_2}{B\_2}\right)\right)\right] + \sin\left[2\tan^{-1}\left(\frac{A\_2}{B\_2}\right)\right] \right\} \right] \tag{43}$$

*IRMS*−*<sup>P</sup>* and *IRMS*−*<sup>O</sup>* are the RMS currents for the modes *P* and *O*, respectively. Mode *O* variables are defined as follows:

$$A\_2 = i\_{Ls}(t\_1) \tag{44}$$

$$B\_2 = \frac{V\_i - v\_{Cs}(t\_1)}{Z\_1} \tag{45}$$

#### **4. Complete Step-by-Step Design of an LLC-RC**

In this section, the design of an LLC-RC is explained in detail. The following are the primary design steps:


• Determine the resonant components.

Table 1 summarizes the system requirements for a typical LLC-RC application.

**Table 1.** System Specifications.


Step 1: Determine the ratio of transformer turns

The maximum and minimum DC gain requirements for the resonant LLC tank may be derived using the transformer turns ratio.

The *nsp* (secondary to primary transformer turns ratio) should be calculated as follows:

$$m\_{sp} = \frac{V\_{0\\_max} + V\_{0\\_min}}{\left(2 \ast \ V\_{in\\_nom}\right)} = 1.7143\tag{46}$$

A well-balanced resonant LLC converter's functioning at low circulating current and at frequencies below and above the resonance is ensured by this method of calculating *nsp*. In addition, the resonant tank's buck and boost areas are both covered by unity gain at the resonant frequency.

Step 2: Determine the amount of DC gain required

The required minimum and maximum values of DC gain are calculated as shown below:

$$G\_{dc\text{\textquotedblleft}min} = \frac{V\_{0\text{\textquotedblleft}min}}{V\_{in\text{\textquotedblleft}max} \* \eta\_{sp}} = 0.874\tag{47}$$

$$G\_{dc\\_max} = \frac{V\_{0\\_max}}{V\_{in\\_min} \* n\_{sp}} = 1.666\tag{48}$$

The DC gain range of 0.87 to 1.7 is chosen for overloading and other realistic parasitics. Step 3: Select Q and K

From the gain vs quality factor curves and normalized frequency vs gain curves as shown in Figures 4 and 5, Q and K are selected as 0.3 and 5, respectively.

Step 4: Determine the resonant components

$$L\_S = \frac{\left(Q \ast R\_{0-rated} \text{pri}\right)}{\left(2 \ast \pi \ast f\_r\right)} = 0.0468 \,\upmu\text{H} \tag{49}$$

$$C\_s = \frac{1}{\left(2 \ast \pi \ast f\_r \ast Q \ast R\_{0-rated}\right)} = 54.134 \,\upmu\text{F} \tag{50}$$

$$L\_m = K \ast L\_s = 0.23396 \,\upmu\text{H} \tag{51}$$

where

$$R\_{0\text{-}ratedpri} = \frac{R\_{0\text{-}rated}}{n\_{sp}} \tag{52}$$

Table 2 shows the different values of minimum and maximum gains, normalized frequencies, switching frequencies, resonant frequency, RMS, and peak currents of switch, average, and peak currents of the diode, as well as stress on the capacitor at different set of K values with the same quality factor. From the table below, it is observed that values of Q = 0.3 and K = 5 contribute to a narrow range of frequency deviation, low turn-off current, and low circulating currents compared to other conditions. Low-voltage stress on

the resonant capacitance and higher power density owing to the smaller size of resonant capacitance and overall magnetics are also ensured by this combination of components.

**Figure 4.** Plots of quality factor and DC voltage gain with different values of K.

**Figure 5.** Plots of normalized switching frequency and DC voltage gain with different values of Q.

*Energies* **2022**, *15*, 3634

**Table 2.** Design candidates.


#### *Loss Examination of LLC-RC*

By turning on the primary power MOSFETs with ZVS and turning off the secondary rectifier diodes with ZCS, the LLC-RC reduces the overall switching loss. The losses for MOSFET are conduction, turn-off, and driving losses. The losses for the diode are conduction losses. Core and copper losses are transformer losses. Table 3 summarizes the different component losses and their associated calculations [29,30].

**Table 3.** Loss analysis for LLC-RC.


#### **5. Simulation and Experimental Results**

#### *5.1. Simulation Results*

Figure 6 shows the simulation results for the LLC-RC at minimum input voltage with the optimum design values. *VS*<sup>1</sup> and *iS*<sup>1</sup> indicate that the voltage across the switch and current through the switch at rated power when the input voltage equals 24 V. *isec* is the secondary current flowing through the rectifier diodes. With the optimum designed values, the output voltage *V*<sup>0</sup> of the converter is regulated at 48 V. It is clearly observed that the converter is functioning in PO mode. The currents *iLm* and *iLs* share the same starting currents at the beginning of the stage P. After that, they separate in various wave shapes. As *L<sup>m</sup>* is confined to +*Vo*/n, *iLm* expands linearly, whereas *iLs* changes sinusoidally, since *L<sup>s</sup>* and *C<sup>s</sup>* are in resonance. Both the secondary rectifier diodes are switched off when *iLm* and *iLs* intersects at the end of stage P, and then the LLC-RC advances to stage O. In addition to that, *iS*<sup>1</sup> lags behind *VS*<sup>1</sup> , which indicates that the input impedance is inductive and the ZVS operation for primary switches is achieved. Furthermore, *isec* drops to zero well before the relevant rectifier turn-off signal arrives, ensuring that the rectifier diodes does not suffer from reverse recovery issues and is able to operate in ZCS mode.

Figure 7 shows the simulation waveforms of the gate driver signal (*Vgs*) and drainsource voltage (*Vds*) of the switch *S*1. The worst situation for the ZVS operation of the converter is when the input voltage hits the minimum value and the output power reaches the maximum value. It is observed that the *Vds* is completely zero before the *Vgs* is turned on. Therefore, for the whole operating range, ZVS operation is achieved.

#### *5.2. Experimental Results*

The proposed model of LLC-RC is verified using HIL simulator OP5700, RT-LAB, programmable control board (PCB-E06-0560), MSOx3014T, and probes. The PCB is used to communicate between both the simulation and real controller using analog outputs and digital inputs. The configuration of the real-time implementation setup is depicted in Figure 8. HIL systems are frequently utilized for real-time simulations of engineering systems before implementing the prototyping tests. Stacks are capable of rapidly creating and synchronizing prototypes. The plant and controller are placed in OPAL-RT to enable the system to operate at real-time clock speeds. This process can be considered as a real-time system simulation due to high-speed nanosecond to microsecond OPAL-RT sampling rate. The user's PC is used to execute the RT-digital LAB's simulator commands. RT-LAB is used to edit, build, load, and execute the prototype. The requirements and specifications of the HIL stack are given in Table 4. The circuit parameters pertaining to various components are shown in Table 5.

**Figure 6.** Simulations waveforms at minimum input voltage.

**Figure 7.** Simulation waveforms of the gate driver signal (*Vgs*) and drain-source voltage (*Vds*).

**Figure 8.** HIL experimental setup for the LLC-RC.

**Table 4.** Hardware-in-loop (HIL) system specifications.


**Table 5.** Parameters pertaining to various circuit components.


Figure 9 shows the implementation method of HIL testing. It consists of an OPAL-RT real-time HIL simulator, ethernet switch, ethernet cable, and desktop computer for the graphical user interface (GUI). The RT-LAB software for OPAL-RT is used in HIL testing. The ethernet cable is connected between the ethernet switch of OPAL-RT and desktop computer for the GUI.

**Figure 9.** The HIL testing setup.

Figure 10 shows the experimental results of the LLC-RC at the worst operating point; i.e., at minimum input voltage with rated power. From the results, it is observed that the converter is operating in PO mode with a switching frequency of 77 KHz—a small deviation from theoretical 78 KHz because of parasitics of the converter. In addition, *iS*<sup>1</sup> lags behind the *VS*<sup>1</sup> in the entire operating range, which indicates that the input impedance is inductive and the ZVS action for primary switches is realized. The secondary current *isec* operates in discontinuous conduction mode; therefore, the secondary rectifier diodes achieve ZCS operation.

**Figure 10.** Experimental waveforms of *VS*<sup>1</sup> and *IS*<sup>1</sup> , *V*<sup>0</sup> and *Isec* at minimum input voltage with rated power.

To verify the primary switches' ZVS functionality, an experimental waveform of the *Vgs* and *Vds* of switch *S*<sup>1</sup> is shown in Figure 11. It is observed that the *Vds* is completely zero before the *Vgs* is turned on. Therefore, for the whole operating range, ZVS operation is achieved.

**Figure 11.** Experimental waveforms of the *Vgs* and *Vds* showing ZVS operation under the worst condition.

Figure 12 shows the efficiency curve of the LLC-RC at minimum input voltage with various output power levels. At the output power of 5000 W, the measured maximum efficiency is about 93.4%, and at rated power, a measured maximum efficiency of 90.1% is achieved.

**Figure 12.** Efficiency of the converter at various output powers.

Table 6 shows the comparison of simulation and experimental values of the designed converter. Due to the internal parasitics of the converter, there is a slight variation from simulation to experiment.


**Table 6.** Comparison of simulation and experiment parameters.

#### **6. Conclusions**

This article proposed a complete step-by-step precise TDA for LLC-RC working in DCM boost mode with secondary current. The converter operates in PO mode throughout its working range, and for primary MOSFET switches, it guarantees the ZVS and ZCS for the secondary rectifier. The generated closed-form analytical formulas for ZVS angle, voltage gain, and RMS current are applicable at any operating point, below or above the resonant frequency. The worst-case scenario is taken into account while designing the converter, including the converter operating mode, ZVS for primary switches, RMS current of the resonant inductor, and voltage stress for the resonant capacitor. Then, all the potential design candidates are listed in Table 2, with different values of K that provide a narrow frequency variation, low turn-off current, and lower circulating currents. Measured maximum efficiencies of 93.4% and 90.1% are achieved at the output power of 5000 W and at the rated output power, respectively. Table 6 shows the comparison of simulation and experimental values of the designed converter. Finally, both the simulation and experimental results were provided in order to validate the theoretical analysis.

**Author Contributions:** Conceptualization, K.K.G. and E.D.; Data curation, K.K.G.; Formal analysis, K.K.G.; Investigation, K.K.G. and E.D.; Methodology, K.K.G. and E.D.; Software, K.K.G. and E.D.; Supervision, E.D.; Validation, E.D.; Visualization, E.D.; Writing—original draft, K.K.G. and E.D.; Writing review & editing, E.D. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research received no external funding.

**Institutional Review Board Statement:** Not applicable.

**Informed Consent Statement:** Not applicable.

**Data Availability Statement:** Not applicable.

**Conflicts of Interest:** The authors declare no conflict of interest.The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.

#### **References**

