*3.3. Design and Analysis of JFET Differential Low-Noise Amplifier Circuit*

As an important part of the LNA, the JFET differential amplifier circuit needs to have the characteristics of low noise and high gain. As a voltage-controlled device, JFET must work in the amplification mode when used for signal amplification. At that time, the depletion layer is partially pinch-off, the input AC signal causes the width of the depletion layer to change slightly, and the output drain current also changes accordingly. The signal is amplified at the output. The noise floor and amplification capability of JFET are also limited by the internal channel. The JFET must be operated at a suitable static operating point to make it both low-noise and high-gain.

In practice, due to the limitations of manufacturing technology and semiconductor doping technology, JFET devices will show a large performance difference even in the same batch [17], resulting in the unequal current in the left and right branches of traditional JFET long-tail differential circuits. This problem makes the circuit design difficult because of the static operating point offset. Fortunately, the IF3602 not only has excellent amplification characteristics and noise performance but also integrates a pair of matched low-noise JFETs, which greatly reduces the impact of JFETs differences on performance. In addition, we introduce a source-coupled differential amplifier circuit design, in which a current source is used to replace the tail resistors in traditional long-tail differential circuits. Compared with the long-tail differential circuit, the higher equivalent resistance of the current source gives the circuit an extremely strong common-mode signal rejection and can provide stable current output for the branch. Usually, the following three correlated variables need to be considered when setting the static operating point of the JFET: drain-source voltage VDS, gate-source voltage VGS, and drain current ID. However, the new source-coupled differential amplifier circuit design reduces the variables to VDS and VGS, which simplifies the difficulty of circuit design. The DC path and the AC path were analyzed in this part, where the DC path is used to stabilize the static operating point for the device for optimum performance of the JFET; the AC path determines the amplification capability of the circuit. The results will provide theoretical support for subsequent circuit noise analysis and circuit optimization.

The DC path of the JFET amplifier circuit is shown in Figure 6, where BJT T1, R5, and R6 are formed as a current source to output a stable current of Ip = (−VSS−VPN)/R6. Due to the high symmetry of the circuit, ID1 = ID2 = 0.5Ip. After determining the quiescent operating current of the JFET, only the operating voltages VDS and VGS need to be considered. For JFET, the stable amplification must be achieved in the amplification mode. It is necessary to keep the VDS > 0, VGS < 0 where VD = VDD − ID1R1 = VDD − ID2R2 and ID1R3 = −VBE + ID2R4. The JFET gate is grounded during DC analysis, so VG = 0. The current source maintains the stability of the loop current, so ID1 and ID2 are known. According to the external resistors R1, R2, R3, and R4, the static operating point of the amplifier circuit can be calculated, avoiding the problem of static operating point setting caused by the interaction of VGS, VDS, and ID in the JFET circuit. In order to ensure that the IF3602 has excellent noise characteristics, it needs to be set at the minimum noise static operating point "VDS = 3 V, ID = 5 mA" in the datasheet. After calculating the theoretical external parameters, the R1 and R2 should be fine-tuned to fit the minimum noise static operating point in the datasheet as much as possible, ensuring that the IF3602 can stably exert its noise performance advantages.

The AC path of the JFET amplifier circuit is shown in Figure 7. Because the differential circuit contains excellent differential mode signal amplification capability and common mode noise suppression capability, the current source at the common terminal does not be amplified. Therefore, the current source can be ignored in the AC equivalent circuit. Besides, the amplification capabilities of the circuits on both sides are the same, so only one side of the circuit needs to be considered when constructing the small-signal model to analyze the magnification. The single-side small-signal model is shown in Figure 8. It

can be seen from Figure 8 that the amplification factor of the differential amplifier circuit satisfies the following:

$$A\_v = (-g\_m \mathbf{R}\_1) / (1 + g\_m \mathbf{R}\_3) = (-g\_m \mathbf{R}\_2) / (1 + g\_m \mathbf{R}\_4) \tag{2}$$

$$\begin{array}{c|c} \mathbf{\stackrel{V\_{\rm pps}}{\longrightarrow}} \\ \mathbf{\stackrel{R\_2}{\longrightarrow}} \\ \mathbf{\stackrel{R\_3}{\longrightarrow}} \mathbf{\stackrel{R\_4}{\longrightarrow}} \\ \mathbf{\stackrel{R\_5}{\longrightarrow}} \mathbf{\stackrel{R\_6}{\longrightarrow}} \\ \mathbf{\stackrel{R\_5}{\longrightarrow}} \mathbf{\stackrel{R\_6}{\longrightarrow}} \end{array} \qquad \mathbf{\stackrel{I\_1}{\longrightarrow}} \begin{array}{c|c} \mathbf{\stackrel{I\_2}{\longrightarrow}} \\ \mathbf{\stackrel{I\_3}{\longrightarrow}} \\ \mathbf{\stackrel{I\_4}{\longrightarrow}} \\ \mathbf{\stackrel{R\_5}{\longrightarrow}} \end{array} \qquad \mathbf{\stackrel{I\_5}{\longrightarrow}} \begin{array}{c|c} \mathbf{\stackrel{I\_3}{\longrightarrow}} \\ \mathbf{\stackrel{I\_6}{\longrightarrow}} \\ \mathbf{\stackrel{I\_7}{\longrightarrow}} \end{array} \qquad \mathbf{\stackrel{I\_8}{\longrightarrow}} \mathbf{\stackrel{I\_9}{\longrightarrow}} \mathbf{\stackrel{I\_1}{\longrightarrow}} \mathbf{\stackrel{I\_1}{\longrightarrow}} \mathbf{\stackrel{I\_2}{\longrightarrow}} \mathbf{\stackrel{I\_3}{\longrightarrow}} \\ \mathbf{\stackrel{I\_1}{\longrightarrow}} \mathbf{\stackrel{I\_2}{\longrightarrow}} \mathbf{\stackrel{I\_3}{\longrightarrow}} \mathbf{\stackrel{I\_4}{\longrightarrow}} \mathbf{\stackrel{I\_5}{\longrightarrow}} \mathbf{\stackrel{I\_6}{\longrightarrow}} \mathbf{\stackrel{I\_7}{\longrightarrow}} \mathbf{\stackrel{I\_8}{\longrightarrow}} \end{array} \tag{2}$$

**Figure 6.** DC equivalent path of JFET differential circuit.

**VSS**

**Figure 7.** AC equivalent path of JFET differential circuit.

**Figure 8.** Analysis of AC small signal model of JFET differential circuit.

*gm* is the JFET transconductance, which is affected by the internal conduction channel, so it is only related to the static operating point. The source-coupled differential amplifier circuit constructed by the current source not only simplifies the circuit design but also stabilizes the noise performance and amplification capability of the JFET IF3602. *Av* is the magnification of the differential amplifier circuit, and its value mainly depends on the ratio of the external circuits R1 and R3 or R2 and R4. The purpose of R3 and R4 is to stabilize the source potential of the JFET. In order to maintain the amplification ability of the circuit, their values are relatively small (less than 10 Ω). Therefore, maintaining the JFET in the amplification area, keeping the JFET working near the static operating point of minimum

noise, and increasing the values of R1 and R2 at the same time will significantly increase the amplification factor of the differential amplifier circuit and ensure the performance of the first-stage differential amplifier circuit.

#### *3.4. Noise Analysis and Parameter Optimization of JFET Differential Amplifier Circuit*

The equivalent model of the circuit is constructed by analyzing the AC and DC path signals of the circuit. In order to further optimize the noise performance and amplification performance of the JFET IF3602 differential amplifier circuit, a noise equivalent model was built as shown in Figure 9. en1 and en2 are the equivalent noise sources of the IF3602, en3 and en4 are the equivalent thermal noise sources of the drain resistors R1 and R2, and en5 and en6 are the equivalent thermal noise sources of the source resistors R3 and R4. T1, R5, and R6 constitute the current source I. According to the previous analysis of the AC path, the current source does not get amplified as the AC signal, and its equivalent noise source is suppressed by the differential amplifier circuit as a common-mode signal, which can be ignored.

**Figure 9.** JFET differential circuit noise model.

For the equivalent noise sources en1 and en2 of IF3602, the noise source is input from the gate, and the differential amplifier circuit can be equivalent to a common source amplifier circuit, and its amplification factor is (−*gm*R2)/(1 + *gm*R4). The sum of the output noise of en1 and en2 at the output of Vout1 is as follows:

$$\sqrt{2(-\mathcal{g}\_m\mathcal{R}\_1)^2\mathcal{e}\_{n1}2/\left(1+\mathcal{g}\_m\mathcal{R}\_3\right)^2} \tag{3}$$

For thermal noise sources en3 and en4 of R1 and R2, the noise source PSD satisfies <sup>√</sup>4*kT*R1 and <sup>√</sup>4*kT*R2, *<sup>k</sup>* is the Boltzmann constant, and *<sup>T</sup>* is the temperature in Kelvin. These sources influence on the output end directly, and R1 and R2 are equal, so the sum of the output noise of en3 and en4 at the output end is as follows:

$$\sqrt{2\mathbf{e}\_{\mathbf{n}3}}\tag{4}$$

The PSDs of thermal noise sources en5 and en6 of R3 and R4 are <sup>√</sup>4*kT*R3 and <sup>√</sup>4*kT*R4, respectively, and their resistance values are equal. The thermal noise is input from the source of IF3602 and output at the drain after being amplified. In the circumstances, the differential circuit should be equivalent to a common-gate amplifying circuit, and its

amplification factor is *gm*R1/(1 + *gm*R3). The sum of the output noises of en5 and en6 at the output is as follows:

$$\sqrt{2(\mathcal{g}\_m\mathbb{R}\_1)^2\mathbf{e}\_{n\mathbb{S}}\mathbf{e}^2/(1+\mathcal{g}\_m\mathbb{R}\_3)^2} \tag{5}$$

According to the circuit superposition theorem, the sum of the output noise of the IF3602 differential amplifier circuit at the output end is as follows:

$$\mathbf{e}\_{\text{nJFETout}} = \sqrt{2\mathbf{e}\_{\text{n3}}^2 + 2(\mathbf{e}\_{\text{n1}}^2 + \mathbf{e}\_{\text{n5}}^2)(\mathbf{g}\_m\mathbf{R}\_1)^2/\left(1 + \mathbf{g}\_m\mathbf{R}\_3\right)^2} \tag{6}$$

Usually, to avoid the influence of circuit amplification on noise results, it is necessary to normalize the output noise by dividing it by the circuit's amplification (i.e., the transfer function) and convert it into equivalent input noise to measure the noise floor of the circuit. The equivalent input noise of the differential amplifier circuit is as follows:

$$\mathbf{e}\_{\text{nJFETin}} = \frac{\mathbf{e}\_{\text{nout}}}{|A\_{\mathcal{D}}|} = \sqrt{2\mathbf{e}\_{\text{n1}}^2 + 2\mathbf{e}\_{\text{n5}}^2 + 2\mathbf{e}\_{\text{n3}}\mathbf{e}^2(1 + g\_{\text{w}}\mathbf{R}\_3)^2/\left(g\_{\text{w}}\mathbf{R}\_1\right)^2} \tag{7}$$

The equivalent noise source en1 of the JFET is related to the static operating point, which can be regarded as a fixed value after referring to the minimum noise static operating point setting in the datasheet. The value of R3 is very small and leads to the thermal noise introduced into the input is extremely limited. Therefore, the optimization of resistor R1 should be focused. From Equation (6), the thermal noise of R1 resistance at the input terminal equivalently is as follows:

$$\mathbf{e}\_{\rm nRlin} = \sqrt{\mathbf{e}\_{\rm n3} \mathbf{2} \left(1 + \mathbf{g}\_{\rm m} \mathbf{R}\_{\rm 3}\right)^{2} / \left(\mathbf{g}\_{\rm m} \mathbf{R}\_{\rm 1}\right)^{2}} = \sqrt{4kT \left(1 + \mathbf{g}\_{\rm m} \mathbf{R}\_{\rm 3}\right)^{2} / \mathbf{g}\_{\rm m} \mathbf{^2} \mathbf{R}\_{\rm 1}} \tag{8}$$

When increasing the resistance value of R1, the input noise of R1 will decrease according to Equation (8), and the amplification factor will increase according to Equation (2). The whole optimization meets the requirements of the increasing the gain of the first stage and decreasing the noise floor of the circuit. However, increasing R1 will inevitably cause the offset of the static operating point of the circuit; therefore, the supply voltage of the amplifier circuit must be increased synchronously to roughly keep the static operating point of the JFET as described in the datasheet (VDS = 3V, ID = 5mA). After optimization, the parameters of the amplifier circuit shown in Figure 4 are finally determined as shown in Table 2.


**Table 2.** Circuit device parameters.
