**4. Uncertainty Contributions**

In this section, we analyse the main uncertainty sources inherent in the proposed measurement setup and we derive a complete uncertainty budget based on technical specifications and statistical analysis (In case of statistical analysis, a coverage factor *k* = 2 (i.e., 95%) has been applied to the standard deviations).

In this context, four main contributions can be identified. Three descend from the measurement chain for the generation and re-acquisition of the analog test waveform, i.e., from the DAQ module, the transconductance amplifier and (marginally) the current shunt. One contribution, instead, is directly related to the definition of the SV data packets, i.e., to the vertical resolution loss due to quantization effects.

As regards the DAQ module, two synchronization aspects have to be taken into account: the sampling rate and the phase offset introduced by an improper triggering of the DAC and ADC boards. The sampling rate is derived from the internal time base that is disciplined to the external time reference. In our setup, we are able to retrieve the coerced sampling rate on both boards and the discrepancy between nominal and actual sampling rate is equal to 0.3 ppb [18]. Therefore, it is reasonable to say that the sampling rate has a negligible effect on the amplitude, frequency and phase of the generated and re-acquired waveform.

By connecting the channels ao1 and ai0, we were able to quantify also the distortion level introduced by the DAQ module. In the considered configuration, we evaluated a worst-case Signal-to-Noise Ratio (SNR) and a Total Harmonic Distortion of 92 and −96 dB, respectively. As a consequence, the effective number of bits is equal to 17 bits. In this respect, it should be noticed that such levels of accuracy require a precise control of temperature and power supply stability. In our case, the measurement campaign has been carried out in METAS laboratories with a controlled temperature of 23 Celsius degrees and adopting a power supply at 60 Hz for all the instrumentation, i.e., calibrator, amplifier and DUT, to avoid beating effects or interferences. For this analysis, we considered a dataset of 100

independent acquisition with a sample length of 4 s. Moreover, we quantified the purity of the test waveform by means of a nonlinear fit against a single-tone sinusoidal model that produced a Goodness-of-Fit index not lower than 99.7% [18]. Based on these considerations, we quantified the DAQ contribution to the estimation of the current amplitude in terms of the noise variation range. By also taking into account the integral nonlinearity of the ADC board, as characterized in [25], for a test waveform amplitude of 1 V, the uncertainty is 25.12 ppm.

A further validation of this result is provided by the RMS measurements carried out by the first channel of the DVM system. For this analysis, we considered a dataset of 200 measurements and evaluated the mean and standard deviation. As shown in Figure 3, the distribution is well approximated by a Gaussian distribution and the uncertainty can be quantified in the worst-case in 23.71 ppm. The peculiar non-monotonic uncertainty trend depends also on the adoption of two current shunts with different input range (namely, 500 mA and 10 A), as previously introduced.

**Figure 3.** Uncertainty of the current amplitude at the output of the DAQ module as function of the selected current level (**a**). Quantile-quantile plot relative to a current level of5A(**b**).

The second synchronization aspect regards the triggering mechanism of DAC and ADC boards, with respect to the PPS signal output by the synchronization board (and the time-stamp of the digital data stream). In this regard, it should be noticed that the DAQ module relies on a Sigma-Delta technology: the phase offset introduced by the analog front end of DAC and ADC boards is dependent on the sampling rate. Nevertheless, in a calibration context, it is possible to characterize such contribution and minimize its systematic component by properly shifting the initial phase of the generated waveform. To this end, it is necessary to quantify precisely the phase offset introduced by DAC and ADC boards separately. In recent years, this problem has been widely investigated by several metrological institutes [26–28]. In our measurement setup, we adopted a DFTbased routine for the precise characterization of the phase offset of the signal supplied to the transconductance amplifier. The algorithmic details are beyond the scope of this analysis but can be found in [18]. At 50 Hz, the phase offset has been proven to exhibit a normal distribution with mean and standard deviation equal to 4.186 mrad and 0.004 mrad, respectively. The first one can be seen as a systematic contribution and thus compensated, whereas the second one is a random variable and is related to the phase uncertainty introduced by the DAQ module.

In this context, another aspect that should not be neglected is the proper alignment of the software triggers with the PPS used to synchronize the measuring bridge. With respect to the external time-reference, we quantified the delay introduced by the calibrator in the software triggers and in the PPS output of the synchronization module. As regards the first ones, the technical specifications guarantee the rising edge to occur within 5 ns of the selected time-stamp. Moreover, it should be noticed that the synchronization module guarantees the distribution of software triggers to neighbouring modules (as the DAQ and the controller) with a maximum delay of 2 ns. As regards the PPS output, we employed a

high-precision digital oscilloscope with a sampling rate of 2 GHz and we compared the PPS output against the external time reference. Over an observation interval of nearly 10 min, the PPS showed an average delay of 10 ns with a jitter on the order of few ps. These contributions sum up to 11.36 ns that corresponds to a phase uncertainty of 3.568 μrad.

Once output by the calibrator, the transconductance amplifier converts the voltage test waveform in the corresponding current waveform. In order to characterize the amplitude and phase contributions of this stage, this signal is re-acquired through a high-accuracy current shunt. It is worth noticing that the shunts (periodically calibrated) contribute to the overall uncertainty by at most 0.90 ppm for the amplitude, and 1.50 μrad for the phase [29,30]. On the other hand, the transconductance amplifier has a much more significant impact on the overall uncertainty. As per the calibrator output, we analysed the amplifier output via the DVM. In this case, we were also able to compute the phase displacement between the two channels, i.e., the phase displacement introduced by the transconductance amplifier (and the shunt). For each considered current level, we carried out 200 independent measurements and computed the corresponding statistical distributions: the mean value is taken as a systematic contribution and thus compensated, the standard deviation is used for the uncertainty computation. Figure 4 presents the uncertainty associated with amplitude and phase as function of the current level. In the worst-case, the former is equal to 160.75 ppm, whereas the latter is 200 μrad. In this regard, it is worth noticing how the uncertainty rapidly increases when the current levels fall below 500 mA. Indeed, the selected amplifier is designed for high current output and exhibits a poor accuracy at lower current levels. At the nominal value of 5 A, the uncertainty for amplitude and phase are just 8.36 ppm and 8 μrad, respectively.

**Figure 4.** Uncertainty of the current amplitude (**a**) and phase (**b**) at the output of the transconductance amplifier as function of the selected current level.

Finally, the contribution of the digital output has been also assessed. The SV communication protocol provides a resolution of 32 bits for the analog converted quantities. In terms of quantization error, this corresponds to an amplitude uncertainty of 67 ppm. In terms of phase uncertainty, it is reasonable to set it equal to zero, as the calibrator outputs simulated packets, and thus no conversion error is possible (differently from the digital stream output by a NCIT or a SAMU where measurement errors might occur). On the other hand, it is difficult to merge such uncertainty contributions with the ones related to the analog measurement chain without knowing the algorithm employed by the measuring bridge for the definition of amplitude and phase on the *X*-channel. If a DFT-based approach is adopted (as in many other SV-based estimators), the recent literature has proven how the amplitude and phase uncertainty due to quantization errors decreases significantly as the resolution of the quantized samples exceed 14 bits [31]. Therefore, for the purpose of this paper, this contribution can be reasonably considered negligible.

As a summary, in Table 1, we report the overall uncertainty budget for the calibration infrastructure. By applying a conservative approach, the combined uncertainty has been computed under the assumption of independent and uncorrelated contributions. Consistently with the common practice in current transformer calibration, the phase uncertainty has been expressed in minutes. In total, the amplitude and phase uncertainty are lower than 200 ppm and 0.7 for the entire range of considered test conditions.


**Table 1.** Uncertainty budget for amplitude and phase accuracy (coverage factor *k* = 2).
