*3.1. Topology of the Relaxation Oscillator*

The relaxation oscillator, which makes use of the reported topology [24], is depicted in Figure 5. The major difference is that of the design and implementation of the current reference *IREF*, while the lower supply current consumption is further addressed in the proposed work. The oscillator comprises a reference generator, two comparators (Comp. 1 and Comp. 2), an S-R latch, four switches, and two capacitors (*C*<sup>1</sup> and *C*2). The reference generator generates a stable reference voltage (*VREF*) and a reference current (*IREF*), charging two capacitors with a constant current.

**Figure 5.** Block diagram of relaxation oscillator.

Note that the relaxation oscillator circuit starts when *Q* is logic low, and the voltages across two capacitors are initially zero. At the beginning, the outputs of two comparators are low, and *C*<sup>1</sup> is charged by *IREF*. After the voltage (*VC*1) across *C*<sup>1</sup> reaches *VREF*, the output of Comp.1 transits to high, which allows *Q* to become high and *Q\_bar* to become low. Then *C*<sup>1</sup> starts to discharge, while *C*<sup>2</sup> is charged by *IREF*. The inputs of the SR latch are both low when *IREF* is charging *C*2, so that the outputs of the SR latch remain constant until the voltage (*VC*2) rises to *VREF*. At this juncture, *Q* transits to low, while *Q\_bar* transits to high, allowing *C*<sup>1</sup> to be charged again and *C*<sup>2</sup> to discharge. The output *Q* of the SR latch will generate a rail-to-rail square wave with the desired frequency. As capacitors are charged by a constant current, the duration of the high level and low level of the square wave are dependent on the charging time of each capacitor; hence, the 50% duty cycle can be achieved by using two identical capacitors. The output frequency can be expressed as

$$f\_{\rm ROSC} = \frac{I\_{\rm REF}}{2CV\_{\rm REF}} \tag{1}$$

where *fROSC* is the output frequency, and *C* is the capacitance of *C*<sup>1</sup> and *C*2. From (1), the accuracy of the output frequency is dependent on the accuracy of *VREF* and *IREF*. From the design considerations, the reference generator and the comparator are the key components in circuit design. Two nonideal effects exist in the relaxation oscillator circuit. They are the delay and offset of the comparator. Regarding the comparator's delay, it is not critical because of the low frequency specification and the moderate precision requirement in its application. With a careful designing of the comparator, the temperature-dependent delay of the comparator can be minimized to cause less impact to the circuit, and ultimately, on the output frequency. Pertaining to the comparator's offset, it is also addressed in the design phase with an appropriate choice of critical device sizes so that the offset effect to the circuit is acceptable, without significantly jeopardizing the oscillator's performance.
