**2. Review of Reported Relaxation Oscillator**

A low temperature coefficient relaxation oscillator [8] with a merged window comparator is shown in Figure 2. There are two different reference voltages (*VREF\_H* and *VREF\_L*) in the reported work. *VREF\_H* is connected to the non-inverting input of the comparator, and the voltage (*Vosc*) across the capacitor is initially zero. The capacitor (*Cosc*) is first charged by *IREF* until *Vosc* reaches *VREF\_H*. Then *Cosc* starts to discharge with constant current *IREF* while *VREF\_L* is connected to the comparator. When *Vosc* is lower than *VREF\_L*, *Cosc* is charged, and *Vosc* is again compared with *VREF\_H*. The delay generation units prevent the oscillator from entering metastability.

**Figure 2.** A CMOS relaxation oscillator with a merged window comparator: (**a**) reference generator; (**b**) block diagram.

The voltage reference is based on the architecture improved from the threshold monitoring circuit [21] that can effectively compensate for the temperature effect. Moreover, the reference current is also derived from the same reference voltage, in association with the optimized series/parallel composite resistor. As a result, this leads to the output frequency with low T.C. The merged window comparator is able to cancel out the offset of the comparator arising from the component mismatch effect. As such, this allows the T.C. of output frequency to maintain a good value, even if there is a 10 mV offset in the analog-based comparator, for example. However, the transistor *M*<sup>0</sup> in the reference generator needs to work in a saturation region, thus, for reliable temperature compensation, the current flowing through it is not allowed to be reduced to a small value. At this juncture, an operational amplifier is also utilized to provide a high loop gain to minimize the circuit sensitivity with respect to the supply variation. This suggests an additional current consumption source. Therefore, high current consumption becomes the main limitation of this circuit technique.

Another relaxation oscillator [9] that provides good a T.C. of output frequency while maintaining low power consumption, is depicted in Figure 3. This oscillator starts when φ is logic low. At the beginning, current *I*<sup>2</sup> flows though resistor R to generate the reference voltage at the non-inverting input of the comparator, and capacitor *C*<sup>1</sup> is charged by constant current *I*1. After the voltage across *C*<sup>1</sup> becomes bigger than the reference voltage, φ transits to logic high; thus, the capacitor *C*<sup>2</sup> begins to be charged, and the reference voltage is connected to the inverting input of the comparator until the charging operation for *C*<sup>2</sup> is completed to make φ logic low again.

**Figure 3.** A Relaxation Oscillator with Ultra-Low Power Consumption.

In this work, the currents *I*<sup>1</sup> and *I*<sup>2</sup> can be reused at different phases, and only one comparator [22] is needed. All the currents, including the bias current for the comparator, can be achieved from one current source, hence the current consumption is minimized. Because the reference voltage is connected to different inputs of the comparator at different

phases, the offset of the comparator increases the period at one phase, while decreasing the period at another phase. Thus, the offset can be cancelled out as long as the two capacitors are identical and the two charging currents are assumed the same. However, because of the restricted drain-to-source voltage headroom for each transistor working in a low supply environment, the transistor is subject to more stressing, resulting in not having good matching characteristics. On top of that, the mismatch effect between *I*<sup>1</sup> and *I*<sup>2</sup> is unavoidable. The current mismatch leads to the residual offset of the comparator that cannot be cancelled out completely. Ultimately, an error in the reference voltage exists between the different phases.

Another relaxation oscillator [10], with a self-chopped technique to achieve good stability against temperature and supply variations, is depicted in Figure 4. A currentmode comparator [23] is used to compare the voltage (*Vr*) across the composite resistors and the voltage (*Vc*) across the capacitor. Initially, *Vc*, *Vcmp*, and *Vrst* are logic low, and the capacitor is charged by constant current *Ir* until *Vc* becomes larger than *Vr* to change *Vcmp* from low to high, which causes *Vrst* to transition to high to discharge the capacitor. After the discharge action has been completed, *Vcmp* and *Vrst* become low to allow the current *Ir* to charge the capacitor again.

**Figure 4.** A self-chopped relaxation oscillator with adaptive supply generation: (**a**) block diagram; (**b**) clock buffer.

In this design, the ratio between *Ic* and *Ir* is independent of temperature and supply variations, and the temperature effect on the metal-oxide-metal (MoM) capacitor is negligible. In addition, the offset voltage in transistors *M*<sup>0</sup> and *M*<sup>1</sup> can be cancelled out by flipping *M*<sup>0</sup> and *M*<sup>1</sup> at every half cycle. Therefore, a good T.C. and good line sensitivity of the output frequency can be obtained due to good thermal stability through the use of a stable composite resistor and capacitor, in conjunction with offset cancellation using the chopping technique. However, it may be difficult to reduce the current consumption due to the operational amplifier which exhibits good transient response for powering the fast-switching clock buffers and the need for a complicated replica-biasing circuit. Hence, this design also suffers from the problem of relatively high supply current consumption.
