**4. Analysis of Parasitic Effects: A Case Study**

The only two possible canonic topologies for the VCII-based oscillator are synthesized in Figure 6, where *ZA* and *ZB* are a series-connected RC network and a parallel-connected RC network; we define *tA* = *RACA* and *tB* = *RBCB* as the time constants associated with these networks. The two oscillator topologies shown in Figure 6 correspond to the cases:

$$\text{Type I: } Z\_A = \frac{R\_5}{1 + sR\_5C\_5}, \ Z\_B = R\_1 + \frac{1}{sC\_3} \tag{33a}$$

$$\text{Type II}:\ Z\_A = R\_2 + \frac{1}{s\mathcal{C}\_4},\ Z\_B = \frac{R\_6}{1 + sR\_6\mathcal{C}\_6}.\tag{33b}$$

where *Ri* = 1/*Gi*. From Figure 6, the oscillation condition can be obtained as:

$$\propto |\beta| \frac{Z\_A}{Z\_B} = 1\tag{34}$$

where *β* and *α* are the VCII current and voltage gains (ideally both equal to 1), and the oscillation frequency is given by:

$$
\omega\_0 = \frac{1}{\sqrt{\mathbb{T}\_A \mathbb{T}\_B}}.\tag{35}
$$

The oscillation condition and the oscillation frequency are affected by the non-idealities of the VCII, i.e., finite port impedances, gain errors (*a* < 1, |*b*| < 1) and poles of the voltage and current buffers. In order to analyze the effects of these non-idealities on the oscillator behavior, a model of a real VCII has been developed and implemented (see Figure 7), able to take into account the non-idealities.

**Figure 6.** General topology of the canonic VCII-based oscillators.

**Figure 7.** Model for the Type I canonic oscillator with non-ideal VCII.

In the general case, we can model the VCII with the first-order transfer functions

$$a(s) = a\_0/(1 + s\tau\_z) \tag{36}$$

$$\beta(\mathbf{s}) = -\beta\_0/(1+\mathbf{s}\tau\_\mathbf{x})\tag{37}$$

and complex port impedances

$$\mathcal{Y}\_{\mathbf{x}}(\mathbf{s}) = \mathbf{G}\_{\mathbf{x}} + \mathbf{s}\mathbf{C}\_{\mathbf{x}} \tag{38}$$

$$Z\_y(s) = R\_y + sL\_y \tag{39}$$

$$Z\_z(\mathbf{s}) = \mathcal{R}\_z + \mathbf{s}L\_z. \tag{40}$$

In order to better understand the effects of non-idealities and to compare the performance of the two topologies in Figure 5, different cases have been considered under the hypothesis that the ideal design has been carried out starting from the oscillation condition (34). When the non-idealities of the VCII are taken into account, Equation (34) becomes

$$|\alpha(s)|\beta(s)|\frac{1}{Z\_B + Z\_y + Z\_z}\frac{1}{1/Z\_A + Y\_x} = 1.\tag{41}$$

By a simple inspection of the impedances *ZA* and *ZB* given by (33), and of the port impedances (38)–(40), it is evident that the Type I canonic oscillator should be less affected by non-idealities. In fact, in this case *Yx* can be absorbed in *ZA* (*Gx* and *Cx* are summed to 1/*R*<sup>5</sup> and *C*5, respectively), and *Zy* and *Zz* in *ZB*: a parallel RC network is used in parallel to a port impedance modeled as an RC parallel network, and a series impedance is connected in series to port impedances modeled as RL series networks. In contrast, for the Type II canonic oscillator, a series network is connected in parallel to the parallel RC port impedance, and a parallel RC network is connected in series to LR series port impedances, thus non-ideal port impedances alter *ZA* and *ZB* more significantly. The Type I canonic VCII-based oscillator seems therefore more suited to a practical realization, and it has been selected for further analysis.
