*3.3. Closed Loop Simulations*

The OTA has then been simulated in a conventional non-inverting unity-gain configuration. The closed loop frequency response of the OTA is depicted in Figure 7, whereas the DC transfer characteristic is shown in Figure 8, highlighting an almost rail-to-rail behavior. Figure 9 shows the time domain response of the circuit to a sinusoidal waveform with a frequency of 10Hz and an amplitude of 200mV. The waveforms of the internal signals INn, INp and CMP of the SC-DIGOTA when processing the sinusoidal signal reported in Figure 9 are reported in Figure 10. Figure 11 shows the time domain response of the circuit to a square wave with a period of 2ms and an amplitude of 200mV. The positive and negative slew-rate have been found to be SR+ = 4.32 V/ms and SR− = 1.03 V/ms respectively.

**Figure 7.** Closed loop frequency response.

**Figure 8.** Closed loop dc voltage transfer characteristic.

**Figure 9.** Time domain response to a sinusoidal waveform (frequency = 10 Hz and amplitude = 200 mV) of the SC-DIGOTA in unity gain configuration.

**Figure 10.** Internal waveforms of the SC-DIGOTA in unity gain configuration in response to a sinusoidal waveform (frequency = 10 Hz and amplitude = 200 mV).

**Figure 11.** Time domain response to a square wave (period = 2 ms and amplitude = 200 mV) of the SC-DIGOTA in unity gain configuration.

#### **4. Comparison with the Literature**

To compare the proposed SC-DIGOTA against state-of-the-art low voltage amplifiers, we refer to the following Figures of Merit:

$$FOMs = \frac{GBWC\_L}{P\_{diss}}\tag{3a}$$

$$FOM\_{S,A} = \frac{GBWC\_L}{P\_{diss} \cdot Area} \tag{3b}$$

$$FOM\_{\mathcal{L}} = \frac{SRC\_{\mathcal{L}}}{P\_{diss}} \tag{4a}$$

$$FOM\_{\rm L,A} = \frac{SRC\_L}{P\_{diss} \cdot Area} \tag{4b}$$

where *GBW* is the gain bandwidth product, *CL* the load capacitance, *SR* is the average slew-rate, and *Pdiss* is the power consumption. *S* and *L* in (3) and (4) denote small-signal and large-signal, respectively, while the *FOMS*,*<sup>A</sup>* and *FOM*L,A are normalized with respect to the layout area of the OTA.

Table 1 reports the comparison of the SC-DIGOTA against recently published low voltage OTAs taken from the literature, showing how the proposed circuit exhibits very good small signal performance and adequate large signal performance. Due to the very compact layout, the proposed OTA outperforms all other similar designs in terms of *FOMS*,*A*.

**Table 1.** Comparison against the state of the art.



**Table 1.** *Cont.*

However, it has to be noted that, as pointed out in [16,17], the operation of Digital OTAs is typically strongly sensitive to PVT variations and mismatch, and often requires suitable calibration strategies to achieve high production yield. This also apply to the proposed implementation in which some sort of calibration [16,17] and/or VDD adjustment strategy is required to cope with variations.
