**Appendix A. Verilog-A Implementation**

In Verilog-A, the current flowing from Terminal A to Terminal B is defined using the syntax I(A,B), and the voltage between these two terminals is defined as V(A,B). Therefore, it is very straightforward to set equations and associate voltages and currents.

The sample below contains a definition of the pinch-off voltage in (4), followed by an implementation of Algorithm 443 regarding the source (subscript S) terminal. In the full description, the calculations are performed for both source and drain (subscript D) terminals, which are analogous.

```
1 analog begin
2 PhiT = $vt( $temperature); // thermal voltage
3 VP = (V(G,B) - VTH + sigma*V(D,S) + sigma*V(S,B))/n;
4 // Equation (4), pinch -off voltage
5
6 // Condition to calculate WnS
7 X = exp(((VP - V(S,B))/PhiT)+1);
8
9 if(X < 0.7385) begin
10 numeratorS = X + (4/3)*X*X;
11 denominatorS = 1 + (7/3)*X+(5/6)*X*X;
12 WnS = numeratorS/denominatorS;
13 end
14
15 else begin
16 numeratorS = log(X)*log(X)+2*log(X)-3;
17 denominatorS = 7*log(X)*log(X) + 58*log(X) +127;
18 WnS = log(X) - 24*(numeratorS/ denominatorS);
19 end
20
21 // Calculating ZnS
22 ZnS = log(X) - WnS - log(WnS);
23
24 // Calculating EnS
25 TermC = ZnS/(1 + WnS);
26
27 numeratorES = (2*(1+WnS)*(1+WnS+(2/3)*ZnS)-ZnS);
28 denominatorES = 2*(1+WnS)*(1+WnS+(2/3)*ZnS)-2*ZnS;
```

```
29
30 EnS = TermC*(numeratorES/denominatorES);
31
32 // Finding the qis and ifS
33 qiS = WnS*(1+EnS); // normalized inversion charge at source
34 ifS = (qiS + 1)*(qiS + 1) - 1; // Equation (6), forward inversion level
```
Note that the methodology used to calculate the inversion charges (lines 6–33) is from [22], and we used several variables throughout the description to facilitate the implementation. Afterward, the drain current is calculated from the results of the source, and drain calculations as shown in the sample below. The syntax and guidelines are detailed in [14].

```
1 //Calculating ID
2 I(D,S) <+ = IS*(ifS -irD); // Equation (1),drain - current
```