*4.4. Discussion and Comparison with the Literature*

In order to compare the amplifier with the literature, we employ the two standard figures of merit (FOMs) for small and large-signal performance, namely *FOMS* and *FOML*. The *FOMS* is defined as:

$$FOM\_S = \frac{\text{GBW} \cdot \text{C}\_L}{P\_D} \tag{34}$$

where *CL* is the load capacitance; the *FOML* is defined as:

$$FOM\_L = \frac{SR\_{avg} \cdot C\_L}{P\_D} \tag{35}$$

where *SRavg* is the average (between the positive and negative edge) slew-rate.

However, since most works presented in the literature show an asymmetric slew-rate, it is more meaningful to consider the worst case slew-rate. Consequently, as in [40], we define the *FOMLWC* as:

$$FOM\_{L\_{\rm WC}} = \frac{SR\_{\rm WC} \cdot C\_L}{P\_D} \tag{36}$$

where *SRWC* is the worst case slew-rate between the positive and negative signal edges.

The proposed amplifier exhibits the largest small-signal *FOM* among the comparable ULV literature, with a *FOMS* approaching 80.29 k against the previously reported record of about 20.16 k attained by [42]. The proposed OTA outperforms gate-driven, bodydriven and also digital OTAs. Large-signal performance is also very good, especially if

the worst-case *FOM* is considered: the proposed amplifier is the best in the literature. Indeed, the *FOML* is about 34.40 k; furthermore, the worst case *FOMLWC* also is very good, approximately 26.30 k, which is an awesome result, also given that previous works attained in the best case *FOML* ≈ 21.00 k and in the worst case *FOMLWC* ≈ 8.36 k. The proposed amplifier has a small area occupation with respect to comparable body-driven designs, though the area is larger than digital and gate-driven designs (Table 6).


**Table 6.** Comparison table.

\* Simulated; † Measured; ‡ Monte Carlo mean-value; - PSRR+/PSRR<sup>−</sup> [dB]; area estimated accounting for the minimum distances due to deep N-Wells for body connections.

#### **5. Conclusions**

In this work, we propose a novel tree-based OTA architecture that exploits body-driven stages to achieve rail-to-rail ICMR, and body-diode loads to avoid Miller compensation, improving the bandwidth efficiency. A ULV ULP OTA exploiting this approach was designed in a 130 nm CMOS process from STMicroelectronics. Simulation results show a dc gain higher than 52 dB, a gain-bandwidth product of about 35.16 kHz with nominal CMRR and PSRR, respectively, equal to 42.11 dB and 56.13 dB. Large-signal characteristics are also very good both in terms of THD and slew-rate. Due to the very limited power consumption of about 21.89 nW, the OTA exhibits state-of-the-art small-signal and large-signal FoMs. Summarizing, the overall performance of the proposed OTA shows record-breaking smallsignal and large-signal performance, relatively large DC gain and reasonable PSRR and CMRR performance. The OTA exhibits good stability and robustness against PVT and mismatch variations.

**Author Contributions:** Conceptualization, F.C., R.D.S. and G.S.; data curation, R.D.S.; investigation, F.C., R.D.S., P.M. and G.S.; software, R.D.S.; validation, R.D.S.; supervision, F.C. and G.S.; writing original draft preparation, R.D.S. and P.M.; writing—review and editing, F.C. and G.S.; funding acquisition, A.T. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research received no external funding.

**Conflicts of Interest:** The authors declare no conflict of interest.
