**4. Conclusions**

A novel inverter-based two-stage CMOS transconductance amplifier, with quiescent current control and suitable for very low supply voltages was presented. The solution consists of the cascade of a noninverting and an inverting stage both characterized by having only two complementary transistors between the supply rails, thus providing rail-to-rail and class-AB output capability. The designed solution is supplied from 0.5 V and in quiescent conditions consumes (typically) approximately 488 nA, while providing a DC gain of approximately 51 dB, with a unity gain frequency of 1 MHz and phase margin of 70 degrees, for a 1-pF//1.5-MΩ load.

The quiescent current control loop proved to be effective against mismatches and process variations. Further investigation is currently being carried out to reduce the quiescent current sensitivity to temperature. This drawback is caused by the limited variation allowed to the body biasing control voltage, which is of course restricted to VDD and ground. Once VBP and VBN reach these limits and saturate, the control loop becomes ineffective. For this reason, making IBIAS with a coefficient negative to absolute temperature (NTAT) could be a favorable solution and subject for further study.

**Author Contributions:** Conceptualization: S.P. and G.S.; data curation: A.B.; original draft preparation: S.P. and A.B.; writing—review and editing: all authors; supervision: S.P. and G.S. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research received no external funding.

**Data Availability Statement:** The data presented in this study are available in article.

**Conflicts of Interest:** The authors declare no conflict of interest.
