**4. Control Interface**

Figure 10 shows the block scheme of the 3Φ5L E-Type MMI. This converter must be provided with sinusoidal three-phase voltage waveforms with reduced total harmonic distortion (*THDv*). To meet this target, a multi-resonant controller [35] has been carefully chosen. Figure 11 illustrates the control algorithm of the 3Φ5L E-Type MMR connected to the wind source or to the micro-turbine source. As can be seen, the external speed loop provides the current reference to the q-controller inner loop. The task of this controller is to regulate the phase current to reduce the THD. The ICT circulating currents are regulated by adding an offset into the modulating signals with an additional loop.

**Figure 10.** Block diagram of the grid-side 3Φ5L E-Type MMI control algorithm.

**Figure 11.** Block diagram of the 3Φ5L E-Type MMR control algorithm for wind or micro-turbine sources.

#### **5. Simulation Results**

The hardware design previously addressed has been verified using a simulation model realized in the Matlab/Simulink and Plexim environments. Particularly, the power converter models have been implemented in Plecs, while the control structures have been implemented in Simulink. The stress of the power semiconductors and the losses distribution have been evaluated in the Plecs environment, which has a specific domain for modeling power semiconductors. Moreover, based on the manufacturer of the power semiconductors, the 2D look-up tables and 3D look-up tables have been created in Plecs to evaluate the loss distribution. Figures 12 and 13 show the AVG and RMS current flowing into power semiconductors of the E-Type MMI and E-Type MMR for different values of the output power. Given the symmetry of the circuit, only the current flows through the power switches located in the bottom side of the E-Type MMI and E-Type MMR are illustrated. Both the analytical and experimental approaches provide the same results.

**Figure 12.** Comparison between the analytical and simulation approaches of the currents flowing in the power semiconductors located in the 3Φ5L E-Type MMI: (**a**) average (AVG); (**b**) root mean square (RMS).

As can be seen, in the inverter side the most stressed switches are *Sy*,21, *Sy*,22, while the least stressed switches are located in the middle leg *Sy*,23, *Sy*,24. In the rectifier side, the most stressed and the least stressed power semiconductors are *Dx*,21, *Dx*,22 and *Sx*,23, *Sx*,24, respectively.

**Figure 13.** Comparison between the analytical and simulation approaches of the currents flowing in the power semiconductors located in the 3Φ5L E-Type MMR: (**a**) AVG; (**b**) RMS.

Based on the datasheet provided by the power semiconductor manufacturers, it has been possible to estimate the efficiency distribution of the proposed converters using an analytical approach and a simulation approach. Particularly, starting from the achieved AVG and RMS currents, analytical equations to estimate the losses of the converters have been obtained according to the method proposed in [36]. Numerical efficiency results from the obtained analytical equations have been compared with simulation results. Figure 14 shows the total efficiency of the 3Φ5L E-Type MMR and MMI, including the passive components, as a function of the power. These results have been obtained based on the selected power semiconductors and the operating parameters listed in Tables 1 and 2. The peak efficiency occurs when the power is close to 10 kW, while the efficiency at a nominal point is above 98%. As can be seen, the simulation results closely match the analytical results. Operation modes and characteristic waveforms of the 3Φ5L E-Type MMR and MMI have been evaluated according to the operating point listed in Table 2.

**Figure 14.** Total efficiency of the 3Φ5L E-Type MMC as a function of the power *P*0: analytical result (green line), simulation result (orange line).


**Table 2.** Operating parameters of the 3Φ5L E-Type MMR and MMI.

Figure 15 shows the output phase voltages *uu*, *uv*, *uw*, the phase-to-neutral switching voltages *ua*(*sw*), *ub*(*sw*), *uc*(*sw*), and the inductor phase currents *iu*, *iu*, *iu* of the 3Φ5L E-Type MMI under resistive three-phase loads. As can be seen, the voltage waveforms show a sinusoidal trend with very low total harmonic distortion.

**Figure 15.** Waveforms of the 3Φ5L E-Type MMI, from top to bottom: output phase voltages *uu*, *uv*, *uw*, phase-to-neutral switching voltages *uu*(*sw*), *uu*(*sw*), *uu*(*sw*), inductor phase currents *iLu*, *iLv*, *iLw*.

The waveforms of the 3Φ5L E-Type MMR are illustrated in Figure 16, where it is possible to notice, from the top to bottom, the phase back electromotive force (EMF) *ua*, *ub*, *uc*, the phase-to-neutral switching voltage *ua*(*sw*), *ub*(*sw*), *uc*(*sw*), the cell-to-neutral switching voltage *ua*1(*sw*), *ub*1(*sw*), *uc*1(*sw*), and the electrical machine phase current *ia*, *ib*, *ic*.

Here, the cell-to-neutral switching voltages also show five voltage levels, while the phase-to-neutral switching voltages exhibit nine voltage level. Thanks to the combination of the proposed topology and the control algorithm, the phase currents are regulated as three-phase sinusoidal waveforms with low total harmonic distortion.

**Figure 16.** Waveforms of the 3Φ5L E-Type MMR, from top to bottom: phase back electromotive force (EMF) *ua*, *ub*, *uc*, phase-to-neutral switching voltages *ua*(*sw*), *ub*(*sw*), *uc*(*sw*), cell-to-neutral switching voltages *ua*1(*sw*), *ub*1(*sw*), *uc*1(*sw*), electrical machine phase currents *ia*, *ib*, *ic*.

## **6. Experimental Results**

Experimental results have been carried out on 20 kVA 3Φ5L E-Type MMC prototypes previously described to support the proposed analysis. The DC-bus voltage was kept at 600 V by one port of the multi-port Dual Active Bridge (DAB) converter available in the laboratory [9]. The 3Φ5L E-Type MMR was connected to a permanent magnet synchronous motor (PMSM) to emulate the wind source and the 3Φ5L E-Type MMI was connected to the resistive load bench. Figure 17 shows the experimental setup of the multilevel converter including the SRBCs.

**Figure 17.** Experimental setup of the 3Φ5L E-Type MMR and MMI.

As can be seen from the Figure 17, the 3Φ5L E-Type MMR and MMI were controlled using two different control boards, which were based on the National Instruments sbRIO-9651 System on Module (SoM), as shown in Figure 18. The SoM is equipped with both

a microprocessor (μP) and a field-programmable gate array (FPGA), the control loop of the voltages or, in case of the rectifier side, the control loop of the currents and speed, run on the FPGA using 32-bit floating point arithmetic, while system managements and communication infrastructure are managed by the μP.

**Figure 18.** Control architecture with the National Instruments sbRIO-9651 System on Module (SoM).

Figure 19 shows the phase-to-neutral switching voltage *uu*(*sw*), the cell-to-neutral switching voltage *uu*1(*sw*), the voltage waveform after the filter *uu*, and the phase current *iu* under resistive load, when the fundamental frequency *f* <sup>0</sup> was equal to 50 Hz, the switching frequency *fsw* was equal to 20 kHz, and the modulation depth *M*0*<sup>I</sup>* was equal to 0.93. Figure 19 shows the five voltage levels across the single cell converter *uu*1(*sw*) and nine voltage levels across the single phase *uu*(*sw*) for a fixed modulation index. Figure 20 shows the output voltage waveforms under resistive load. These results prove the good capability of the multi-resonant controller to perfectly track the voltage references and to compensate the harmonics introduced by dead component time.

**Figure 19.** 3Φ5L E-Type MMI waveforms, from top to bottom: phase-to-neutral switching voltage *uu*(*sw*), cell-to-neutral switching voltage *uu*1(*sw*), output voltage *uu* and phase current *iu*.

**Figure 20.** Phase-to-neutral voltages *uu*, *uv*, *uw* of the 3Φ5L E-Type MMI side under resistive load.

Figure 21 illustrates the normalized harmonic spectrum of the phase-to-neutral voltage *uu*. The amplitude was normalized with respect to the fundamental. The harmonics magnitude from the 15th to 50th order exhibited an amplitude less than 0.1%. The *THDv* valuated up to the 50th order was close to 0.88%.

**Figure 21.** Harmonic spectrum of the phase-to-neutral voltage *uu*.

Figure 22 shows the phase-to-neutral switching voltage *ua*(*sw*), the extracted fundamental component, the electrical machine phase current *ia*, and angular position *θel*, when the fundamental frequency *f* <sup>0</sup> was equal to 100 Hz, the switching frequency *fsw* was equal to 20 kHz, and modulation depth *M*0*<sup>R</sup>* was equal to 0.93.

Here, the nine voltage levels are also clearly visible, and the control algorithm provided good tracking capability, making the machine current almost a pure sinusoidal waveform. The normalized harmonic spectrum of the phase current normalized with respect to the fundamental is shown in Figure 23. The THD of the electrical machine phase current estimated up to the 50th order was equal to 1.95%. The efficiency of the 3Φ5L E-Type Rectifier and Inverter have been evaluated by using the PM3000A wattmeter, where one channel has been used to measure the input power at the DC-bus and two channels have been used to measure the output power through Aron's insertion. Figure 24 illustrates the experimental efficiency (blue line) of the 3Φ5L E-Type MMR plus 3Φ5L E-Type MMI including filters. As can be seen, the peak efficiency was equal to 98.81% by using only the Si power semiconductors, and at nominal power the efficiency was above 98%. Furthermore, the experimental results showed a good matching compared to the theoretical analysis. Consequently, the achieved experimental point validated the theoretical performance analysis of the 3Φ5L E-Type MMR and the 3Φ5L E-Type MMI.

**Figure 23.** Harmonic spectrum of the electrical machine phase currents *ia*.

**Figure 24.** Total efficiency of the 3Φ5L E-Type MMC as a function of the power *P*0: analytical result (green line), simulation result (orange line) and experimental result (blue line).

#### **7. Conclusions**

The multilevel–multicell 3Φ5L E-Type MMI and 3Φ5L E-Type MMR for stand-alone microgrid applications have been presented and discussed in this paper. The E-Type topology has been carefully studied with reference to the multicell interleaving configuration. The advantages and disadvantages of the proposed multilevel–multicell converters have been clearly explained. To build the prototype of the MMR and MMI, the hardware design process has been discussed. The prototype of the proposed multilevel-multicell has been built, aiming for improvements in the power density and specific power, as well as the power quality of the voltage and current waveforms. In fact, the complete prototype of the 3Φ5L E-Type MMR plus 3Φ5L E-Type MMI presented a power density of 8.4 kW/dm3 and a specific power of 3.24 kW/kg. To evaluate the performance of the multilevel–multicell converters, the control strategies have been introduced with particular regard to standalone microgrid applications. Experimental results confirmed the effectiveness of the proposed multilevel–multicell converters, achieving a peak efficiency of 98.81% using Si power semiconductors, as well as a *THDv* of 0.88% and a *THDi* of 1.95%.

**Author Contributions:** Conceptualization, P.J.G., and L.S.; methodology, F.C. and L.S.; software, M.d.B. and A.L.; validation, M.d.B. and A.L.; formal analysis, M.d.B. and A.L.; investigation, M.d.B.; resources, L.S., F.C. and A.L.; data curation, L.S. and A.L.; writing—original draft preparation, M.d.B.; writing— review and editing A.L., L.S., F.C. and P.J.G.; visualization, M.d.B.; supervision, L.S., A.L., F.C. and P.J.G.; project administration, L.S. and P.J.G.; funding acquisition, L.S., A.L., F.C. All authors have read and agreed to the published version of the manuscript.

**Funding:** This research received no external funding.

**Institutional Review Board Statement:** Not applicable.

**Informed Consent Statement:** Not applicable.

**Data Availability Statement:** Not applicable.

**Acknowledgments:** The authors are thankful to "Sky Research doo" for building the prototype of the multilevel converters, including the power filter used in the experimental campaign.

**Conflicts of Interest:** The authors declare no conflict of interest.

#### **Appendix A**

The analytical approach is presented in this section to calculate the AVG and the RMS current flowing through the power semiconductors in the 3Φ5L E-Type MMR and MMI. In general, the AVG and RMS current over one fundamental period can be found by Equations (A1) and (A2), where *θ* = *ωt*, *ω* is the fundamental frequency, *i* is the sinusoidal phase current, and *dd* is the duty cycle of the devices.

$$I\_{\rm RMS} = \sqrt{\frac{1}{2\pi} \int\_0^\pi \left[i^2(\theta) \cdot d\_d(\theta)\right] d(\theta)}\tag{A1}$$

$$I\_{AVG} = \frac{1}{2\pi} \int\_0^\pi \left[ i(\theta) \cdot d\_d(\theta) \right] d(\theta) \tag{A2}$$

To find the RMS and AVG currents, the duty cycles of the power semiconductors in both rectifier and inverter must be obtained. According to the modulation strategy illustrated in Figure 6, the duty cycle of the devices can be derived from Equation (A3), where *θin* = *ωint*, *θ*<sup>0</sup> = *ω*0*t*, *ωin* and *ω*<sup>0</sup> the fundamental frequency of the rectifier and inverter, respectively, *An,car* is the amplitude of the carriers and *mn,car* is the offset of the carriers, with *n* = 1, 2, 3, 4, and *mx(θin)*, *my(θ*0*)* are the modulation index of the rectifier and inverter, respectively, defined in (A4), with *z* ∈ {*A, B, C*} and *w* ∈ {*U, V, W*} and *k* = 0, 1, 2.

$$\begin{cases} \begin{array}{l} d\_{\text{rect},d\text{cvieces}}(\theta\_{\text{in}}) = \frac{1}{A\_{\text{n,car}}} \left[ \left( \frac{A\_{\text{n,car}}}{2} - m\_{\text{n,car}} \right) + m\_{\text{z}}(\theta\_{\text{in}}) \right] \\\ d\_{\text{inv},d\text{cvieces}}(\theta\_{0}) = \frac{1}{A\_{\text{n,car}}} \left[ \left( \frac{A\_{\text{n,car}}}{2} - m\_{\text{n,car}} \right) + m\_{\text{w}}(\theta\_{0}) \right] \end{array} \tag{A3}$$

$$\begin{cases} m\_z(\theta\_{in}) = M\_{0R} \sin\left(\theta\_{in} - k \frac{2\pi}{3}\right) \\ m\_w(\theta\_0) = M\_{0I} \sin\left(\theta\_0 - k \frac{2\pi}{3}\right) \end{cases} \tag{A4}$$

Substituting (A4) into (A3), the duty cycles for each power semiconductors in the single cell rectifier and inverter can be expressed as (A5) and (A6), where α1*<sup>R</sup>* = arcsin(0.5/*M*0*R*) and α1*<sup>I</sup>* = arcsin(0.5/*M*0*I*) are the angles between the carrier signals and the modulating signals of the rectifier and inverter, respectively. Replacing (A5) and (A6) into (A1) and (A2), and performing some algebraic manipulations, the RMS and AVG currents in each power semiconductors can be written as in Equation (3), where the coefficients *aRMS,i*, *bRMS,i*, *aAVG,i*, *bAVG,i*, *aRMS,j*, *bRMS,j*, *aAVG,j*, *bAVG,j* are listed in Tables A1 and A2.

*dSx*,11 (*θin*) = <sup>0</sup> *<sup>θ</sup>in* <sup>∈</sup> [0, *<sup>π</sup>*], *<sup>θ</sup>in* <sup>∈</sup> [*π*, *<sup>π</sup>* <sup>+</sup> *<sup>α</sup>*1], *<sup>θ</sup>in* <sup>∈</sup> [2*<sup>π</sup>* <sup>−</sup> *<sup>α</sup>*1*R*, 2*π*] −1 − 2*M*0*<sup>R</sup>* sin(*θin*) *θin* ∈ [*π*, 2*π* − *α*1*R*] *dSx*,12 (*θin*) = <sup>1</sup> *<sup>θ</sup>in* <sup>∈</sup> [0, *<sup>π</sup>*], *<sup>θ</sup>in* <sup>∈</sup> [*π*, *<sup>π</sup>* <sup>+</sup> *<sup>α</sup>*1*R*], *<sup>θ</sup>in* <sup>∈</sup> [2*<sup>π</sup>* <sup>−</sup> *<sup>α</sup>*1*R*, 2*π*] 2[1 + *M*0*<sup>R</sup>* sin(*θin*)] *θin* ∈ [*π* + *α*1*R*, 2*π* − *α*1*R*] *dDx*,21 (*θin*) = <sup>0</sup> *<sup>θ</sup>in* <sup>∈</sup> [0, *<sup>π</sup>*] 1 *θin* ∈ [*π*, 2*π*] *dDx*,22 (*θin*) = <sup>1</sup> *<sup>θ</sup>in* <sup>∈</sup> [0, *<sup>π</sup>*] 0 *θin* ∈ [*π*, 2*π*] *dSx*,23 (*θin*) = ⎧ ⎨ ⎩ 1 − 2*M*0*<sup>R</sup>* sin(*θin*) *θin* ∈ [0, *α*1*R*], *θin* ∈ [*π* − *α*1*R*, *π*] 0 *θin* ∈ [*α*1*R*, *π* − *α*1*R*] 1 *θin* ∈ [*π*, 2*π*] *dSx*,24 (*θin*) = ⎧ ⎨ ⎩ 1 *θin* ∈ [0, *π*] 1 + 2*M*0*<sup>R</sup>* sin(*θin*) *θin* ∈ [*π*, *π* + *α*1*R*], *θ<sup>R</sup>* ∈ [2*π* − *α*1*R*, 2*π*] 0 *θin* ∈ [*π* + *α*1*R*, 2*π* − *α*1*R*] *dSx*,31 (*θin*) = <sup>1</sup> *<sup>θ</sup>in* <sup>∈</sup> [0, *<sup>α</sup>*1*R*], *<sup>θ</sup><sup>R</sup>* <sup>∈</sup> [*<sup>π</sup>* <sup>−</sup> *<sup>α</sup>*1*R*, *<sup>π</sup>*], *<sup>θ</sup>in* <sup>∈</sup> [*π*, 2*π*] 2[1 − *M*0*<sup>R</sup>* sin(*θin*)] *θin* ∈ [*α*1*R*, *π* − *α*1*R*] *dSx*,32 (*θin*) = <sup>−</sup><sup>1</sup> <sup>+</sup> <sup>2</sup>*M*0*<sup>R</sup>* sin(*θin*) *<sup>θ</sup>in* <sup>∈</sup> [*α*1*R*, *<sup>π</sup>* <sup>−</sup> *<sup>α</sup>*1*R*] 0 *θin* ∈ [0, *α*1*R*], *θin* ∈ [*π* − *α*1*R*, *π*], *θin* ∈ [*π*, 2*π*] (A5)


**Table A1.** 3Φ5L E-Type MMR power semiconductor coefficients of the RMS and AVG currents.



**Table A2.** 3Φ5L E-Type MMI power semiconductor coefficients of the RMS and AVG currents.

#### **References**

