**2. STATCOM Architecture and Analysis**

STATCOMs play a vital role in power systems by regulating the voltage and providing reactive power support. These devices are built on a voltage source converter (VSC) architecture and are connected to the grid through phase reactors and a step-up transformer. The VSC incorporates insulated gate bipolar transistors (IGBTs) in a modular multi-level converter (MMC) configuration.

The primary objective of a STATCOM is to control the voltage at its point of connection to the grid. It achieves this by generating or absorbing reactive power, effectively regulating the system voltage and enhancing power system stability. Unlike conventional reactive power compensation devices, such as capacitor banks or synchronous condensers, STATCOMs offer the advantages of a rapid response and continuous control across a wide range of operating conditions.

At the core of a STATCOM lies the VSC, comprising power semiconductor switches, particularly IGBTs, which can swiftly switch on and off to produce the desired voltage waveform. The MMC configuration within the VSC allows for high-voltage operation and facilitates the generation of a high-quality voltage with minimal harmonic distortion. By

converting DC power into AC power, the VSC allows the STATCOM to inject or absorb reactive power into the grid as required.

Through the dynamic adjustment of the voltage waveform produced by the VSC, the STATCOM actively regulates the grid voltage, compensates for reactive power imbalances, mitigates voltage flicker, improves the power factor, and bolsters the overall power system stability and reliability. The control system of the STATCOM continuously monitors the system conditions and employs feedback control algorithms to adapt the voltage output of the VSC accordingly. The presence of a step-up transformer enables the STATCOM to connect to the high-voltage transmission grid, ensuring appropriate voltage levels for effective power transmission and distribution. Additionally, the phase reactors provide impedance and protection to the STATCOM system while limiting the flow of short-circuit currents.

The diagram in Figure 1 illustrates the principle behind the controlled switching of the IGBT valves in a single sub-module, which generates the fundamental three-level waveform utilized by the STATCOM to control the contribution of reactive power to the grid. However, the performance, rating, and controllability of the STATCOM can be significantly enhanced by the connection of multiple sub-modules in series.

When these sub-modules are interconnected, it enables the construction of a voltage waveform with an improved resolution. This means that the voltage can be precisely controlled with finer granularity, resulting in the more accurate regulation of the reactive power. The increased resolution enhances the overall performance of STATCOM, enabling it to provide more efficient and precise control over reactive power compensation in the grid. Figure 2 presents the STATCOM vector analysis under the stand-by, inductive, and capacitive modes, respectively.

**Figure 1.** STATCOM. (**a**) Typical full-bridge sub-module, (**b**) output waveform.

**Figure 2.** STATCOM. (**a**) Standby mode, (**b**) inductive mode, (**c**) capacitive mode.

Furthermore, the series connection of multiple sub-modules allows for the higher rating capability of the STATCOM. By combining the voltage outputs of each sub-module, the overall voltage level and capacity of the STATCOM can be increased. This expanded rating capability enables the STATCOM to handle larger reactive power demands and provide enhanced support to the power system (Figure 3).

**Figure 3.** STATCOM along with IV characteristics [8].

Two control loops are generally involved in a VSC-based STATCOM architecture. The outer control loop will control the *Vac* or *Vdc* depending on the control requirements and the number of variables involved in the system. The inner control loop controls the actual response with the set values. Therefore, the current control loop becomes

$$V\_c^d = \omega\_{\mathcal{S}} L\_f i\_f^{\mathcal{S}} - (K\_p - \frac{K\_i}{s})(i\_f^{d\*} - i\_f^d) + V\_{\mathcal{S}}^d \tag{1}$$

$$V\_c^q = -\omega\_{\mathcal{S}} L\_f i\_f^{\mathcal{S}} - (K\_p - \frac{K\_i}{s})(i\_f^{q\*} - i\_f^q) + V\_{\mathcal{S}}^q \tag{2}$$

Equations (1) and (2) represent the direct and quadrature axis control of the voltage waveform in the inner current control loop.

#### **3. Problem Formulation and Solution Methodology**

The single-line multi-machine bus (SIMB) microgrid implementing a STATCOM is shown in Figure 4.

**Figure 4.** SIMB architecture for microgrid.

This architecture is widely used for STATCOM performance evaluation under the microgrid model. The model mainly consists of an infinite bus connected to a synchronous generator at one side through a two-winding transformer; at the other side, it is connected to a microgrid architecture supported by a STATCOM and PV source. The STATCOM under investigation is a GTO-based voltage source converter (VSC). Here, the VSC will generate a controllable voltage in accordance with leakage reactance. Then, the voltage difference between the STATCOM terminal and bus will determine the type of power exchange, such as active power or reactive power, between the two devices. The amount of reactive power exchange can be controlled using the voltage and phase angle *δ*.

Therefore, the nonlinear equation between the STATCOM's voltage and current becomes

$$I\_{LO}^\* = I\_{Load} + jI\_{Leq} \tag{3}$$

and

$$V\_0 = \mathbb{C}V\_{dc}(\cos\theta + j\sin\theta) \tag{4}$$

In Equation (3), *ILO*, *ILoad* and *ILoq* represent the STATCOM's load current and the load current with respect to the d-axis and q-axis, respectively. Similarly, *Vdc* represents DC-ref voltage at the input of the STATCOM. Further, Equation (4) can be modified as follows:

$$V\_0 = \frac{\mathbb{C}^2}{\mathbb{C}\_{dc}} V\_{dc} \angle \theta \left[ I\_{Load} \text{Cost} \theta + I\_{loq} \text{Sim} \theta \right] \tag{5}$$

Equation (5) represents the output voltage equation of the STATCOM, designed based on the d- and q-axis current levels. Here, "*c*" represents the ratio between the AC and DC voltages. In order to calculate the virtual electrical torque, the speed deviation has been taken into consideration, *δω*. Therefore, the new damping controller can be designed as a lead–lag compensating controller.

Based on Equation (5), it is understood that the proper tuning of the STATCOM parameters, such as *θ* and C, is required to minimize the damping at the injected voltage level. Therefore, the optimization objective function can be formulated as

$$J = \Sigma\_{i=1}^{N\_p} \int\_0^t |\delta \omega\_i| t dt \tag{6}$$

In Equation (6), t represents the simulation time for the model and *Np* represents the size of the population in genetic algorithm. The objective is to minimize the cost function and thereby improve the settling time and overshoot.

During cost function optimization using GA, there is a state called the fitness function or value evaluation, which requires a probability evaluation of each chromosome pair in the objective function. This requires an iteration to be run in order to evaluate the fitness value. Therefore, in order to reduce the optimization time in evaluating the constraints at each step, long short-term memory (LSTM) has been introduced. LSTM will hold the best solution for subsequent levels of iteration and thereby reduce the optimization time by *tn*−*best*, where *tn* is the total duration of the iteration, which has been reduced to *tn*−*best* based on the best solution.

Figure 5 shows the LSTM–GA architecture for STATCOM PI controller optimization. As observed, GA produces two sets of optimized data related to the electrical torque reference value and C value, which is simply the ratio of the DC injected voltage to the AC injected voltage. The LSTM encoder will hold the best-optimized value during GA iteration, along with the time stamp. Therefore, during the decoding process, the same time stamp can be utilized for reactive power generation and subsequent voltage support, along with SSR damping.

**Figure 5.** LSTM–GA architecture for STATCOM PI controller optimization.

In order to properly train the model, it is highly recommended to activate each layer in the LSTM architecture using the appropriate activation function. The inputs to the activation layer are represented by *f* and *V*, while the output of the LSTM network provides the reactive power compensation factor in *V*∠*δ*. Generally, each layer in the activation module evaluates the weighted sum of all its input connections and maps it to an output, as shown in Equation (7), where *λ* represents the layer of the input module.

$$V\_{\lambda\_j} = \sum\_i V \angle \delta\_{\lambda\_{ji}} y\_i \quad \text{for } \lambda \in \{f\_\prime V\_\prime, Q\_\prime P\} \tag{7}$$

The recurrent connection between each layer *λ* can be varied by changing the unit of *i*. By applying the squashing function *fλ<sup>i</sup>* on *yi*, the output for each layer *λ* can be modeled as

$$y\_{\lambda\_j} = f\_{\lambda i}(V\_{\lambda j}) \quad \text{for } \lambda \in \{f, V, Q\} \tag{8}$$

In Equation (6), a cascaded inner current control loop has been implemented to interconnect LSTM and GA with the PI control features. Each memory cell unit in LSTM holds the previous state in the same proportion as the activation in the forget layer gate. Therefore, the current state vector *Scj* updates itself based on the modulus of the activation function at the input gate. Hence,

$$S\_{c\dot{j}} = Y\_{\psi\dot{j}}\hat{S}\_{c\dot{j}} + y\_{i\dot{j}}x\_{c\dot{j}} \tag{9}$$

Based on Equation (9), the learning rate can be made more effective by designing each layer to track the activity flow over time. To achieve this, an eligibility trace module has been provided to trace the most recent activity value, as presented in Equation (8).

$$
\sum \lambda\_{j\bar{i}} = \mathbf{Y}\_{\bar{i}} \dots \forall \lambda \in [v \angle \delta, \theta] \tag{10}
$$

Similarly, the memory cell and forget gate can be modeled as

$$\sum P\_{\rm ji} = \mathcal{Y}\_{\rm ef} \mathbb{\hat{e}} P\_{\rm ji} + \mathcal{Y}\_{l\rm j} \text{Yi} \tag{11}$$

To develop a robust algorithm to track the required output against the predicted output, a time range of [0, 1] has been implemented. The cross-entropy function has been used to quantify the error between the predicted and actual outputs of the LSTM module. The pseudo-code for the implementable algorithm is presented in Algorithm 1. GA requires the appropriate encoding and representation of solutions as chromosomes. In convex optimization (Algorithm 1), the solutions are typically represented as vectors or matrices, and the optimization algorithms exploit the convex structure. The mapping of these representations to the chromosome structure is used in GA.

**Algorithm 1** Voltage and angle error evaluation—training pseudo-code

```
Require: Ver,Ider, θs
Ensure: 3 Variable state transition pattern
  for Vt = 1 do
     for f=-1 do
         for Ver = 0 do
             Evaluate Ver and θs
         end for
     end for
  end for
  Weight wi=min(δTer, δWer,θs )
  θxVx = max(θx−1Vx−1, θxVx)
  if (Mt0
        L−1 − Mt1
                 L ) ≤ 0.02 then
     break
  else
     (Mt0
         L−1 − Mt1
                  L ) ≤ 0.02
  end if
```