Synthesis of Cascadable DDCC-Based Universal Filter Using NAM

Abstract

A novel systematic approach for synthesizing DDCC-based voltage-mode biquadratic universal filters is proposed. The DDCCs are described by infinity-variables’ models of nullor-mirror elements which can be used in the nodal admittance matrix expansion process. Applying the proposed method, the obtained 12 equivalent filters offer the following features: multi-input and two outputs, realization of all five standard filter functions, namely lowpass, bandpass, highpass, notch and allpass, high-input impedance, employing only grounded capacitors and resistors, orthogonal controllability between pole frequency and quality factor, and cascadable, low active and passive sensitivities. The workability of some synthesized filters is verified by HSPICE simulations to demonstrate the feasibility of the proposed method.

1. Introduction

Due to the capability to realize simultaneously multiple filter functions with the same topology, continued researches have focused on the realization of universal filters. The design of biquadratic voltage-mode active filters with high-input impedance has received much interest since they can be directly cascaded to implement higher order filters without the use of additional buffer circuits [1]. Many voltage-mode universal biquadratic filters using current conveyors with multi-input/multi-output were proposed in the literature [2,3,4,5,6,7,8,9,10].

Recently, a symbolic framework for systematic synthesis of a linear active circuit without any detailed prior knowledge of the circuit form was presented [11,12,13,14,15]. This method, called nodal admittance matrix (NAM) expansion, is very useful to generate various novel circuits in a systematic way. Based on this method, various active networks such as filters, oscillators and gyrators employing OTA, CCII, BOCCII, DVCC and CCCCTA have been synthesized [16,17,18,19,20,21]. The circuit synthesis procedure proposed in [12] is suitable to synthesize discrete transfer functions with different circuit topologies. It is difficult to synthesize multiple filter functions using an identical topology. The systematic generation of current-mode filters using NAM expansion was reported in [16]. The trans-impedance filter synthesis based on NAM expansion was reported in [17]. In [19], the synthesis of CCII-based voltage-mode high-Q biquadratic notch filter was reported recently.

Since the differential difference current conveyor (DDCC) is a circuit similar to a DDA at the input side and a CCII at the output side [22], it enjoys the combined advantages of the CCII and DDA with high-input impedance, low-output impedance, greater design flexibility, larger signal bandwidth and wider current dynamic range, several universal filters using DDCCs have been proposed [23,24,25,26]. Unfortunately, most papers just propose their novel circuits; the design or synthesis methods for DDCC-based universal filters are not available.

In this paper, a systematic generation of cascadable DDCC-based universal voltage-mode biquadratic filters is presented. The obtained 12 filters configurations with two outputs can be used to realize all the five generic filter functions. They comprise three active elements and five passive grounded capacitors and resistors, with the features of high input impedance, low active and passive sensitivities, and orthogonal adjustability of the resonance angular frequency and quality factor. The filter with grounded capacitors is helpful for easing the elimination/accommodation of various parasitic effects for monolithic integration. HSPICE simulations for two illustrated derived filters confirm the workability of the obtained circuits, and hence demonstrate the feasibility of the proposed approach.

2. Description of the Proposed Method

The port relations of an ideal DDCC can be characterized by (1), where the plus and minus signs indicate whether the current conveyor is DDCC+ or DDCC−. Figure 1 shows the symbolic pathological representations of DDCCs. It is clear that each of terminal-Y_i (i = 1–3) possesses high input impedance.

$$\left[\begin{array}{c}{\text{V}}_{\mathrm{X}}\\ {\text{I}}_{\text{Y}1}\\ {\text{I}}_{\text{Y}2}\\ {\text{I}}_{\text{Y}3}\\ {\text{I}}_{\mathrm{Z}}\end{array}\right]=\left[\begin{array}{cccc}1& -1& 1& 0\\ 0& 0& 0& 0\\ 0& 0& 0& 0\\ 0& 0& 0& 0\\ 0& 0& 0& \pm 1\end{array}\right]\left[\begin{array}{c}{\text{V}}_{\text{Y}1}\\ {\text{V}}_{\text{Y}2}\\ {\text{V}}_{\text{Y}3}\\ {\text{I}}_{\mathrm{X}}\end{array}\right]$$

(1)

Figure 1. The symbolic pathological representations of DDCCs.

Figure 1. The symbolic pathological representations of DDCCs.

In the NAM expansion process, the addition of row and column of zero terms and infinity-variable terms with a common node on the primary diagonal of the admittance matrix is needed to transform the admittance terms to their correct form. The correct form set of admittance terms includes a unique positive term on the primary diagonal realizing a grounded admittance and a group of four terms with two positive terms on the primary diagonal and two negative terms on the off-diagonal representing a floating admittance. Therefore, in the synthesized circuits, pairs of pathological elements with a common node can be realized by the proper type of CCIIs [19].

The DDCC is similar to a CCII but with two more additional terminals, i.e., terminal-Y₂ and terminal-Y₃. Thus, the DDCC- and DDCC+ can be respectively represented by infinity-variables notation given by Equations (2) and (3) in NAM expansion with the common node on the primary diagonal assigned to terminal-X. The signs of infinity-variables of terminal-Y₁ and terminal-Y₃ are different to that of terminal-X, while the signs of infinity-variables of terminal-X and terminal-Y₂ are identical. Based on the infinity-variables notation in (2) and (3), it can be seen that the connection between terminal-X and terminal-Y₁ or terminal-Y₃ corresponds to a nullator, and the connection between terminal-X and terminal-Y₂ corresponds to a voltage-mirror (VM). These relationships are very important for deriving the numerator of the transfer function of the synthesized filters.

$$\begin{array}{l}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_3\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_2\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_1\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\text{X}\\ \left[\begin{array}{cccc}-{\infty }_{\text{i}}& {\infty }_{\text{i}}& -{\infty }_{\text{i}}& {\infty }_{\text{i}}\\ {\infty }_{\text{i}}& -{\infty }_{\text{i}}& {\infty }_{\text{i}}& -{\infty }_{\text{i}}\end{array}\right]\begin{array}{l}\text{X}\\ \text{Z}-\end{array}\end{array}$$

(2)

$$\begin{array}{l}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_3\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_2\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{\text{Y}}_1\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\text{X}\\ \hspace{0.17em}\left[\begin{array}{cccc}-{\infty }_{\text{i}}& {\infty }_{\text{i}}& -{\infty }_{\text{i}}& {\infty }_{\text{i}}\\ -{\infty }_{\text{i}}& {\infty }_{\text{i}}& -{\infty }_{\text{i}}& {\infty }_{\text{i}}\end{array}\right]\hspace{0.17em}\begin{array}{l}\text{X}\\ \text{Z}+\end{array}\end{array}$$

(3)

It is known that to synthesize filter circuits using NAM expansion, the denominator D(s) of a transfer function of a filter should be expressed as an admittance matrix in NAM equations shown in Equation (4). This matrix can be used as a starting matrix to find the circuit configuration with no input signals. Then, the equivalent circuit of an input voltage source as shown in Figure 2 can be injected to the obtained circuit represented by expanded NAM of (4) to obtain the voltage-mode filters [19].

$$\left[\begin{array}{cccccc}{\text{y}}_{1,1}& {\text{y}}_{1,2}& \dots & {\text{y}}_{1,\text{j}}& \dots & {\text{y}}_{1,\text{n}}\\ {\text{y}}_{2,1}& {\text{y}}_{2,2}& \dots & {\text{y}}_{2,\text{j}}& \dots & {\text{y}}_{2,\text{n}}\\ ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ {\text{y}}_{\text{i},1}& {\text{y}}_{\text{i},2}& \dots & {\text{y}}_{\text{i},\text{j}}& \dots & {\text{y}}_{\text{i},\text{n}}\\ ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ {\text{y}}_{\text{n},1}& {\text{y}}_{\text{n},2}& \dots & {\text{y}}_{\text{n},\text{j}}& \dots & {\text{y}}_{\text{n},\text{n}}\end{array}\right]$$

(4)

Figure 2. R-nullor equivalent circuit of a voltage source.

Figure 2. R-nullor equivalent circuit of a voltage source.

To synthesize DDCC-grounded capacitor-based filters using NAM expansion, we firstly use the NAM stamps of CCIIs [15] to expand the starting matrix in (4). The expanded NAM of (4) includes the correct form of admittance elements and pairs of infinity-variables represented terminal-X, terminal-Z and one terminal-Y_i of DDCCs. The remained Y_i-terminals can be used to inject the input voltage source for deriving high input impedance filters. The procedure can be summarized as follows.

Step 1:

Of the desired transfer function of the synthesized filter in the form of the Matrix (4). It must be noted that each capacitor in the denominator must be arranged to have only a single position on the primary diagonal to obtain circuits with grounded capacitors.

Step 2:

Introduce a row and a column of zeros to row 1 and column 1 and place a unity resistor to position (1,1) of (4). The existing columns and rows are moved to the right and to the bottom, as given by (5). Then add infinity variables and zero terms to realize a nullator between column 1 and column 2 and a norator between row 2 and ground. The Step 2 corresponds to the adding of the equivalent circuit of voltage source in Figure 2 [19]. So, Matrix (5) becomes (6).

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ 0& {\text{y}}_{1,1}& {\text{y}}_{1,2}& \dots & {\text{y}}_{1,\text{j}}& \dots & {\text{y}}_{1,\text{n}}\\ 0& {\text{y}}_{2,1}& {\text{y}}_{2,2}& \dots & {\text{y}}_{2,\text{j}}& \dots & {\text{y}}_{2,\text{n}}\\ ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ 0& {\text{y}}_{\text{i},1}& {\text{y}}_{\text{i},2}& \dots & {\text{y}}_{\text{i},\text{j}}& \dots & {\text{y}}_{\text{i},\text{n}}\\ ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ 0& {\text{y}}_{\text{n},1}& {\text{y}}_{\text{n},2}& \dots & {\text{y}}_{\text{n},\text{j}}& \dots & {\text{y}}_{\text{n},\text{n}}\end{array}\right]$$

(5)

$$\left[\begin{array}{cccccccc}1& 0& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0& 0\\ 0& 0& {\text{y}}_{1,1}& {\text{y}}_{1,2}& \dots & {\text{y}}_{1,\text{j}}& \dots & {\text{y}}_{1,\text{n}}\\ 0& 0& {\text{y}}_{2,1}& {\text{y}}_{2,2}& \dots & {\text{y}}_{2,\text{j}}& \dots & {\text{y}}_{2,\text{n}}\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ 0& 0& {\text{y}}_{\text{i},1}& {\text{y}}_{\text{i},2}& \dots & {\text{y}}_{\text{i},\text{j}}& \dots & {\text{y}}_{2,\text{n}}\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮\\ 0& 0& {\text{y}}_{\text{n},1}& {\text{y}}_{\text{n},2}& \dots & {\text{y}}_{\text{n},\text{j}}& \dots & {\text{y}}_{\text{n},\text{n}}\end{array}\right]$$

(6)

Step 3:

Use the NAM expansion method to expand the Matrix (6) [12,15]. The obtained matrix can be expressed by (7), for example.

$$\left[\begin{array}{ccccccccc}1& 0& 0& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& {\text{y}}_{1,1}& {\infty }_{\text{i}}& \dots & {\text{y}}_{1,\text{j}}& \dots & {\text{y}}_{1,\text{n}}& -{\infty }_{\text{i}}\\ 0& 0& {\text{y}}_{2,1}& {\text{y}}_{2,2}& \dots & {\text{y}}_{2,\text{j}}& \dots & {\text{y}}_{2,\text{n}}& 0\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮& ⋮\\ 0& 0& {\text{y}}_{\text{i},1}& {\text{y}}_{\text{i},2}& \dots & {\text{y}}_{\text{i},\text{j}}& \dots & {\text{y}}_{\text{i},\text{n}}& 0\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮& ⋮\\ 0& 0& {\text{y}}_{\text{n},1}& {\text{y}}_{\text{n},2}& \dots & {\text{y}}_{\text{n},\text{j}}& \dots & {\text{y}}_{\text{n},\text{n}}& 0\\ 0& 0& 0& -{\infty }_{\text{i}}& 0& 0& 0& 0& {\text{y}}_{1,2}+{\infty }_{\text{i}}\end{array}\right]$$

(7)

Step 4:

Add pair of infinity-variables of remained Y_i-terminals represented by (2) or (3) to the suitable positions in column 2 of the Matrix (7) to realize the infinity-variables notation of a DDCC+ or DDCC−. This operation will duplicate the existing admittance terms to the first column of (5), so the numerator of the desired transfer function is obtained. For example, by adding a pair of ± ∞_i to the second column of (7), the term y_1,2 will be duplicated in the first column of (5) to obtain the desired numerator, as shown in (8). The addition of infinity-variable pairs to column 2 corresponds to applying input voltage signal to the added Y_i-terminals at node 2. This operation will not affect the denominator of the transfer function. The obtained matrix represents the full matrix of the synthesized circuit.

$$\left[\begin{array}{ccccccccc}1& 0& 0& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0& 0& 0\\ 0& \pm {\infty }_{\text{i}}& {\text{y}}_{1,1}& {\infty }_{\text{i}}& \dots & {\text{y}}_{1,\text{j}}& \dots & {\text{y}}_{1,\text{n}}& -{\infty }_{\text{i}}\\ 0& 0& {\text{y}}_{2,1}& {\text{y}}_{2,2}& \dots & {\text{y}}_{2,\text{j}}& \dots & {\text{y}}_{2,\text{n}}& 0\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮& ⋮\\ 0& 0& {\text{y}}_{\text{i},1}& {\text{y}}_{\text{i},2}& \dots & {\text{y}}_{\text{i},\text{j}}& \dots & {\text{y}}_{\text{i},\text{n}}& 0\\ ⋮& ⋮& ⋮& ⋮& \dots & ⋮& \dots & ⋮& ⋮\\ 0& 0& {\text{y}}_{\text{n},1}& {\text{y}}_{\text{n},2}& \dots & {\text{y}}_{\text{n},\text{j}}& \dots & {\text{y}}_{\text{n},\text{n}}& 0\\ 0& \pm {\infty }_{\text{i}}& 0& -{\infty }_{\text{i}}& 0& 0& 0& 0& {\text{y}}_{1,2}+{\infty }_{\text{i}}\end{array}\right]$$

(8)

It can be observed that in the starting Matrix (5), the node 1 is chosen as input voltage node and other nodes can be output nodes. In (6), the node 1 and node 2 are connected by a nullator then they are equivalent to the input node, and other nodes can be output nodes. In Step 4, each pair of infinity-variables added to the second column of the obtained matrix in Step 3 corresponds to the injecting of input voltage signal to one Y-terminal of DDCCs. So, the circuits with high input impedance and multi-input and multi-output properties can therefore be synthesized.

3. Application Examples

We hope to synthesize biquadratic voltage-mode universal filters using a minimum number of passive elements with independent adjustable parameters of Q factor and pole frequency. The denominator of the transfer function is chosen as (9).

$$\text{D}\left(\text{s}\right)={\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3$$

(9)

According to the procedure of Step 1 in Section 2, the Equation (9) is expressed by (10) and (11) in the form of (4).

$$\left[\begin{array}{cc}{\text{G}}_1+\text{s}{\text{C}}_1& -{\text{G}}_2\\ {\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(10)

$$\left[\begin{array}{cc}{\text{G}}_1+\text{s}{\text{C}}_1& {\text{G}}_2\\ -{\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(11)

The Matrices (10) and (11) are defined as NAM type-A and NAM type-B, respectively. They are used as the starting matrices in NAM expansion.

3.1. Synthesis of Type-A Universal Filters

Following Step 2 of the procedure in Section 2, the equivalent NAMs (12) and (13) are obtained from (10). In the Matrix (12), the node 1 is chosen as input node, nodes 2 and 3 are chosen as outputs, respectively denoted by V_ou1 and V_out2. In (13), the output voltage nodes V_out1 and V_out2 are moved to node 3 and 4, respectively.

$$\left[\begin{array}{ccc}1& 0& 0\\ 0& {\text{G}}_1+\text{s}{\text{C}}_1& -{\text{G}}_2\\ 0& {\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(12)

$$\left[\begin{array}{cccc}1& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0\\ 0& 0& {\text{G}}_1+\text{s}{\text{C}}_1& -{\text{G}}_2\\ 0& 0& {\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(13)

Using Step 3, three columns and rows of zero terms are added and pairs of nullor-mirror elements represented by ∞₂, ∞₃ and ∞₄ are introduced to the right and bottom of Matrix (13). So, Matrix (13) can be expanded as (14). There are eight alternative cases (cases 1–8) in expanding the Matrix (13), as shown in Table 1.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(14)

In (14), the DDCC(1), DDCC(2) and DDCC(3) are represented by terms ±∞₂, ±∞₃ and ±∞₄, respectively. Based on the NAM stamps in (2) and (3) and the common node on the primary diagonal assigned for terminal-X of a DDCC, the terminal-X of DDCC(1) can be node 5, terminal-Y₁ and terminal-Z (of minus-type DDCC) are connected to node 3. For the DDCC(2), the terminal-X is connected to node 6, terminal-Y₁ is connected to node 4 and terminal-Z (plus-type DDCC) is connected to node 3. For the DDCC(3), the terminal-X is connected to node 7, terminal-Y₁ is connected to node 3 and terminal-Z (minus type DDCC) is connected to node 4. All of the terminal-Y₂ and terminal-Y₃ of DDCC(1), DDCC(2) and DDCC(3) can be used to inject the input voltage source.

Using Step 4, by injecting the input voltage source into terminal-Y₂ of DDCC(1), the term –sC₁ will be added to position (2,1) of (12), then a highpass function at V_out1 and bandpass function at V_out2 can be obtained. This operation corresponds to the inserting of term ±∞₂ to the second column of (14), as shown in (15). The obtained filter represented by (15) is shown in Figure 3a with nodes V_in2, V_in3, V_in4, V_in5 and V_in6 being grounded.

By applying the input voltage source to terminal-Y₃ of DDCC(1), the term sC₁ will be also created in position (2,1) of (12). Therefore, the admittance matrix is shown in (16) and the obtained transfer functions at nodes V_out1 and V_out2 are identical to that obtained in (15) but with reverse signs. The derived circuit is shown in Figure 3a with moving the injected voltage source equivalent circuit to node V_in2 and grounding nodes V_in1, V_in3, V_in4, V_in5 and V_in6.

Table 1. Eight cases of expanding NAM Type-A.

NAM Type-A (Case 1)	NAM Type-A (Case 2)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 3)	NAM Type-A (Case 4)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 5)	NAM Type-A (Case 6)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 7)	NAM Type-A (Case 8)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$

Table 1. Eight cases of expanding NAM Type-A.

NAM Type-A (Case 1)	NAM Type-A (Case 2)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 3)	NAM Type-A (Case 4)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 5)	NAM Type-A (Case 6)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-A (Case 7)	NAM Type-A (Case 8)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& {\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$

Figure 3. The pathological representations of derived type-A filters (cases 1–4).

Figure 3. The pathological representations of derived type-A filters (cases 1–4).

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_2& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& {\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(15)

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& {\infty }_2& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& -{\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(16)

Similarly, by applying the input voltage source to terminal-Y₂ of DDCC(2), term G₂ will appear in the position (2,1) of (12), then a bandpass function at V_out1 and a lowpass function at V_out2 can be obtained. The admittance matrix can be given in (17) and the derived circuit is shown in Figure 3a with moving the injected voltage source to node V_in3 and grounding nodes V_in1, V_in2, V_in4, V_in5 and V_in6.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& {\infty }_3& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& {\infty }_3& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(17)

By applying the input voltage source to terminal-Y₃ of DDCC(2), the term –G₂ will appear in position (2,1) of (12), then we can obtain the admittance matrix in (18) and the filter with identical transfer functions as (17) but with different signs at nodes V_out1 and V_out2. For the circuit in Figure 3a, moving the injected voltage source equivalent circuit to node V_in4 with nodes V_in1, V_in2, V_in3, V_in5 and V_in6 as grounded nodes, we can obtain the filter represented by (18).

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_3& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& 0& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& -{\infty }_3& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(18)

Also, a lowpass function at V_out1 can be achieved by applying the input voltage source to terminal-Y₂ of DDCC(3) when the term –G₃ appear in position (3,1) of (12). This operation corresponds to the inserting of terms ±∞₄ to the second column of (14), as shown in (19). The obtained circuit is shown in Figure 3a by moving the injected voltage source to node V_in5 with nodes V_in1, V_in2, V_in3, V_in4 and V_in6 being grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& -{\infty }_4& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& {\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(19)

By applying the input voltage source to terminal-Y₃ of DDCC(3), term G₃ will arise in position (3,1) of (12), then the obtained transfer function at node V_out1 is identical to the circuit represented by (19) with reverse sign. Its admittance matrix is shown in (20) and the circuit is given in Figure 3a by moving the injected voltage source to node V_in6 with nodes V_in1, V_in2, V_in3, V_in4 and V_in5 being grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& {\infty }_4& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& -{\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(20)

In addition, a notch function at V_out1 can be achieved by applying the input voltage source to terminal-Y₂ of DDCC(1) and terminal-Y₂ of DDCC(3) when the terms –sC₁ and –G₃ arise in positions (2, 1) and (3, 1) of (12), respectively. This operation corresponds to the inserting of terms ±∞₂ and ±∞₄ to the second column of (14), as shown in (21). The obtained circuit is given in Figure 3a by moving the injected voltage source to the merged node of V_in1 and V_in5 with nodes V_in2, V_in3, V_in4 and V_in6 being grounded. Another notch function at V_out1 can be also obtained by injecting the input voltage source to the merged node of V_in2 and V_in6 in Figure 3a with nodes V_in1, V_in3, V_in4 and V_in5 being grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_2& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& -{\infty }_4& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& {\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& {\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(21)

Applying the input voltage source to terminal-Y₂ of DDCC(1), terminal-Y₂ of DDCC(2) and terminal-Y₂ of DDCC(3), terms –sC₁+G₂ and –G₃ will be created in positions (2, 1) and (3, 1) of (12), respectively, then an allpass function at V_out1 (with G₂ = G₁) can be achieved. This operation corresponds to the insertion of the terms ±∞₂, ∞₃ and ±∞₄ to the second column of (14) as shown in (22). In Figure 3a, moving the injected voltage source to the merged node of V_in1, V_in3 and V_in5 with nodes V_in2, V_in4 and V_in6 being grounded, we can obtain the filter represented by (22). Another allpass function at V_out1 can be also obtained by injecting the input voltage source to the merged node of V_in2, V_in4 and V_in6 in Figure 3a with nodes V_in1, V_in3, and V_in5 being grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_2+{\infty }_3& {\text{G}}_1+{\infty }_2& -{\infty }_3& -{\infty }_2& {\infty }_3& 0\\ 0& -{\infty }_4& {\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& {\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& {\infty }_3& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& {\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(22)

In the same way, the synthesized procedure can be applied to the matrices for cases 2–8 in Table 1. Four equivalent circuits of the derived filters for cases 1–4 of derived type-A filters in Table 1 are shown in Figure 3. The output transfer functions of the synthesized circuits for case 1 are given by (23) and (24). Besides, four equivalent circuits of the synthesized filters for cases 5–8 of derived type-A filters in Table 1 are shown in Figure 4. The output transfer functions of the synthesized circuits for case 5 are given by (25) and (26). Figure 5a–d and e–h show the practical configurations for the pathological equivalents in Figure 3 and Figure 4, respectively.

$${\text{V}}_{\text{out}1}=\frac{{\text{s}}^2{\text{C}}_1{\text{C}}_2{\text{V}}_{\text{in1}}-{\text{s}}^2{\text{C}}_1{\text{C}}_2{\text{V}}_{\text{in}2}-\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}3}+\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}4}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}5}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}6}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(23)

$${\text{V}}_{\text{out}2}=\frac{-\text{s}{\text{C}}_1{\text{G}}_3{\text{V}}_{\text{in1}}+\text{s}{\text{C}}_1{\text{G}}_3{\text{V}}_{\text{in}2}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}3}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}4}+{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}5}-{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}6}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(24)

$${\text{V}}_{\text{out}1}=\frac{{\text{s}}^2{\text{C}}_1{\text{C}}_2{\text{V}}_{\text{in1}}-\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}2}+\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}3}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}4}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}5}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(25)

$${\text{V}}_{\text{out}2}=\frac{-\text{s}{\text{C}}_1{\text{G}}_3{\text{V}}_{\text{in1}}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}2}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}3}+{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}4}-{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}5}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(26)

Figure 4. The pathological representations of derived type-A filters (cases 5–8).

Figure 4. The pathological representations of derived type-A filters (cases 5–8).

Figure 5. The practical configuration of type-A filters.

Figure 5. The practical configuration of type-A filters.

3.2. Synthesis of Type-B Universal Filters

Similarly, by applying Step 2, the equivalent NAMs (27) and (28) are obtained from (11). Applying Step 3, the Matrix (28) can be expanded as (29). There are four alternative cases (cases 1–4) that can be derived by expanding Matrix (28), as shown in Table 2.

$$\left[\begin{array}{ccc}1& 0& 0\\ 0& {\text{G}}_1+\text{s}{\text{C}}_1& {\text{G}}_2\\ 0& -{\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(27)

$$\left[\begin{array}{cccc}1& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0\\ 0& 0& {\text{G}}_1+\text{s}{\text{C}}_1& {\text{G}}_2\\ 0& 0& -{\text{G}}_3& \text{s}{\text{C}}_2\end{array}\right]$$

(28)

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(29)

Table 2. Four cases of expanding NAM Type-B.

NAM Type-B (Case 1)	NAM Type-B (Case 2)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-B (Case 3)	NAM Type-B (Case 4)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$

Table 2. Four cases of expanding NAM Type-B.

NAM Type-B (Case 1)	NAM Type-B (Case 2)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$
NAM Type-B (Case 3)	NAM Type-B (Case 4)
$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$	$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& {\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& -{\infty }_4\\ 0& 0& {\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& {\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$

In (29), the DDCC(1), DDCC(2) and DDCC(3) are represented by terms ±∞₂, ±∞₃ and ±∞₄, respectively. The terminal-X of DDCC(1) can be node 5, terminal-Y₁ and terminal-Z (minus type) are connected to node 3. For the DDCC(2), terminal-X is connected to node 6, terminal-Y₁ is connected to node 4 and terminal-Z (minus type) is connected to node 3. For the DDCC(3), the terminal-X is connected to node 7, terminal-Y₁ is connected to node 3 and terminal-Z (plus type) is connected to node 4. All of the terminal-Y₂ and terminal-Y₃ of DDCC(1), DDCC(2) and DDCC(3) can be used to inject the input voltage source.

Applying Step 4, term –sC₁ will be created in position (2,1) of (27) by injecting the input voltage source to terminal-Y₂ of the DDCC(1), then a highpass function at V_out1 and bandpass function at V_out2 can be obtained. This operation corresponds to the insertion of the term ±∞₂ to the second column of (29), as shown in (30). The obtained filter represented by (30) is shown in Figure 6a with nodes V_in2, V_in3, V_in4, V_in5 and V_in6 being grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_2& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& {\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(30)

By injecting the input voltage source to terminal-Y₃ of DDCC(1), the admittance matrix is shown in (31) and the obtained transfer functions at node V_out1 and V_out2 are identical to that obtained in (30) with reverse signs. The obtained circuit is shown in Figure 6a, moving the injected voltage source equivalent circuit to node V_in2 and grounding nodes V_in1, V_in3, V_in4, V_in5 and V_in6.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& {\infty }_2& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& -{\infty }_2& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(31)

Also, by applying the input voltage source to terminal-Y₂ of DDCC(2), a bandpass function at V_out1 and a lowpass function at V_out2 can be obtained. This is equivalent to the inserting of term ±∞₃ to the second column of (29), as shown in (32). The obtained filter is shown in Figure 6a, moving the injected voltage source equivalent circuit to node V_in3 and grounding nodes V_in1, V_in2, V_in4, V_in5 and V_in6.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& -{\infty }_3& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& {\infty }_3& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(32)

Injecting the input voltage source to terminal-Y₃ of DDCC(2), the obtained transfer functions at nodes V_out1 and V_out2 are identical to that obtained in (32) but with different signs, as shown in (33). The derived filter is shown in Figure 6a by moving the injected voltage source equivalent circuit to node V_in4 with grounding nodes V_in1, V_in2, V_in3, V_in5 and V_in6.

Besides, a lowpass function at V_out1 can be achieved by applying the input voltage source to terminal-Y₂ of DDCC(3). This operation corresponds to the inserting of terms ∞₄ to the second column of (29), as given in (34). The obtained circuit is shown in Figure 6a by moving the injected voltage source equivalent circuit to node V_in5 and grounding nodes V_in1, V_in2, V_in3, V_in4 and V_in6.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& {\infty }_3& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& 0& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& -{\infty }_3& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& 0& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(33)

Figure 6. The pathological representations of type-B filters.

Figure 6. The pathological representations of type-B filters.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& {\infty }_4& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& {\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(34)

Injecting the input voltage source to terminal-Y₃ of DDCC(3), the obtained transfer function at node V_out1 is identical to the circuit represented by (34) with reverse signs. The obtained matrix is shown in (35) and the circuit is shown in Figure 6a by moving the injected voltage source equivalent circuit to node V_in6 with grounding nodes V_in1, V_in2, V_in3, V_in4 and V_in5 grounded.

$$\left[\begin{array}{ccccccc}1& 0& 0& 0& 0& 0& 0\\ -{\infty }_1& {\infty }_1& 0& 0& 0& 0& 0\\ 0& 0& {\text{G}}_1+{\infty }_2& {\infty }_3& -{\infty }_2& -{\infty }_3& 0\\ 0& -{\infty }_4& -{\infty }_4& \text{s}{\text{C}}_2& 0& 0& {\infty }_4\\ 0& 0& -{\infty }_2& 0& \text{s}{\text{C}}_1+{\infty }_2& 0& 0\\ 0& 0& 0& -{\infty }_3& 0& {\text{G}}_2+{\infty }_3& 0\\ 0& -{\infty }_4& -{\infty }_4& 0& 0& 0& {\text{G}}_3+{\infty }_4\end{array}\right]$$

(35)

Different type-B filter functions at V_out1 and V_out2 can be obtained by using similar method as mentioned in Section 3.1. The notch function at V_out1 can be achieved by injecting the input voltage source to terminal-Y₂ of DDCC(1) and terminal-Y₂ of DDCC(3). The obtained filter is shown in Figure 6a by moving the injected voltage source equivalent circuit to the merged node of V_in1 and V_in5 and grounding nodes V_in2, V_in3, V_in4 and V_in6. Another notch function at V_out1 in Figure 6a can be also obtained by injecting the input voltage source to the merged node of V_in2 and V_in6 with nodes V_in1, V_in3, V_in4 and V_in5 being grounded. Similarly, an allpass function at V_out1 (with G₂ = G₁) can be achieved by injecting the input voltage source to terminal-Y₂ of DDCC(1), terminal-Y₃ of DDCC(2) and terminal-Y₂ of DDCC(3). The obtained circuit is shown in Figure 6a by moving the injected voltage source equivalent circuit to the merged node of V_in1, V_in4 and V_in5 and grounding nodes V_in2, V_in3 and V_in6. Another allpass function at V_out1 can be also obtained by injecting the input voltage source to the merged node of V_in2, V_in3 and V_in6 in Figure 6a with nodes V_in1, V_in4 and V_in5 being grounded.

In the same way, the above synthesized procedure can be applied to other matrices in Table 2. Four equivalent circuits of synthesized filters are shown in Figure 6. The transfer functions of the synthesized circuit for the case 1 of Table 2 are given by (36) and (37). Figure 7 shows the practical configurations realizing the pathological equivalents in Figure 6. Table 3 shows the comparison of obtained filters using the proposed method and related systematic synthesis approaches [16,17,19,21]. It clarifies the benefits of the proposed method.

$${\text{V}}_{\text{out}1}=\frac{{\text{s}}^2{\text{C}}_1{\text{C}}_2{\text{V}}_{\text{in1}}-{\text{s}}^2{\text{C}}_1{\text{C}}_2{\text{V}}_{\text{in}2}+\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}3}-\text{s}{\text{C}}_2{\text{G}}_2{\text{V}}_{\text{in}4}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}5}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}6}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(36)

$${\text{V}}_{\text{out}2}=\frac{\text{s}{\text{C}}_1{\text{G}}_3{\text{V}}_{\text{in1}}-\text{s}{\text{C}}_1{\text{G}}_3{\text{V}}_{\text{in}2}+{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}3}-{\text{G}}_2{\text{G}}_3{\text{V}}_{\text{in}4}-{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}5}+{\text{G}}_3\left({\text{G}}_1+\text{s}{\text{C}}_1\right){\text{V}}_{\text{in}6}}{{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\text{G}}_2{\text{G}}_3}$$

(37)

Figure 7. The practical configuration of type-B filters.

Figure 7. The practical configuration of type-B filters.

Table 3. Comparison of the obtained filter of related works.

Related work	Operating mode	Filter type	Using grounded capacitors	Number of active elements	Cascadable property
[16]	Current	Universal	Yes	4	Yes
[17]	Transimpedance	Single function	No	1 or 2	Yes
[19]	Voltage	Notch	No	3	No
[21]	Voltage	Lowpass and bandpass	Yes	2	Yes
This work	Voltage	Universal	Yes	3	Yes

Table 3. Comparison of the obtained filter of related works.

Related work	Operating mode	Filter type	Using grounded capacitors	Number of active elements	Cascadable property
[16]	Current	Universal	Yes	4	Yes
[17]	Transimpedance	Single function	No	1 or 2	Yes
[19]	Voltage	Notch	No	3	No
[21]	Voltage	Lowpass and bandpass	Yes	2	Yes
This work	Voltage	Universal	Yes	3	Yes

3.3. Non-Ideal Effect of Active Elements

Taking into account the non-idealities of DDCCs, the relationship of the terminal voltages and currents is given as

$$\left[\begin{array}{c}{\text{V}}_{\text{X}}\\ {\text{I}}_{\text{Y}1}\\ {\text{I}}_{\text{Y}2}\\ {\text{I}}_{\text{Y}3}\\ {\text{I}}_{\text{Z}}\end{array}\right]=\left[\begin{array}{cccc}{\text{α}}_{\text{k}1}& -{\text{α}}_{\text{k}2}& {\text{α}}_{\text{k}3}& 0\\ 0& 0& 0& 0\\ 0& 0& 0& 0\\ 0& 0& 0& 0\\ 0& 0& 0& \pm {\text{β}}_{\text{k}}\end{array}\right]\left[\begin{array}{c}{\text{V}}_{\text{Y}1}\\ {\text{V}}_{\text{Y}2}\\ {\text{V}}_{\text{Y}3}\\ {\text{I}}_{\text{X}}\end{array}\right]$$

(38)

where α_k1, α_k2 and α_k3 respectively denote the voltage tracking errors from V_Y1 to V_X, V_Y2 to V_X, and V_Y3 to V_X of the kth DDCC; and β_k denotes the current tracking error of the kth DDCC. The denominator of non-ideal transfer function of all obtained filters can be expressed by (39).

$$\text{D}\left(\text{s}\right)={\alpha }_{1\text{i}}{\beta }_1{\text{s}}^2{\text{C}}_1{\text{C}}_2+\text{s}{\text{C}}_2{\text{G}}_1+{\alpha }_{2\text{j}}{\alpha }_{3\text{k}}{\beta }_2{\beta }_3{\text{G}}_2{\text{G}}_3$$

(39)

where i, j, k = 1–2. The pole frequency ω₀ and the Q factor are expressed by (40) and (41), respectively. The active and passive sensitivities of ω₀ and Q of all obtained filters are shown in (42). It can be seen that all active and passive sensitivities are small.

$${\text{ω}}_0=\sqrt{\frac{{\text{α}}_{2\text{j}}{\text{α}}_{3\text{k}}{\text{β}}_2{\text{β}}_3{\text{G}}_2{\text{G}}_3}{{\text{α}}_{1\text{i}}{\text{β}}_1{\text{C}}_1{\text{C}}_2}}$$

(40)

$$\text{Q}=\frac{1}{{\text{G}}_1}\sqrt{\frac{{\text{α}}_{1\text{i}}{\text{α}}_{2\text{j}}{\text{α}}_{3\text{k}}{\text{β}}_1{\text{β}}_2{\text{β}}_3{\text{C}}_1{\text{G}}_2{\text{G}}_3}{{\text{C}}_2}}$$

(41)

$$\begin{array}{l}{\text{S}}_{{\text{G}}_2,{\text{G}}_3}^{{\text{ω}}_0}=-{\text{S}}_{{\text{C}}_1,{\text{C}}_2}^{{\text{ω}}_0}={\text{S}}_{{\text{C}}_1,{\text{G}}_2,{\text{G}}_3}^{\text{Q}}=-{\text{S}}_{{\text{C}}_2}^{\text{Q}}=\frac{1}{2};\\ {\text{S}}_{{\text{G}}_1}^{\text{Q}}=-1;{\text{S}}_{{\text{β}}_2,{\text{β}}_3}^{{\text{ω}}_0}={\text{S}}_{{\text{β}}_1,{\text{β}}_2,{\text{β}}_3}^{\text{Q}}=\frac{1}{2};{\text{S}}_{{\text{β}}_1}^{{\text{ω}}_0}=-\frac{1}{2};\\ {\text{S}}_{{\text{α}}_{2\text{j}},{\text{α}}_{3\text{k}}}^{{\text{ω}}_0}={\text{S}}_{{\text{α}}_{1\text{i}},{\text{α}}_{2\text{j}},{\text{α}}_{3\text{k}}}^{\text{Q}}=\frac{1}{2};{\text{S}}_{{\text{α}}_{1\text{i}}}^{{\text{ω}}_0}=-\frac{1}{2};\end{array}$$

(42)

4. Simulation Results

To verify the workability of the proposed method, HSPICE simulations using TSMC 0.35 μm process parameters were performed for two of the obtained type-A and type-B filters. The CMOS implementation of the DDCC shown in Figure 8 was used for the simulations [27]. The aspect ratios of each NMOS and PMOS transistor are (W/L = 5 μm/1 μm) and (W/L = 10 μm/1 μm), respectively. The supply voltages of DDCC are V_DD = −V_SS = 1.65 V with the biasing voltages V_B = −V_B1 = 0.76 V.

We simulated the filters in Figure 5f (type-A) and Figure 7b (type-B) for illustration. The values of capacitors are chosen as C₁ = C₂ = 10 pF for all simulations. The values of resistors are given by R₁ = 11.26 kΩ and R₂ = R₃ = 15.92 kΩ for the simulations of lowpass, bandpass and highpass filters. Figure 9 and Figure 10 show the lowpass and bandpass responses at V_out1 and V_out2 of the filter in Figure 5f with node V_in3 as input node and nodes V_in1, V_in2, and V_in4 being ground node. The frequency responses of highpass output in Figure 5f with node V_in1 as input node and nodes V_in2, V_in3, and V_in4 being grounded is shown in Figure 11. Figure 12 shows the notch responses at V_out1 of the circuit in Figure 7b, with the merged node of V_in1 and V_in5 as input node and nodes V_in2, V_in3 and V_in4 being ground node, and R₁ = 79.62 kΩ, R₂ = R₂ = R₃ = 15.92 kΩ. Figure 13 represents the frequency responses of the allpass function in Figure 7b with the merged node of V_in1, V_in4, and V_in5 as input node and V_in2 and V_in3 grounded. The R₁ = R₂ = 11.26 kΩ and R₃ = 22.52 kΩ is used. All the simulated results are consistent with our theoretical prediction. The workability of the synthesized filters is verified.

Figure 8. The CMOS circuit of DDCC [27].

Figure 8. The CMOS circuit of DDCC [27].

Figure 9. Frequency responses of the lowpass function in Figure 5f.

Figure 9. Frequency responses of the lowpass function in Figure 5f.

Figure 10. Frequency responses of the bandpass function in Figure 5f.

Figure 10. Frequency responses of the bandpass function in Figure 5f.

Figure 11. Frequency responses of the highpass function in Figure 5f.

Figure 11. Frequency responses of the highpass function in Figure 5f.

Figure 12. Frequency responses of the notch function in Figure 7b.

Figure 12. Frequency responses of the notch function in Figure 7b.

Figure 13. Frequency responses of the allpass function in Figure 7b.

Figure 13. Frequency responses of the allpass function in Figure 7b.

5. Conclusions

Based on the infinity-variables notation of the DDCC and NAM expansion technique, a systematic method for synthesis of voltage-mode DDCC-based universal biquadratic filters is proposed. The obtained filters with two outputs can realize all five generic filter functions. They have the properties of high-input impedance, employing only grounded capacitors and resistors, orthogonal controllability between pole frequency and quality factor, and low active and passive sensitivities. HSPICE simulated results show the workability of the synthesized circuits, and the feasibility of the proposed approach is confirmed.