Otani, A.; Ogawa, H.; Miyauchi, K.; Morikawa, Y.; Owada, H.; Takayanagi, I.; Okura, S.
An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor. Sensors 2025, 25, 6093.
https://doi.org/10.3390/s25196093
AMA Style
Otani A, Ogawa H, Miyauchi K, Morikawa Y, Owada H, Takayanagi I, Okura S.
An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor. Sensors. 2025; 25(19):6093.
https://doi.org/10.3390/s25196093
Chicago/Turabian Style
Otani, Ai, Hiroaki Ogawa, Ken Miyauchi, Yuki Morikawa, Hideki Owada, Isao Takayanagi, and Shunsuke Okura.
2025. "An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor" Sensors 25, no. 19: 6093.
https://doi.org/10.3390/s25196093
APA Style
Otani, A., Ogawa, H., Miyauchi, K., Morikawa, Y., Owada, H., Takayanagi, I., & Okura, S.
(2025). An Area-Efficient Readout Circuit for a High-SNR Triple-Gain LOFIC CMOS Image Sensor. Sensors, 25(19), 6093.
https://doi.org/10.3390/s25196093