Fabrication and Characterization of Thin Metal Films Deposited by Electroless Plating with Organic Additives for Electrical Circuits Applications
Abstract
:1. Introduction
2. Materials and Methods
3. Results and Discussion
3.1. Rate of Coating Deposition
3.2. SEM
3.3. AFM
3.4. XRD
4. Conclusions
Author Contributions
Funding
Data Availability Statement
Acknowledgments
Conflicts of Interest
References
- Wong, H. On the CMOS Device Downsizing, More Moore, More than Moore, and More-than-Moore for More Moore. In Proceedings of the 2021 IEEE 32nd International Conference on Microelectronics (MIEL), Nis, Serbia, 12–14 September 2021; pp. 9–15. [Google Scholar]
- Zhao, K.; Zhao, J.; Wei, X.; Guan, X.; Deng, C.; Dai, B.; Zhu, J. Bottom-Up Cu Filling of High-Aspect-Ratio through-Diamond Vias for 3D Integration in Thermal Management. Micromachines 2023, 14, 290. [Google Scholar] [CrossRef]
- Chen, X.; Chen, Z.; Xiao, L.; Hao, Y.; Wang, H.; Ding, Y.; Zhang, Z. Fabrication and Electrical Characterization of High Aspect Ratio Through-Silicon Vias with Polyimide Liner for 3D Integration. Micromachines 2022, 13, 1147. [Google Scholar] [CrossRef]
- Shenglin, M.; Yufeng, J. TSV 3D RF Integration: High Resistivity Si Interposer Technology; Elsevier: Amsterdam, The Netherlands, 2022; ISBN 978-0-323-99602-0. [Google Scholar]
- Noia, B.; Chakrabarty, K. Design-for-Test and Test Optimization Techniques for TSV-Based 3D Stacked ICs, 1st ed.; Springer International Publishing: Cham, Switzerland, 2014; ISBN 978-3-319-02378-6. [Google Scholar]
- Shen, W.-W.; Chen, K.-N. Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV). Nanoscale Res. Lett. 2017, 12, 56. [Google Scholar] [CrossRef]
- Lau, J.H. Evolution, Challenge, and Outlook of TSV, 3D IC Integration and 3d Silicon Integration. In Proceedings of the 2011 International Symposium on Advanced Packaging Materials (APM), Xiamen, China, 25–28 October 2011; pp. 462–488. [Google Scholar]
- Lau, J.H. Overview and Outlook of Through-silicon via (TSV) and 3D Integrations. Microelectron. Int. 2011, 28, 8–22. [Google Scholar] [CrossRef]
- Ko, C.-T.; Chen, K.-N. Wafer-Level Bonding/Stacking Technology for 3D Integration. Microelectron. Reliab. 2010, 50, 481–488. [Google Scholar] [CrossRef]
- Du, Y.; Wu, D.; Song, Z.; Liu, M.; Yang, S.; Wang, Z. 3-D Integration of MEMS and CMOS Using Electroless Plated Nickel Through-MEMS-Vias. J. Microelectromech. Syst. 2016, 25, 770–779. [Google Scholar] [CrossRef]
- Ramm, P.; Klumpp, A.; Weber, J.; Taklo, M.M.V. 3D System-on-Chip Technologies for More than Moore Systems. Microsyst. Technol. 2010, 16, 1051–1055. [Google Scholar] [CrossRef]
- De Messemaeker, J.; Pedreira, O.V.; Philipsen, H.; Beyne, E.; De Wolf, I.; Van Der Donck, T.; Croes, K. Correlation between Cu Microstructure and TSV Cu Pumping. In Proceedings of the 2014 IEEE 64th Electronic Components and Technology Conference (ECTC), Orlando, FL, USA, 27–30 May 2014; pp. 613–619. [Google Scholar]
- Bea, J.; Lee, K.; Fukushima, T.; Tanaka, T.; Koyanagi, M. Evaluation of Cu Diffusion from Cu Through-Silicon Via (TSV) in Three-Dimensional LSI by Transient Capacitance Measurement. IEEE Electron. Device Lett. 2011, 32, 940–942. [Google Scholar] [CrossRef]
- Wang, Z. 3-D Integration and Through-Silicon Vias in MEMS and Microsensors. J. Microelectromech. Syst. 2015, 24, 1211–1244. [Google Scholar] [CrossRef]
- O’Sullivan, E.J.; Schrott, A.G.; Paunovic, M.; Sambucetti, C.J.; Marino, J.R.; Bailey, P.J.; Kaja, S.; Semkow, K.W. Electrolessly Deposited Diffusion Barriers for Microelectronics. IBM J. Res. Dev. 1998, 42, 607–620. [Google Scholar] [CrossRef]
- Zhang, Z.; Hu, X.; Jiang, X.; Li, Y. Influences of Mono-Ni(P) and Dual-Cu/Ni(P) Plating on the Interfacial Microstructure Evolution of Solder Joints. Met. Mat. Trans. A 2019, 50, 480–492. [Google Scholar] [CrossRef]
- Magagnin, L.; Sirtori, V.; Seregni, S.; Origo, A.; Cavallotti, P.L. Electroless Co–P for Diffusion Barrier in Pb-Free Soldering. Electrochim. Acta 2005, 50, 4621–4625. [Google Scholar] [CrossRef]
- Murugesan, M.; Mori, K.; Bea, J.C.; Koyanagi, M.; Fukushima, T. High Aspect Ratio Through-Silicon-via Formation by Using Low-Cost Electroless-Ni as Barrier and Seed Layers for 3D-LSI Integration and Packaging Applications. Jpn. J. Appl. Phys. 2020, 59, SGGC02. [Google Scholar] [CrossRef]
- Murugesan, M.; Fukushima, T.; Mori, K.; Nakamura, A.; Lee, Y.; Motoyoshi, M.; Bea, J.C.; Watariguchi, S.; Koyanagi, M. Fully-Filled, Highly-Reliable Fine-Pitch Interposers with TSV Aspect Ratio >10 for Future 3D-LSI/IC Packaging. In Proceedings of the 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, USA, 28–31 May 2019; pp. 1047–1051. [Google Scholar]
- Lee, K.-W.; Wang, H.; Bea, J.-C.; Murugesan, M.; Sutou, Y.; Fukushima, T.; Tanaka, T.; Koike, J.; Koyanagi, M. Barrier Properties of CVD Mn Oxide Layer to Cu Diffusion for 3-D TSV. IEEE Electron. Device Lett. 2014, 35, 114–116. [Google Scholar] [CrossRef]
- Murugesan, M.; Bea, J.C.; Lee, K.W.; Fukushima, T.; Tanaka, T.; Koyanagi, M.; Sutou, Y.; Wang, H.; Koike, J. Effect of CVD Mn Oxide Layer as Cu Diffusion Barrier for TSV. In Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA, USA, 2–5 October 2013; pp. 1–4. [Google Scholar]
- Lee, K.W.; Nagai, C.; Nakamura, A.; Bea, J.C.; Murugesan, M.; Fukushima, T.; Tanaka, T.; Koyanagi, M. Effects of Electro-Less Ni Layer as Barrier/Seed Layers for High Reliable and Low Cost Cu TSV. In Proceedings of the 2014 International 3D Systems Integration Conference (3DIC), Kinsdale, Ireland, 1–3 December 2014; pp. 1–4. [Google Scholar]
- Murugesan, M.; Fukushima, T.; Koyanagi, M. 500 Nm-Sized Ni-TSVwith Aspect Ratio 20 for Future 3D-LSIs_A Low-Cost Electroless-Ni Plating Approach. In Proceedings of the 2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, USA, 6–9 May 2019; pp. 1–5. [Google Scholar]
- Xiao, J.; Wang, F.; Li, J.; Chen, Z. Comparison of Interfacial Reactions and Isothermal Aging of Cone Ni-P and Flat Ni-P with Sn3.5Ag Solders. Appl. Surf. Sci. 2023, 625, 157219. [Google Scholar] [CrossRef]
- Hu, Y.; Xiong, L.; Li, M.; Hang, T. Covalently Formation of Insulation and Barrier Layers in High Aspect Ratio TSVs. Appl. Surf. Sci. 2022, 573, 151588. [Google Scholar] [CrossRef]
- Mohanty, U.S.; Tripathy, B.C.; Singh, P.; Keshavarz, A.; Iglauer, S. Roles of Organic and Inorganic Additives on the Surface Quality, Morphology, and Polarization Behavior during Nickel Electrodeposition from Various Baths: A Review. J. Appl. Electrochem. 2019, 49, 847–870. [Google Scholar] [CrossRef]
- Delaunois, F.; Vitry, V.; Bonin, L. Electroless Nickel Plating: Fundamentals to Applications; CRC Press: Boca Raton, FL, USA, 2019. [Google Scholar]
- Keping, H.; Fang, J.L. Stabilization Effect of Electroless Nickel Plating by Thiourea. Met. Finish. 1997, 95, 73–75. [Google Scholar] [CrossRef]
- Du, Y.; Song, Z.; Zhu, H.; Wang, Z. Fabrication of Ni Microbumps with Small Feature Size on Au Using Electroless Ni Plating with Noncontact Induction. IEEE Trans. Compon. Packag. Manufact. Technol. 2015, 5, 1169–1177. [Google Scholar] [CrossRef]
- Murugesan, M.; Mori, K.; Kojima, T.; Hashimoto, H.; Bea, J.C.; Fukushima, T.; Koyanagi, M. Nano Ni/Cu-TSVs with an Improved Reliability for 3D-IC Integration Application. In Proceedings of the 2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, USA, 24–26 August 2020; pp. 1–5. [Google Scholar]
- Li, Z.; Tian, Y.; Teng, C.; Cao, H. Recent Advances in Barrier Layer of Cu Interconnects. Materials 2020, 13, 5049. [Google Scholar] [CrossRef]
- Lee, B.; Jeon, H.; Jeon, S.-J.; Kwon, K.-W.; Lee, H.-J. A Study on the Breakdown Mechanism of an Electroless-Plated Ni(P) Diffusion Barrier for Cu/Sn/Cu 3D Interconnect Bonding Structures. J. Electron. Mater. 2012, 41, 109–114. [Google Scholar] [CrossRef]
- Lee, B.; Jeon, H.; Gan, C.L.; Lee, H.-J. Thermal Reliability of a Bilayer of Ni(P)/Cu as a Diffusion Barrier for Cu/Sn/Cu Bonding. Jpn. J. Appl. Phys. 2016, 55, 06JF03. [Google Scholar] [CrossRef]
- Li, Y.; Wang, Z.; Li, X.; Hu, X.; Lei, M. Growth Behavior of IMCs Layer of the Sn–35Bi–1Ag on Cu, Ni–P/Cu and Ni–Co–P/Cu Substrates during Aging. J. Mater. Sci. Mater. Electron. 2019, 30, 1519–1530. [Google Scholar] [CrossRef]
- Keong, K.G.; Sha, W. Crystallisation and Phase Transformation Behaviour of Electroless Nickel-Phosphorus Deposits and Their Engineering Properties. Surf. Eng. 2002, 18, 329–343. [Google Scholar] [CrossRef]
- Guo, Z.; Keong, K.G.; Sha, W. Crystallisation and Phase Transformation Behaviour of Electroless Nickel Phosphorus Platings during Continuous Heating. J. Alloys. Compd. 2003, 358, 112–119. [Google Scholar] [CrossRef]
- Duncan, R.N. The Metallurgical Structure of Electroless Nickel Deposits: Effect on Coating Properties. Plat. Surf. Finish. 1996, 83, 65–69. [Google Scholar]
- Fayyad, E.M.; Abdullah, A.M.; Hassan, M.K.; Mohamed, A.M.; Jarjoura, G.; Farhat, Z. Recent Advances in Electroless-Plated Ni-P and Its Composites for Erosion and Corrosion Applications: A Review. Emergent Mater. 2018, 1, 3–24. [Google Scholar] [CrossRef]
- Choi, K.-K.; Kee, J.; Kwon, D.-J.; Kim, D.-K. Effect of Hydrogen Plasma on Electroless-Plating Ni–B Films and Its Cu Diffusion Barrier Property. J. Nanosci. Nanotechnol. 2014, 14, 9599–9605. [Google Scholar] [CrossRef]
- Wang, B.; Li, C.; Liu, Y.; Lu, X. The CMP Effect of Potassium Molybdate with BTA as Compound Corrosion Inhibitor Used in CMP of the TSV Heterogeneous Microstructure. In Proceedings of the 2019 China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 18–19 March 2019; pp. 1–3. [Google Scholar]
- Salicio-Paz, A.; Ugarte, I.; Sort, J.; Pellicer, E.; García-Lecina, E. Full Optimization of an Electroless Nickel Solution: Boosting the Performance of Low-Phosphorous Coatings. Materials 2021, 14, 1501. [Google Scholar] [CrossRef]
- Buchtík, M.; Krystýnová, M.; Másilko, J.; Wasserbauer, J. The Effect of Heat Treatment on Properties of Ni–P Coatings Deposited on a AZ91 Magnesium Alloy. Coatings 2019, 9, 461. [Google Scholar] [CrossRef]
- Ahmadkhaniha, D.; Eriksson, F.; Zanella, C. Optimizing Heat Treatment for Electroplated NiP and NiP/SiC Coatings. Coatings 2020, 10, 1179. [Google Scholar] [CrossRef]
- Palaniappa, M.; Seshadri, S.K. Friction and Wear Behavior of Electroless Ni–P and Ni–W–P Alloy Coatings. Wear 2008, 265, 735–740. [Google Scholar] [CrossRef]
- Shu, X.; He, Z.; Wang, Y.; Yin, L. Mechanical Properties of Ni-Based Coatings Fabricated by Electroless Plating Method. Surf. Eng. 2020, 36, 944–951. [Google Scholar] [CrossRef]
- Salicio-Paz, A.; Grande, H.; Pellicer, E.; Sort, J.; Fornell, J.; Offoiach, R.; Lekka, M.; García-Lecina, E. Monolayered versus Multilayered Electroless NiP Coatings: Impact of the Plating Approach on the Microstructure, Mechanical and Corrosion Properties of the Coatings. Surf. Coat. Technol. 2019, 368, 138–146. [Google Scholar] [CrossRef]
- Yan, M.; Ying, H.G.; Ma, T.Y. Improved Microhardness and Wear Resistance of the As-Deposited Electroless Ni–P Coating. Surf. Coat. Technol. 2008, 202, 5909–5913. [Google Scholar] [CrossRef]
Electrolyte Composition | NiCl2 6H2O NaH2PO2H2O NH2CH2COOH CH3COONa 3H2O | |||
---|---|---|---|---|
Sample Numbers | DBDA_0 | DBDA_1 | DBDA_2 | DBDA_3 |
Concentration of the Organic Additive DBDA, g/L | 0 | 0.02 | 0.035 | 0.08 |
Sample Numbers | Concentration | |||
---|---|---|---|---|
P | Ni | |||
at. % | wt.% | at. % | wt.% | |
DBDA_0 | 17.05 | 9.78 | 82.95 | 90.22 |
DBDA_1 | 10.98 | 6.11 | 89.02 | 93.89 |
DBDA_2 | 11.06 | 6.16 | 88.94 | 93.84 |
DBDA_3 | 8.57 | 4.71 | 91.43 | 95.29 |
Ni | |||||
---|---|---|---|---|---|
hkl | N Образца | FWHM Reference | FWHM Result | 2θ deg. | d, nm |
111 (Kα1) | DBDA_0 | 0.32 | 3.6 | 44.55 | 2.76 |
DBDA_1 | 0.32 | 2.2 | 44.6 | 4.82 | |
0.32 | 7 | 44.6 | 1.36 | ||
DBDA_2 | 0.32 | 2.2 | 44.6 | 4.82 | |
0.32 | 7 | 44.6 | 1.36 | ||
DBDA_3 | 0.32 | 1.2 | 44.6 | 10.30 | |
0.32 | 3.8 | 44.6 | 2.60 |
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Buylov, N.S.; Sotskaya, N.V.; Kozaderov, O.A.; Shikhaliev, K.S.; Potapov, A.Y.; Polikarchuk, V.A.; Rodivilov, S.V.; Pobedinskiy, V.V.; Grechkina, M.V.; Seredin, P.V. Fabrication and Characterization of Thin Metal Films Deposited by Electroless Plating with Organic Additives for Electrical Circuits Applications. Micromachines 2023, 14, 1151. https://doi.org/10.3390/mi14061151
Buylov NS, Sotskaya NV, Kozaderov OA, Shikhaliev KS, Potapov AY, Polikarchuk VA, Rodivilov SV, Pobedinskiy VV, Grechkina MV, Seredin PV. Fabrication and Characterization of Thin Metal Films Deposited by Electroless Plating with Organic Additives for Electrical Circuits Applications. Micromachines. 2023; 14(6):1151. https://doi.org/10.3390/mi14061151
Chicago/Turabian StyleBuylov, Nikita S., Nadezhda V. Sotskaya, Oleg A. Kozaderov, Khidmet S. Shikhaliev, Andrey Yu. Potapov, Vladimir A. Polikarchuk, Sergey V. Rodivilov, Vitaly V. Pobedinskiy, Margaryta V. Grechkina, and Pavel V. Seredin. 2023. "Fabrication and Characterization of Thin Metal Films Deposited by Electroless Plating with Organic Additives for Electrical Circuits Applications" Micromachines 14, no. 6: 1151. https://doi.org/10.3390/mi14061151