Investigation on Step-Bunched Homoepitaxial Layers Grown on On-Axis 4H-SiC Substrates via Molten KOH Etching

Abstract

Wafer-scale on-axis 4H-SiC epitaxial layers with very low roughness were obtained in this study. By performing carbon-rich hydrogen etching and epitaxial growth of the epitaxial layer at different temperatures, local mirror regions (LMRs) with root mean square (RMS) roughness less than 0.2 nm were obtained on the epitaxial layer surface. The LMRs’ length is tens of millimeters, and the width is sub-millimeters. The step-flow growth induced by threading screw dislocations (TSDs) was observed on the epitaxial layer surface by atomic force microscopy (AFM), together with the double bi-atomic step-flow growth induced by the step bunch, which was the cause of LMRs. Furthermore, the growth mechanism was investigated by wet etching. The etching pits were found to be associated with 3C-SiC and their effect on the growth rate of epitaxial layers was further explored.

1. Introduction

As a wide band gap semiconductor material with great application potential, silicon carbide (SiC) has been widely studied in recent years because of its excellent properties, such as high breakdown field strength and high thermal conductivity, etc., making it easier to produce power devices with high voltage, high power, and strong robustness [1,2,3,4,5,6,7]. Chemical vapor deposition (CVD) is a key process for fabricating high-quality SiC power devices and has a critical influence on the performance and lifetime of the fabricated devices [8,9,10].

In recent years, with the development of SiC power devices, the industry made increasingly high requirements on the thickness and quality of epitaxial layers. Currently, high-quality epitaxial layers are mainly obtained through chlorine-based CVD epitaxial growth on off-axis (typically 4°) substrates [11,12], which, however, suffer from problems such as material wastes. More importantly, while various approaches have been reported to increase the conversion rate of basal plane dislocations (BPDs) to threading edge dislocation (TEDs) (>99%) during epitaxy, a significant proportion of BPDs from the off-axis substrate epitaxy process will be transmitted to the epitaxial layer [13,14,15]. The BPDs in bipolar devices will dissolve into Shockley stacking faults during operation, degrading device performance with a reduced carrier lifetime and increased leakage current [16,17,18,19,20,21,22,23,24].

In this context, it is of great significance to study the on-axis epitaxy without BPDs among the epitaxial layers [25,26]. At present, the on-axis epitaxy of 4H-SiC is mainly studied from the perspective of quality improvement. No large, smooth on-axis epitaxial surfaces have been reported so far. In addition, double positioning boundaries (DPBs) mainly caused by the presence of a 3C-SiC twinned domain are very likely to emerge on the epitaxial layer during the epitaxial growth on on-axis 4H-SiC substrates. As the quality of crystal in the DPBs is generally worse than that in other regions, we proposed to create large terraces to improve the surface quality of on-axis epitaxy while degrading that of off-axis epitaxy by using step bunching.

2. Experiment

The epitaxy was performed on commercially available 4-inch on-axis 4H-SiC $\left(0001\right)$ wafers by a horizontal hot-wall low-pressure chemical vapor deposition (LPCVD). Each wafer has an unintentional off-cut angle in the range of 0.04°–0.08°. The temperature in the reactor was calibrated using silicon. The growth temperature (T_g) was set to the temperature of the wafer susceptor, varying from 1550 °C to 1650 °C. Prior to epitaxial growth, a small flow of carbon-rich hydrogen (H₂) was used as an etching process to induce the emergence of a step bunch. Ethane (C₂H₄) and silane (SiH₄) were used as precursors, and C/Si remained constant at 1.0. H₂ was used as dilution gas and carrier gas. The SiH₄ and C₂H₄ flow rates were, respectively, fixed at 40 sccm and 20 sccm with the chamber pressure maintained at 40 torr in the growth process. The entire growing process lasted for 30 min.

A scanning electron microscope (SEM) was used to observe the cross-section of the wafers and estimate film thickness. The surface roughness and morphology were studied by an atomic force microscope (AFM), SEM, and Nomarski microscope. The crystalline quality of the epilayers was evaluated by Raman investigation and molten KOH etching. The etching condition was: KOH + 10% wt Na₂O₂, 600 °C, 30 min.

3. Results and Discussion

3.1. Surface Properties and Crystal Polytypes

As shown in the Nomarski photographs in Figure 1, all samples presented linear large terraces with heights differing by about several tens of nanometers (height data are not presented). Dark lines in the figure indicate meeting zones. With the increase in T_g, the width of these large terraces increased from tens to hundreds of micrometers. Importantly, their length generally spanned the entire wafer. Their characteristics were similar to the macro steps formed by step bunching, though they were too wide to be associated with steps. Notably, the surface roughness of large terraces in all samples was 0.1–0.2 nm, which was comparable to that of the typical off-axis homogeneous 4H-SiC epitaxial surface. We define such large terraces with smooth surfaces but with a limited width of several hundred microns as local mirror regions (LMRs). Meanwhile, the epitaxial TSDs growth mode on on-axis 4H-SiC reported by Ul Hassan et al. [27] was also observed on all samples, as shown in Figure 1d, where the hexagonal table surface was the result of this growth mode. Such the hexagonal tables formed by the TSDs with the standard 4H-SiC crystal polytype were seen in all samples by Raman spectra. However, Raman spectra of other regions showed different results.

The Raman spectra were taken on the LMRs over the central part of the samples, as shown in Figure 1. It can be seen from the figure that the relative peak intensity at 798 cm⁻¹ was enhanced to varying degrees compared with that in the standard 4H-SiC crystal polytype. In the Raman spectra of the standard 4H-SiC and 3C-SiC crystal polytypes, the crystal polytype exhibited the peak at 798 cm⁻¹ [28]. However, the peak intensity was located at 776 cm⁻¹ in the 4H-SiC crystal polytype, and the relative peak intensity at 798 cm⁻¹ was less than 5%. Furthermore, the Raman spectra after mapping the identical LMR at a small scale demonstrated high consistency, which indicated that the LMRs were formed by mixing 3C-SiC with 4H-SiC crystal polytypes, whose crystal structure varied with T_g but could remain stable within a certain range. The detailed structure of the crystal formed by this mixing remained unclear, but their properties are generally homogeneous. In conclusion, by comparing the samples at different growth temperatures, we conclude that the sample showed the largest LMRs surfaces at a T_g of 1650 °C and the most similar crystal polytype to the 4H-SiC crystal polytype. Therefore, this sample was mainly analyzed afterward.

We investigated such mixed crystal in detail by performing experiments on a region on the surface of the sample at T_g = 1650 °C, as displayed in Figure 2a. Point 1 is on a hexagonal table, and the Raman spectra indicate a complete 4H-SiC crystal polytype. Point 2 and point 3 are on two adjacent LMRs, but the Raman spectra are identical, indicating the same mixing ratio of the two crystal polytypes. However, Point 4 is on a DPB, showing the highest 3C-SiC inclusion percentage.

3.2. Microstructure of LMRs

After further investigating the growth mechanism of LMRs, we performed AFM scans of the surface of LMRs and the hexagonal table surface. The result was shown in Figure 3. According to the results of the AFM, both surfaces exhibited a step-flow growth mode. These were obvious on the hexagonal table surface, showing a turn of 60° in Figure 3a. The width, relative height, and offset angle of the terrace on it were 450 nm, 0.28 nm, and 0.04°, respectively. The thickness of a typical carbon-silicon bi-atomic layer is 0.25 nm, after eliminating errors, by which we consider the step thickness to be one carbon-silicon bi-atomic layer on the surface of a hexagonal table. The terrace width, height difference, and offset angle of the steps on the LMR in Figure 3b were 800 nm, 0.5 nm, and 0.04°, respectively. Such a height difference represents two carbon-silicon bi-atomic layers. The offset angle comes from the unintentional cutting angle of the substrate used for this sample. The two carbon-silicon bi-atomic layers were caused by step bunching [29].

3.3. Detection of Defects

In order to further explore the crystal quality, we used molten KOH to etch the epitaxial surface. Defects in the 4H-SiC epitaxial layer are preferentially etched out under the conventional wet etching conditions, but it is not applicable to the surface of the sample in this research due to high background doping. Finally, we increased the etching temperature by 100 °C. The samples were placed in molten KOH liquid with 10% wt Na₂O₂ at 600 °C, etched for 35 min, and then taken out. Under such severe conditions, the surfaces of the samples changed eventually, implying that defects in these epitaxial layers could remain more stable under certain specific conditions than in off-axis 4H-SiC homogenous epitaxial layers.

The etched epitaxial layer surfaces of all the samples showed a significant number of corrosion morphologies, as shown in Figure 4. As shown in Figure 4, a total of four different defects emerged, namely, triangular pits (TPs), TSDs, long strips pits, and cracks. The triangular pits were typical of dislocation to etch pits commonly observed at threading edge dislocations in the (111) surface of cubic semiconductor crystals [30]. The long strip pits were always in the $\langle 1000\rangle$ direction, which indicated that they were stacking faults (SFs) in the epitaxial layer [31]. The magnified images of TPs and SFs are shown in Figure 4b,c. The spatial structure of TPs is a tetrahedron, and the top view is an equilateral triangular. The etching depth of SFs was much smaller than that of TPs. As mentioned previously, the hexagonal tables on the samples were made up of standard 4H-SiC crystal polytype. Therefore, it was not surprising that hexagonal TSD etching pits were found in its morphology after being etched, as shown in Figure 4a.

Cracks emerged in random directions, which were found to grow in the $\langle$ and $1\overline{1}00$ directions on all samples. Nevertheless, what was certain was that the overall tendency of these cracks was to parallel each other over a large area (≥10 cm²). Meanwhile, as shown in Figure 4d, crystals grew symmetrically on both sides of these cracks, which suggested that the cracks were typical of the grain boundaries of polycrystals. Together with the growth model shown in Figure 5, the cracks were DPBs, which emerged as a straight line across the wafer and were developed in bends. The DPB in Figure 4d exhibited four 30° deflections across a length of 20 μm, which meant that step bunching on the on-axis substrates was unstable, thus resulting in the surface morphology shown in Figure 1.

3.4. Growth Mode

The step-flow growth mode controlled by step bunching is illustrated on the model of the 4H-SiC crystal polytype, as shown in Figure 5 (to simplify, the intermediate bi-atomic layers are omitted in the illustration). The figure shows two stacking models of 4H-SiC crystal polytype, respectively, denoted by A₁-C₁ and A₂-C₂. In the step bunching process, every two co-directional bi-atomic layers were compounded into one double bi-atomic layer, as shown from the first A₂ to C₂. In the epitaxial growth process, an excessively wide terrace will induce 2D nucleation growth. As marked by B₁ and C₁ in Figure 5, two stacking directions of 3C-SiC (3C-SiC (Ⅰ) and 3C-SiC (Ⅱ)) were formed on the surface. The position of SFs is marked by Points A and B. Meanwhile, if 3C-SiC (Ⅰ) continued to grow in the plane and was combined with 3C-SiC (Ⅱ), both 4H-SiC and 6H-SiC crystal polytypes were likely to emerge, which was controlled by growth temperature.

As noted in Figure 4a, the orientation of the TPs varies among LMRs (The orientation of the TPs, indicated by white arrows, is defined as the edges in the $\langle 1\overline{1}00\rangle$ direction of the etching pits). First, all TPs remained in the same direction on an LMR, even if the distance between two TPs reached the wafer-scale. Second, there were certain rules in such orientation, especially on two adjacent LMRs, that is, when the TPs of one LMR were in the $\langle 1\overline{1}00\rangle$ direction, the TPs on the LMRs separated by DPBs on either side of it would surely be in the $\langle 1\overline{1}00\rangle$ direction, as illustrated in Figure 4a, which was consistent with the analysis of the model shown in Figure 5. The 2D nucleation on the step-bunched terrace in different orientations further induced 3C-SiC (Ⅰ) and 3C-SiC (Ⅱ) in different orientations. The TPs were associated with 3C-SiC and hence were influenced by their orientation, which was also a reflection of the orientation of different LMRs.

3.5. Relationship between Growth Rate and TPs

We obtained the thickness of the epitaxial layers by studying the cross-section of the samples by SEM and converted it into growth rate, as shown in Figure 6a. The growth rate decreased with the increase in growth temperature, which was associated with the decreasing percentage of the 3C-SiC crystal polytype. In order to further study growth rate versus defects, the relative heights of the seven consecutive LMRs in the sample, whose growth temperature was 1650 °C, were calculated together with the density of TPs on them, as indicated by the red dashed line in Figure 6b. The results are shown in Figure 6c,d, and the relative height of the LMRs basically corresponded to the density of TPs. Thus, the relationship between the growth rate, TPs, and growth temperature was obtained. 3C-SiC inclusions were more likely to arise at lower growth temperatures and have higher growth rates than the 4H-SiC crystal polytype, resulting in higher growth rates for samples with lower T_g.

4. Conclusions

We performed homogeneous epitaxy on on-axis 4H-SiC substrates with step bunching which was controlled by H₂ etching temperature. In the study of epitaxial layers, LMRs with double atomic steps and alternating orientation were found which fully proves the effect of step bunching on on-axis 4H-SiC epitaxy. The crystal polytype and defects on the surface of the epitaxial layers were characterized by the molten KOH etching. On-axis homogeneous epitaxial SiC layers with high surface quality were obtained by increasing the width of the crystal in the same orientation (LMRs). Although 3C-SiC inclusions were found on the LMRs, it was concluded from a detailed investigation that their content decreases with the increase in the width of the LMRs, further improving the crystal quality of the epitaxial layers. Meanwhile, the specific location and density of 3C-SiC inclusions were confirmed by combining the TPs exposed by wet etching with the data obtained from the Raman investigation. The relationship between growth rate and 3C-SiC inclusions was obtained. Hence, it is a step forward in the study of homogeneous epitaxial growth of high-quality 4H-SiC on on-axis substrates by controlling the density of DPBs.