FPGA-Based Numerical Simulation of the Chaotic Synchronization of Chua Circuits

Abstract

The objective of this work was to design and implement a system based on reconfigurable hardware as a study tool for the synchronization of chaotic circuits. Mathematical models were established for one circuit, two synchronized, and multiple synchronized Chua circuits. An ordinary differential equation solver was developed applying Euler’s method using the Verilog hardware description language and synthesized on a Spartan 3E FPGA (Field-Programmable Gate Array) equipped with a 32-bit RISC processor, 64 MB of DDR SDRAM, and 4 Mb of PROM. With a step size of 0.005 and a total of 10,000 iterations, the state equations for one and three Chua circuits were solved at a time of 0.2 ms and a frequency of 50 Mhz. The logical resources used by the system did not exceed 4%. To verify the operation, a numerical simulation was carried out using the Octave V9.1.0 calculation software on an Intel(R) Core i7-9750H CPU 2.59 GHz computer, obtaining the same results but in a time of 493 ms and 3.177 s for one and three circuits, respectively.

1. Introduction

Chaos Theory is a branch of mathematics, physics, and other sciences that deals with certain types of dynamic systems [1], that is, those systems whose state evolves over time, with the particularity of being very sensitive to variations in the initial conditions [1,2]. Small variations in these initial conditions can imply large differences in future behavior, making long-term prediction complicated; it is also concerned with systems that appear to be chaotic but are not [3]. The principles of chaos theory have been successfully used to describe and explain various natural phenomena [4] and man-made phenomena such as predicting seizures, the behavior of financial markets, modeling manufacturing production systems [5,6], weather bulletins, creating fractals, etc., as well as human behavior, social and economic phenomena [6], the evolution of technology, industrial activity [7], among others [5,6,7].

In recent years, studies on nonlinear systems and the phenomenon of synchronization have been carried out, including chaotic complex dynamic systems [8,9]. However, it is quite difficult to give analytical solutions for this type of system [10,11]. Usually, the study of these systems focuses more on the theoretical aspect because they require a high knowledge of mathematics to understand and develop them [12].

The Chua circuit is one of the most commonly studied chaotic systems today [13]. Its mathematical model is described through a system of differential equations [14]. This is one of the few systems whose chaotic behavior has theoretical, experimental, and numerical verification. Consequently, it is necessary to develop numerical calculation programs that allow modeling and simulating this type of system [15]. In general terms, the model represents the key behaviors and characteristics of the selected process or system, while the simulation uses the models to mimic real-world processes or systems and represents how the model evolves under different conditions over time [16].

The Chua circuit is a widely studied chaotic dynamical system with various practical applications due to its complex and versatile behavior. The Chua circuit can generate chaotic signals that are useful in secure communications and data encryption. These signals can encrypt information, making it difficult to intercept and decipher without the correct key. This application is particularly relevant in developing secure communication systems to protect sensitive information from unauthorized access [17]. Additionally, the Chua circuit serves as an ideal model for investigating and understanding nonlinear and chaotic phenomena in physical systems. Researchers use this circuit to study bifurcations, strange attractors, and other complex behaviors that occur in nonlinear dynamic systems. This research helps in the development of theoretical models that can be applied to a variety of physical and engineering systems [18].

Furthermore, the chaotic behavior of the Chua circuit has been compared to the electrical activity of the brain, providing a simple model for studying certain aspects of neurodynamics. This helps in understanding complex brain processes and in the development of biomimetic devices that mimic neural behavior [19].

The Chua circuit is also used in the design and analysis of chaotic control and synchronization systems. These systems are relevant in control engineering to manage and stabilize dynamic systems that exhibit chaotic behaviors under certain conditions. The synchronization of chaotic systems is crucial in various applications, including secure communication and coordination of robotic systems [20]. In power electronics, the Chua circuit can improve the efficiency and control of energy converters and other electronic devices operating under nonlinear conditions. This application is essential in designing more efficient power systems and enhancing the performance of electronic devices that need to operate reliably under varying conditions [21].

On the other hand, simulation is one of the most used support tools for the study of dynamic systems, particularly chaotic systems [22]. However, the discrete approximation of real numbers can drastically alter the dynamics of chaotic systems after a short period of time [23] and can require many computations that a single processor would require days or even years to complete [24]. For this reason, scientists have been forced to research and develop new tools that facilitate the simulation of dynamic systems to analyze phenomena more efficiently and, above all, obtain faster results. For example, the authors of [25] implemented the K-means means algorithm for bioinformatics applications; in [26], machine learning approaches for analyzing and enhancing molecular dynamics were used; in addition, ref. [27] used mesoscale simulations to understand biomembranes. In this sense, research has been underway on conducting modeling and real-time dynamic simulation using Field-Programmable Gate Array (FPGA), computational and non-computational [28]. FPGAs are an energy-efficient solution, and they have been widely used in edge devices in many applications. Programmable devices provide flexible and efficient platforms and satisfy the performance, cost, and power requirements of most hardware prototyping architectures [29]. The simulation of power electronics in power systems [28], real-time digital simulations [30], dynamic simulation of electric machines [31], ODE-based neural networks [32], distributed computing microarchitecture for complex physical dynamics investigation [29], and memristor emulation [33] are some examples of works that have used these devices.

In this paper, the design and implementation of an FPGA-based Chua circuit synchronization numerical simulator is presented. The core of this system is made up of an ODE ordinary differential equation solver that applies Euler’s method to solve the set of equations that represent one Chua circuit, two synchronized Chua circuits, and multiple synchronized Chua circuits. The system was implemented using the Verilog language on a Spartan 3E FPGA, and the results were validated by comparing them with the results obtained with common calculation software. This work aimed to design and implement a system based on reconfigurable hardware to study the synchronization of chaotic circuits. Unlike other systems, especially those based on software, the simulation time does not depend on the number of connected circuits and does not increase accordingly; its limitation depends only on the resources of the device.

2. Materials and Methods

2.1. The Chua Circuit

The Chua circuit is one of the simplest nonlinear circuits displaying complex dynamic behavior exhibiting a variety of bifurcation and attractor phenomena [34,35]. Due to its easy construction and the easy manipulation of its parameters, it allows the analysis of several examples of chaotic phenomena. Its study allows new forms of research such as the study of the elimination of chaos and studying the phenomenon of phase synchronization, among others [36,37]. It contains three linear elements, one inductor and two capacitors, a linear resistor, and a single nonlinear resistor NR [10] called Chua diode, as shown Figure 1.

By using the passive sign convention for all currents and voltages and applying the Kirchhoff’s laws to the Chua circuit, the follow equations are obtained:

$$C_1{\displaystyle \frac{d{v}_1}{dt}}={\displaystyle \frac{1}{R}}\left(v_2-v_1\right)-g\left(v_1\right),$$

(1)

$$C_2{\displaystyle \frac{d{v}_2}{dt}}={\displaystyle \frac{1}{R}}\left(v_1-v_2\right)+i,$$

(2)

$$L{\displaystyle \frac{di}{dt}}=-v_2,$$

(3)

where $v_1$, $v_2$ are the potential difference across capacitors $C_1$ and $C_2$, respectively; $i$ is the current in the inductor $L$. The $g\left(v_1\right)$ is the current through the Chua diode, and it is defined by

$$g\left(v_1\right)=\left\{\begin{array}{ll}{\mathrm{G}}_{\mathrm{b}}{v}_1+\left({\mathrm{G}}_{\mathrm{b}}-{\mathrm{G}}_{\mathrm{a}}\right)\mathrm{E},& v_1\le -\mathrm{E}\\ {\mathrm{G}}_{\mathrm{a}}{v}_1,& \left|v_1\right|<\mathrm{E}\\ {\mathrm{G}}_{\mathrm{b}}{v}_1+\left({\mathrm{G}}_{\mathrm{a}}-{\mathrm{G}}_{\mathrm{b}}\right)\mathrm{E},& v_1\ge \mathrm{E}\end{array}\right.,$$

(4)

here, ${\mathrm{G}}_{\mathrm{a}}$ and ${\mathrm{G}}_{\mathrm{b}}$ are the conductances, which strictly mean the slopes of the lines when plotting the current $g$ versus $v_1$.

Without loss of generality and after applying some appropriate variable and parameter transformations, these equations can be modeled by the following dimensionless equation [38,39]:

$$\dot{\mathrm{x}}=\propto \left[\mathrm{y}-\mathrm{x}-\mathrm{h}\left(\mathrm{x}\right)\right],$$

(5)

$$\dot{\mathrm{y}}=\mathrm{x}-\mathrm{y}+\mathrm{z},$$

(6)

$$\dot{\mathrm{z}}=-\mathsf{\beta }\mathrm{y},$$

(7)

where the signals x, y, and z are called state variables and represent the voltage across capacitor $C_1$, the voltage across capacitor $C_2$, and the current through the inductor, respectively; $\propto$ and $\mathsf{\beta } \mathrm{a}\mathrm{r}\mathrm{e} \mathrm{c}\mathrm{o}\mathrm{n}\mathrm{s}\mathrm{t}\mathrm{a}\mathrm{n}\mathrm{t}\mathrm{s}$ [40]; and the function h is the voltage–current characteristic of the nonlinear resistor that originally could be calculated as

$$\mathrm{h}\left(\mathrm{x}\right)={\mathrm{m}}_1\mathrm{x}+{\displaystyle \frac{1}{2}}\left({\mathrm{m}}_0-{\mathrm{m}}_1\right)[\left|\mathrm{x}+1\right|-\left|\mathrm{x}-1\right|],$$

(8)

where m₁ and m₀ are positive and real constants.

Notice that two chaotic circuits will never have the same three signals at any point in time due to the property of “sensitivity to initial conditions”; in other words, the circuits will never be naturally in sync [41]. However, it is possible for chaotic systems to synchronize with each other under certain conditions [42].

2.2. Existence and Uniqueness of the Chua Circuit State Equations

To determine the existence and uniqueness of solutions to the Chua state equations, it is possible to apply the Picard–Lindelöf theorem, which provides conditions under which a system of ordinary differential equations (ODEs) has a unique solution given an initial value problem [43].

The Picard–Lindelöf theorem states that if the function F($\mathbf{x}$) in the differential equation

$$\dot{\mathbf{x}}=\mathbf{F}(\mathbf{x})$$

(9)

is Lipschitz-continuous with respect to $\mathbf{x}$, then for any initial condition $\mathbf{x}$(0) = ${\mathbf{x}}_0$, there exists a unique solution $\mathbf{x}$(t) in some interval around t = 0.

Then, considering the system in following vector form:

$$\dot{\mathbf{x}}=\mathbf{F}(\mathbf{x})$$

(10)

where $\mathbf{x}={(\mathrm{x},\mathrm{y},\mathrm{z})}^T$ and $\mathbf{F}\left(\mathbf{x}\right)={(\propto \left[\mathrm{y}-\mathrm{x}-\mathrm{h}\left(\mathrm{x}\right)\right],\mathrm{x}-\mathrm{y}+\mathrm{z},-\mathsf{\beta }\mathrm{y})}^T$.

To apply the Picard–Lindelöf theorem, there is a need to check if F($\mathbf{x}$) is Lipschitz-continuous. This requires showing that there exists a constant L such that for all $\mathbf{x}$, $\mathit{y}$ ∈ ℝ³

$$‖\mathbf{F}\left(\mathbf{x}\right)‖-‖\mathbf{F}\left(\mathbf{y}\right)‖\le \mathbf{L}‖\mathbf{x}-\mathbf{y}‖$$

(11)

Components of F($\mathbf{x}$)

• $\propto \left[\mathrm{y}-\mathrm{x}-\mathrm{h}\left(\mathrm{x}\right)\right]$: the function $\mathrm{y}-\mathrm{x}-\mathrm{h}\left(\mathrm{x}\right)$ is continuous and differentiable, with $\mathrm{h}\left(\mathrm{x}\right)$ typically being a piecewise linear function. This ensures Lipschitz continuity.
• $\mathrm{x}-\mathrm{y}+\mathrm{z}$: This is a linear function and is Lipschitz-continuous.
• $-\mathsf{\beta }\mathrm{y}$: This is also a linear function and is Lipschitz-continuous.

Since the combination of Lipschitz-continuous functions remains Lipschitz-continuous, F($\mathbf{x}$) is Lipschitz-continuous in ℝ³. Therefore, using the Picard–Lindelöf theorem, for any initial condition $\mathbf{x}\left(0\right)={\mathbf{x}}_0$, there exists a unique solution $\mathbf{x}$(t) to the Chua circuit equations in some interval around t = 0.

Based on this, the Chua circuit state equations possess a unique solution for any given initial conditions, guaranteed by the existence and uniqueness theorem of Picard–Lindelöf. This result is fundamental in the study of chaotic systems, ensuring the predictability and reliability of simulations and analyses based on these equations.

2.3. Synchronization of Chua Circuits

A fundamental phenomenon between two or more identical (or not) chaotic systems is synchronization [44]. This phenomenon has aroused great interest due to its potential application in various areas of science and technology, for example, in cryptography and secure communications [45], image encryption [46], biological systems [47], and others.

The two most popular ways to couple chaotic systems for synchronization are as follows [48]:

• Uni-Directional coupling (or drive–response), when the driver circuit evolves freely, controls the slave (or response), and drives it to evolution [49,50];
• Bi-directional coupling, when both circuits connected to each other, interact, and coupled, creating a mutual synchronization [51,52]; Figure 2 shows two bi-directional coupled circuits through the state variable x and the coupling resistor R_c.

$$C_1{\displaystyle \frac{d{v}_{11}}{dt}}={\displaystyle \frac{1}{R}}\left(v_{21}-v_{11}\right)-g\left(v_{11}\right)-{\displaystyle \frac{1}{R_C}}(v_{11}-v_{12}),$$

(12)

$$C_2{\displaystyle \frac{d{v}_2}{dt}}={\displaystyle \frac{1}{R}}\left(v_{11}-v_{21}\right)+i_1,$$

(13)

$$L{\displaystyle \frac{d{i}_1}{dt}}=-v_{21},$$

(14)

$$C_1{\displaystyle \frac{d{v}_{12}}{dt}}={\displaystyle \frac{1}{R}}\left(v_{22}-v_{12}\right)-g\left(v_{12}\right)-{\displaystyle \frac{1}{R_C}}(v_{12}-v_{12}),$$

(15)

$$C_2{\displaystyle \frac{d{v}_{22}}{dt}}={\displaystyle \frac{1}{R}}\left(v_{12}-v_{22}\right)+i_2,$$

(16)

$$L{\displaystyle \frac{d{i}_2}{dt}}=-v_{22},$$

(17)

where $v_{1n}$, $v_{2n}$, and $i_n$ are the voltages and current, and n is the number of the circuit; the function $g$ is calculated as Equation (4).

Similar to [53], the set of dimensionless differential equations that describe two coupled Chua circuits are as follows:

$${\dot{\mathrm{x}}}_1=\alpha \left({\mathrm{y}}_1-{\mathrm{x}}_1-\mathrm{h}\left({\mathrm{x}}_1\right)\right)+{\delta }_x({\mathrm{x}}_2-{\mathrm{x}}_1)$$

(18)

$${\dot{\mathrm{y}}}_1={\mathrm{x}}_1-{\mathrm{y}}_1+{\mathrm{z}}_1,$$

(19)

$${\dot{\mathrm{z}}}_1=-\beta {\mathrm{y}}_1,$$

(20)

$${\dot{\mathrm{x}}}_2=\alpha \left({\mathrm{y}}_2-{\mathrm{x}}_2-\mathrm{h}\left({\mathrm{x}}_2\right)\right)+{\delta }_x({\mathrm{x}}_1-{\mathrm{x}}_2)$$

(21)

$${\dot{\mathrm{y}}}_2={\mathrm{x}}_2-{\mathrm{y}}_2+{\mathrm{z}}_2,$$

(22)

$${\dot{\mathrm{z}}}_2=-\beta {\mathrm{y}}_2,$$

(23)

where $\alpha$, $\beta ,$ and h are similar to before, while ${\delta }_x={\displaystyle \frac{R\alpha }{R_c}}$. When ${\delta }_x$> 5.56, the circuits become synchronized [40]. Observe that $\mathrm{y}$ and $\mathrm{z}$ state equations do not have any effect in the synchronization.

Figure 3 instead, shows the n bi-directional coupled circuits representation through the state variable $\mathrm{x}$ and the coupling resistor R_c.

In general, for a network of n Chua circuits; the $j$-th circuit state equations are as follows:

$${\dot{\mathrm{x}}}_j=\alpha \left({\mathrm{y}}_j-{\mathrm{x}}_j-\mathrm{h}\left({\mathrm{x}}_{\mathrm{j}}\right)\right)+{\delta }_x({2\mathrm{x}}_j-{\mathrm{x}}_{j-1}-{\mathrm{x}}_{j+1})$$

(24)

$${\dot{\mathrm{y}}}_{\mathrm{j}}={\mathrm{x}}_{\mathrm{j}}-{\mathrm{y}}_{\mathrm{j}}+{\mathrm{z}}_{\mathrm{j}},$$

(25)

$${\dot{\mathrm{z}}}_{\mathrm{j}}=-\beta {\mathrm{y}}_j,$$

(26)

$$\mathrm{h}\left({\mathrm{x}}_{\mathrm{j}}\right)={\mathrm{m}}_1{\mathrm{x}}_{\mathrm{j}}+{\displaystyle \frac{1}{2}}\left({\mathrm{m}}_0-{\mathrm{m}}_1\right)[\left|{\mathrm{x}}_{\mathrm{j}}+1\right|-\left|{\mathrm{x}}_{\mathrm{j}}-1\right|],$$

(27)

where $1<j>n$.

2.4. Numerical Procedures for Solving ODEs

Solving ODEs numerically is a critical task in many fields, including physics, engineering, biology, and finance. Numerical procedures for solving ODEs vary in complexity, accuracy, and computational requirements. The choice of method depends on the specific problem characteristics, such as the desired accuracy, computational resources, and whether the problem is stiff. Understanding these methods allows one to select the most appropriate approach for a given ODE. The most common numerical procedures for solving ordinary differential equations are Euler and Runge–Kutta (RK). The choice between Euler’s method and the Runge–Kutta methods for implementation on a FPGA can be influenced by several factors, including computational complexity, memory requirements, and the specific characteristics of the problem being solved.

In this work, the Euler method was chosen. Euler’s method is very simple and requires minimal hardware resources. The basic operations involved (addition and multiplication) are easy to implement and optimize on an FPGA. This simplicity allows for efficient utilization of the FPGA’s resources, enabling the implementation of more parallel processing units or additional functionalities. In contrast, Runge–Kutta methods, especially higher-order ones like RK4, involve multiple stages of computation within each time step, including several function evaluations and intermediate steps. Implementing these stages requires more complex control logic and more hardware resources (e.g., multipliers, adders, and memory blocks), which can be more challenging to fit and optimize on an FPGA [54].

Due to its simplicity, Euler’s method can achieve very low latency per time step. This is advantageous in real-time applications where fast, predictable computation is critical. The straightforward nature of the method also allows for high throughput, as many independent instances of Euler integration can be executed in parallel. On the other hand, the multiple stages of computation in Runge–Kutta methods can increase the latency per time step. While it is possible to pipeline these stages, the complexity of doing so efficiently can reduce the overall throughput and increase the design and verification effort [55].

Although Euler’s method is less accurate for a given step size compared to Runge–Kutta methods, it is often sufficient for problems where the focus is on demonstrating feasibility and rapid prototyping or where the problem domain allows for smaller step sizes without significant performance degradation. Runge–Kutta methods provide higher accuracy, which is beneficial for many applications. However, achieving this accuracy on an FPGA requires careful management of resource trade-offs and potentially more complex designs [56].

In summary, Euler’s method is often chosen over Runge–Kutta methods for FPGA implementations due to its simplicity, lower resource requirements, lower latency, and easier scalability. These factors can lead to more efficient designs that are faster to develop and easier to optimize. However, for applications requiring higher accuracy and where the FPGA resources are sufficient, Runge–Kutta methods might still be considered despite their increased complexity. The final choice depends on the specific requirements of the application, including accuracy, performance, and resource constraints.

2.5. Software-Based Numerical Simulation

Based on the mathematical model for a Chua circuit (Equations (5)–(8)) and by considering the initial conditions ${\mathrm{x}}_0=0.7$, ${\mathrm{y}}_0=0.0$, and ${\mathrm{z}}_0=0.0$, an Octave script was developed to solve the dynamic system of Chua’s circuit using Euler’s method with a step size of 0.005 and a total of 10,000 samples.

Figure 4a–c shows the graphical representation of the state variables x, y, and z as a function of time, while Figure 4d shows that the trajectory forms an attractor, confirming that it is a chaotic dynamic system.

Now, based on the mathematical model for n identical coupled Chua circuits (Equations (24)–(27)) and by considering the same parameters, solver method, number of steps, and total samples as before, another Octave script was created to simulate 3 Chua circuits synchronized via x state variable. In this case, all initial conditions were set up to 0 except $x_o$ of the first circuit that was set up to 0.7. Figure 5 shows the state variables x of the 3 circuits as a function of time. As can be seen, as time progresses, the values of the three variables tend to be the same.

2.6. Hardware-Based Numerical Simulation

The use of FPGAs as a simulation tool is not new and has become popular especially in the study of nonlinear, dynamic, and complex systems. Most of these systems model physical phenomena using ordinary differential equations [29,57,58,59,60,61].

In this work, an FPGA Spartan 3E (Figure 6) was used to carry out the simulation of the Chua circuit and the Chua circuit synchronization. This board integrates a 500k gate XC3S500E FPGA, a 32-bit RISC processor, and a DDR interface, as well as USB ports, ethernet, LCD, potentiometer, switches, serial ports, and JTAG interface. It is fully compatible with Xilinx ISE tools [62].

Like [33], a 32-bit signed number representation fixed-point was used, but in this case, 6 bits for integer part and 25 for the factional one (

Table 1. Fixed-point 32-bit Q_6.25 number representation.

Number	Binary	Hexadecimal
1.0	0_000001.0000000000000000000000000	02000000
0.0025	0_000000.0000000101000111101011100	00028F5C

).

Figure 7 shows the RTL architecture of the implemented system using Verilog description language. It consists of two main elements: the Chua circuit and a frequency divider.

Chua’s circuit solves the x, y, and z equations of state by applying Euler’s method with a step size of 0.005; its Verilog main process and partial RTL are shown in Figure 8.

On the other hand, the frequency divider (Figure 9) activates its output when a total of 10,000 samples have been processed. The system frequency is 50 Mhz.

In Figure 10, the behavior of the state variables x, y, and z with respect to time can be visualized; its behavior is similar to that of a chaotic dynamic circuit.

Likewise, Figure 11 shows the RTL architecture created in the FPGA for three nodes synchronized with each other. It consists of four main elements, three Chua circuits and a frequency divider.

The three Chua circuits are similar to Figure 12 and solve the x, y, and z state equations at the same time, applying Euler’s method with a step size of 0.005, while the frequency divider also activates its output when a total of 10,000 samples have been processed. It uses the same frequency mentioned above.

Figure 13 shows the behavior of the state variables x1, x2, and x3 corresponding to circuits 1, 2, and 3 as a function of time, respectively. In the same way, values tend to be synchronized as time progresses.

Finally,

Table 2. Device utilization resource summary for Chua circuit implementation.

Logic Utilization	Used	Utilization
Number of Slice Flip Flop	29	1%
Number of 4 input LUTs	16	1%
Number of occupied Slices	25	1%
Number of bonded IOBs	3	1%

shows the percentage of resources used in the FPGA after the synthesis and implementation of three Chua circuits; they do not exceed 4% of the total.

3. Results

In this section, the results obtained after implementing the Chua circuit in the FPGA are presented and compared with the results obtained using the octave numerical simulation software for three couple Chua circuits. Figure 14a–c show the temporal behavior of the state variables obtained using the FPGA (${\mathrm{x}}_{\mathrm{f}}$, ${\mathrm{y}}_{\mathrm{f}}$, ${\mathrm{z}}_{\mathrm{f}}$) and the calculation software ($\mathrm{x}$, $\mathrm{y}$, $\mathrm{z}$) for the first Chua circuit. Graphically, it can be seen that there are no significant differences between the calculations made with the software and the electronic device.

Additionally, an analysis of the relationship between the data obtained through the FPGA and the simulation software was carried out. Figure 15 shows a linear relationship between the variables $\mathrm{x}$ and ${\mathrm{x}}_{\mathrm{f}}$ corresponding to the simulation software and the FPGA, respectively.

As can be seen in

Table 3. Correlation coefficient and linear model of the state variables of the FPGA (${\mathrm{x}}_{\mathrm{f}}$, ${\mathrm{y}}_{\mathrm{f}}$, ${\mathrm{z}}_{\mathrm{f} }$) and the simulation software ($\mathrm{x},\mathrm{y},\mathrm{z}$).

Variable x	Variable y	r	Lineal Model y = mx + b
			b	m
${\mathrm{x}1}_{\mathrm{f} }$	$\mathrm{x}1$	1.0	−0.00001635	1.00000263
${\mathrm{x}2}_{\mathrm{f} }$	$\mathrm{x}2$	1.0	−0.00001541	1.00000245
${\mathrm{x}3}_{\mathrm{f} }$	$\mathrm{x}3$	1.0	−0.00001541	1.00000245
${\mathrm{y}1}_{\mathrm{f} }$	$\mathrm{y}1$	0.9999887	0.00001353	1.00001967
${\mathrm{y}2}_{\mathrm{f} }$	$\mathrm{y}2$	0.9999498	0.00002214	1.00002846
${\mathrm{y}3}_{\mathrm{f} }$	$\mathrm{y}3$	0.9999498	0.00002214	1.00002846
${\mathrm{z}1}_{\mathrm{f} }$	$\mathrm{z}1$	0.9999788	0.0001184	1.0000158
${\mathrm{z}2}_{\mathrm{f} }$	$\mathrm{z}2$	0.9999925	0.00005549	1.00001217
${\mathrm{z}3}_{\mathrm{f} }$	$\mathrm{z}3$	0.9999925	0.00005549	1.00001217

, the Pearson correlation coefficient is 1 or very close to 1, which categorically indicates that the variables are highly related.

Finally, the simulation times of a Chua circuit and three synchronized Chua circuits were determined. The results obtained with the software and with the FPGA for 10,000 samples are shown in

Table 4. Simulation times for 10,000 samples of a Chua circuit and three synchronized Chua circuits using Octave software V9.1.0 and the FPGA.

Tool	Number of Chua Circuits	Simulation Time
Octave (Intel(R) Core i7-9750H CPU 2.59 GHz computer)	1	493 ms
	3	3.177 s
FPGA	1	0.2 ms
	3	0.2 ms

. As can be seen, with the use of hardware, the simulation time can be significantly reduced regardless of the number of circuits to be simulated.

4. Conclusions

In this work, the development of a numerical simulator based on FPGA was proposed, significantly contributing to the field of efficient hardware-based simulation of chaotic systems. Using the Verilog language, an ODE solver was created to solve the state equations of a Chua circuit and three synchronized Chua circuits. The system was synthesized on a Spartan 3E FPGA and used less than 4% of the available resources, demonstrating its resource efficiency. The results were compared with those obtained using Octave numerical calculation software. The proposed system achieved a simulation time of 0.2 ms for one and three circuits with 10,000 samples, whereas the software took 493 ms and 3.1717 s for one and three circuits, respectively. This substantial improvement in simulation speed highlights the effectiveness of the FPGA-based approach in handling complex simulations more efficiently than traditional software methods. It is also confirmed that the simulation time using the software increases with the number of circuits, while for the simulator using the FPGA, it remains the same regardless of the number of simulated circuits, being limited only to the FPGA resources.