All-Grounded Passive Component Mixed-Mode Multifunction Biquadratic Filter and Dual-Mode Quadrature Oscillator Employing a Single Active Element

Abstract

This paper introduces a compact analog configuration that concurrently realizes a mixed-mode biquadratic filter and a dual-mode quadrature oscillator (QO) by employing a single differential differencing gain amplifier (DDGA) and all-grounded passive components. The proposed design supports four fundamental operation modes—voltage-mode (VM), current-mode (CM), trans-impedance-mode (TIM), and trans-admittance-mode (TAM)—utilizing the same circuit topology without structural modifications. In filter operation, it offers low-pass, high-pass, band-pass, band-stop, and all-pass responses with orthogonal and electronic pole frequency and quality factor. In oscillator operation, it delivers simultaneous voltage and current quadrature outputs with independent tuning of oscillator frequency and condition. The grounded-component configuration simplifies layout and enhances its suitability for monolithic integration. Numerical simulations in a 0.18-μm CMOS process with ±0.9 V supply confirm theoretical predictions, demonstrating precise gain-phase characteristics, low total harmonic distortion (<7%), modest sensitivity to 5% component variations, and stable operation from −40 °C to 120 °C. These results, combined with the circuit’s low component count and integration suitability, suggest strong potential for future development in low-power IoT devices, adaptive communication front-ends, and integrated biomedical systems.

1. Introduction

Multifunction biquadratic filters (MBFs) are essential circuit building blocks in analog and mixed-signal processing systems due to their capability to generate multiple standard second-order filter functions from a single configuration design. Such versatility makes MBFs highly valuable in data communication systems, instrumentation and measurement equipment, and data acquisition interfaces. Depending on the port configuration, MBFs can realize diverse filtering responses including low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS), and all-pass (AP) functions, thereby reducing design complexity and hardware redundancy. Over the past decade, various MBF realizations using different active devices have been reported, with many also extending operation into mixed-mode domain to enhance flexibility [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15].

Another important circuit building block is the quadrature oscillator (QO), which produces two sinusoidal outputs with a 90° phase difference. This feature is critical in telecommunication systems, particularly for quadrature mixers, single-sideband generator, and channel selection, as well as in instrumentation for testing and measurement applications. Numerous QO configurations have been explored in the literature, employing various active components to provide voltage-mode and current-mode quadrature outputs [16,17,18,19,20].

Although significant progress has been achieved, most prior works have treated MBFs and QOs as separate designs. More recent studies have attempted to unify these two functionalities within a single topology [21,22,23,24,25,26,27]. However, the majority of existing solutions still face critical limitations:

(i)

Several MBF designs do not support all four fundamental modes of operation—voltage-mode (VM), trans-admittance-mode (TAM), current-mode (CM), and trans-impedance-mode (TIM) [3,4,8,21,22,23,24,25,26].

(ii)

Reported QO circuits often provide only single-mode quadrature outputs, i.e., voltage-only or current-only, whereas practical systems increasingly require dual-mode quadrature oscillation [21,24].

(iii)

A substantial number of designs rely on multiple active building blocks [1,2,3,4,6,7,9,10,13,14,15,17,19,21,22,23,24,26,27], leading to higher power consumption and silicon area.

(iv)

Many topologies incorporate floating passive elements [3,5,6,7,8,10,11,12,13,14,24,25], which are undesirable for integrated circuit (IC) fabrication because they can lead to instability, noise, unpredictability, and reliability risks.

(v)

Many earlier approaches lack electronic tunability [3,6,7,15,19,24] or fail to provide orthogonal control over key performance parameters such as pole frequency, quality factor, oscillation frequency, and condition of oscillation [2,5,7,12,15,20,25,26].

In recent years, the demand for compact, power-efficient, and reconfigurable analog circuits has significantly increased, especially in the fields of wireless communication, biomedical instrumentation, and sensor interface systems. The integration of multifunctional filtering and oscillation capabilities into a single, unified structure provides substantial benefits in minimizing design complexity, silicon area, and power consumption. Traditional designs frequently require separate and specific configurations to achieve distinct functions such as filtering and oscillation, leading to increased hardware redundancy and integration difficulties. Furthermore, many existing solutions rely on floating passive elements or multiple active devices, which hinder their suitability for integration in modern CMOS technologies. To address these gaps, this work proposes a novel compact analog circuit that simultaneously realizes a mixed-mode MBF and a dual-mode QO using a single active component and all-grounded passive elements. The primary active component used in this work is the differential differencing gain amplifier (DDGA), which is a newly defined and versatile analog active building block [28]. Compared to previous designs, the contributions of this work can be summarized as follows:

(i)

The proposed circuit uniquely employs only one DDGA, two grounded resistors, and two grounded capacitors, significantly minimizing component count and power requirement.

(ii)

The topology seamlessly supports VM, TIM, CM, and TAM operation modes without structural modifications.

(iii)

In oscillator mode, the circuit concurrently provides both voltage and current quadrature outputs, meeting the demands of modern mixed-signal applications.

(iv)

The exclusive use of grounded capacitors and resistors enhances layout simplicity, reduces parasitic effects, and improves IC integration feasibility.

(v)

Critical parameters (pole frequency, quality factor, oscillation frequency, and oscillation condition) can be independently tuned via the DDGA transconductances, offering adaptability for advanced applications.

The detailed theoretical formulation, supported by computer simulations in 0.18-μm CMOS technology, verifies the feasibility and robustness of the proposed circuit.

The remainder of this paper is organized as follows. Section 2 introduces the fundamentals of the DDGA element. Section 3 presents the proposed mixed-mode MBF configuration. Section 4 discusses the proposed dual-mode QO. Section 5 describes the analysis of non-ideal performance, while Section 6 provides verification of functionality through simulation results. In Section 7, the performance of the proposed circuit is discussed and compared to previously reported similar studies. Finally, Section 8 concludes the work and outlines potential directions for future research.

2. Fundamentals of the DDGA Element

The DDGA is essentially a specialized variant of a fully balanced difference amplifier with electronically adjustable transfer gain. As shown in the circuit diagram in Figure 1a, the transfer characteristic of the DDGA can be described by the following equation [28]:

$$\begin{array}{c}\end{array}\left[\begin{array}{c}{i}_{z+}\\ i_{z-}\\ i_o\\ v_w\end{array}\right]=\left[\begin{array}{ccccc}{g}_{mA}& -g_{mA}& -g_{mB}& g_{mB}& 0\\ -g_{mA}& g_{mA}& g_{mB}& -g_{mB}& 0\\ 0& 0& 0& 0& g_{mC}\\ 0& 0& 0& 0& \beta \end{array}\right]\left[\begin{array}{c}{v}_{p1}\\ v_{n1}\\ v_{p2}\\ v_{n2}\\ v_{z+}\end{array}\right]\begin{array}{c}\end{array}.$$

(1)

The parameters g_mA, g_mB, and g_mC represent the effective transconductance gains, while β denotes the transfer voltage gain of the DDGA. Since the DDGA features two differential high-input impedance terminals (p₁, n₁) and (p₂, n₂), it is ideal for processing fully differential input signals. Additionally, it has electronically controllable gains, an essential characteristic for several analog signal processing generations.

Figure 1b shows the CMOS transistor-level implementation of the DDGA. The circuit structure is implemented with four floating current-controlled current sources, implemented by transistors M_1k–M_9k (where k indicates A, B, C, and D). The tunable transconductance gain (g_mk) realized by each cell can be electronically adjusted and is determined by [29]:

$$\begin{array}{c}\end{array}{g}_{mk}=\left({\displaystyle \frac{g_{1k}{g}_{2k}}{g_{1k}+g_{2k}}}\right)+\left({\displaystyle \frac{g_{3k}{g}_{4k}}{g_{3k}+g_{4k}}}\right),$$

(2)

where

$$\begin{array}{c}\end{array}{g}_{ik}=\sqrt{\left({\displaystyle \frac{\mu C_{ox}{W}_i}{L_i}}\right)I_{Bk}},\mathrm{for}i=1,2,3,4.$$

(3)

In Equation (3), I_Bk denotes the DC bias current, μ represents the channel carrier mobility, C_ox signifies the per-unit-area gate-oxide capacitance, while W_i and L_i refer to the channel width and length of M_ik, respectively. Equations (2) and (3) clearly indicate that the value of g_mk can be electronically modified by tuning the relevant bias current I_Bk. In addition, transistors M_1C–M_4C and M_1D–M_4D act as a current-controlled voltage amplifier with a voltage gain of β = v_w/v_z+ = g_mC/g_mD, and this can be scaled using I_BC and I_BD.

3. Proposed Mixed-Mode MBF

Figure 2 presents the proposed mixed-mode MBF, which uses only a single DDGA along with two grounded resistors and two grounded capacitors. It should be noted that the input and output signals of the circuit can be either voltage or current, with the subscripts “in“ and “o” indicating input and output, respectively. Therefore, the proposed circuit is capable of functioning as a mixed-mode MBF with an identical design. The analysis of the proposed circuit under ideal conditions, in which parasitic impedances and the voltage and current tracking errors of the DDGA are ignored, reveals details for VM, TIM, CM, and TAM as follows.

3.1. VM and TIM MBF Realizations

When i_in1, i_in2, and i_in3 are all set to zero (not connected), the three generic voltage-mode biquadratic filter functions for this one-input three-output MBF can be realized as follows.

$$H_{VBP}\left(s\right)={\displaystyle \frac{v_{BP}}{v_{in}}}={\displaystyle \frac{v_{o1}}{v_{in}}}=\left({\displaystyle \frac{g_{mC}}{g_{mD}}}\right)H_{BP}\left(s\right),$$

(4)

$$H_{VHP}\left(s\right)={\displaystyle \frac{v_{HP}}{v_{in}}}={\displaystyle \frac{v_{o2}}{v_{in}}}=\left(-g_{mB}{R}_2\right)H_{HP}\left(s\right),$$

(5)

and

$$H_{VLP}\left(s\right)={\displaystyle \frac{v_{LP}}{v_{in}}}={\displaystyle \frac{v_{o3}}{v_{in}}}=\left({\displaystyle \frac{g_{mB}}{g_{mA}}}\right)H_{LP}\left(s\right).$$

(6)

In expressions (4)–(6), the transfer functions H_BP(s), H_HP(s), and H_LP(s) correspond to

$$H_{BP}\left(s\right)={\displaystyle \frac{\left(\frac{g_{mB}}{C_2}\right)s}{D(s)}},$$

(7)

$$H_{HP}\left(s\right)={\displaystyle \frac{s^2}{D(s)}},$$

(8)

and

$$H_{LP}\left(s\right)={\displaystyle \frac{\left(\frac{g_{mA}{g}_{mC}}{C_1{C}_2}\right)}{D(s)}},$$

(9)

where

$$D\left(s\right)=s^2+\left({\displaystyle \frac{g_{mB}}{C_2}}\right)s+\left({\displaystyle \frac{g_{mA}{g}_{mC}}{C_1{C}_2}}\right).$$

(10)

Further inspection of Equations (4)–(6) reveals that non-inverted BP, inverted HP, and non-inverted LP voltage responses can be obtained at v_o1, v_o2, and v_o3, with passband gains of (g_mC/g_mD), (g_mBR₂), and (g_mB/g_mA), respectively. It is also noted that VM realization does not require any matching of components.

On the other hand, when v_in is connected to ground (v_in = 0), the proposed mixed-mode MBF in Figure 2 can perform the MBF in TIM with three following biquadratic filter functions.

$$H_{ZBP}\left(s\right)={\displaystyle \frac{v_{BP}}{i_{in}}}={\displaystyle \frac{v_{o1}}{i_{in2}}}=\left({\displaystyle \frac{\beta }{g_{mB}}}\right)H_{BP}(s),$$

(11)

$$H_{ZHP}\left(s\right)={\displaystyle \frac{v_{HP}}{i_{in}}}={\displaystyle \frac{v_{o2}}{i_{in1}}}=\left(-g_{mA}{R}_1{R}_2\right)H_{HP}(s),$$

(12)

and

$$H_{ZLP}\left(s\right)={\displaystyle \frac{v_{LP}}{i_{in}}}={\displaystyle \frac{v_{o1}}{i_{in3}}}=\left(-{\displaystyle \frac{1}{g_{mD}}}\right)H_{LP}(s).$$

(13)

The relation in Equation (11) describes a non-inverted BP filter in TIM, featuring an electronically tunable passband gain represented as β/g_mB. The passband gains for the inverted HP and LP filter responses, defined in Equations (12) and (13), are given by (g_mAR₁R₂) and 1/g_mD, respectively. Notably, in all cases of TIM filter realizations, it is not required to match circuit components.

3.2. CM and TAM MBF Realizations

The proposed mixed-mode MBF circuit in Figure 2 can be operated in CM by setting v_in = 0. As a result, this scheme yields the following three CM biquadratic filter functions:

$$H_{IBP}\left(s\right)={\displaystyle \frac{i_{BP}}{i_{in}}}={\displaystyle \frac{i_{o1}}{i_{in1}}}=\left({\displaystyle \frac{g_{mA}{g}_{mC}{R}_1}{g_{mB}}}\right)H_{BP}(s),$$

(14)

$$H_{IHP}\left(s\right)={\displaystyle \frac{i_{HP}}{i_{in}}}={\displaystyle \frac{i_{o2}}{i_{in1}}}=\left(g_{mA}{R}_1\right)H_{HP}(s),$$

(15)

and

$$H_{ILP}\left(s\right)={\displaystyle \frac{i_{LP}}{i_{in}}}={\displaystyle \frac{i_{o3}-i_{o1}}{i_{in2}}}=H_{LP}(s).$$

(16)

In Equation (16), a simple transconductance equality, g_mB = g_mC, is required for the realization of CM LP filter.

With i_in1 = i_in2 = i_in3 = 0, the TAM filtering functions are obtained as:

$$H_{YBP}\left(s\right)={\displaystyle \frac{i_{BP}}{v_{in}}}={\displaystyle \frac{i_{o1}}{v_{in}}}=(g_{mC})H_{BP}(s),$$

(17)

and

$$H_{YHP}\left(s\right)={\displaystyle \frac{i_{HP}}{v_{in}}}={\displaystyle \frac{i_{o2}}{v_{in}}}=(g_{mB})H_{HP}(s).$$

(18)

3.3. Additional BS and AP Response Realizations in VM and TAM

Noticeably, to implement additional BS and AP biquadratic filter functions, this can be easily achieved by connecting the relevant output responses from the VM filter in Figure 2. The BS and AP biquadratic filter functions for both VM and TAM operations can be realized, as illustrated in Figure 3, by incorporating an extra DDGA and a grounded resistor R₃. Since, as highlighted in Figure 3a for g_mA = g_mB = g_mC = 1/R₃, v_o4 = β(v_LP − v_HP) and i_o4 = g_mC(v_LP − v_HP), we can write:

$$H_{VBS}\left(s\right)={\displaystyle \frac{v_{BS}}{v_{in}}}={\displaystyle \frac{v_{o4}}{v_{in}}}=\beta H_{BS}(s),$$

(19)

and

$$H_{YBS}\left(s\right)={\displaystyle \frac{i_{BS}}{v_{in}}}={\displaystyle \frac{i_{o4}}{v_{in}}}=(g_{mC})H_{BS}(s),$$

(20)

where

$$H_{BS}\left(s\right)={\displaystyle \frac{s^2+\left(\frac{g_{mA}{g}_{mC}}{C_1{C}_2}\right)}{D(s)}}.$$

(21)

Therefore, the circuit realizes BS responses in VM and TAM at v_o4 and i_o4, respectively.

From Figure 3b, we can similarly realize the AP responses in VM and TAM by connecting v_o5 = β(v_LP − v_HP − v_BP) and i_o5 = g_mC(v_LP − v_HP − v_BP), respectively. The two voltage and current outputs in this case are, therefore, derived as follows:

$$H_{VAP}\left(s\right)={\displaystyle \frac{v_{AP}}{v_{in}}}={\displaystyle \frac{v_{o5}}{v_{in}}}=\beta H_{AP}(s),$$

(22)

and

$$H_{YAP}\left(s\right)={\displaystyle \frac{i_{AP}}{v_{in}}}={\displaystyle \frac{i_{o5}}{v_{in}}}=(g_{mC})H_{AP}(s),$$

(23)

where

$$H_{AP}\left(s\right)={\displaystyle \frac{s^2-\left(\frac{g_{mC}}{C_2}\right)s+\left(\frac{g_{mA}{g}_{mC}}{C_1{C}_2}\right)}{D(s)}}.$$

(24)

3.4. Additional BS and AP Response Realizations in CM and TIM

Using the same concept, the additional BS and AP responses in CM and TIM can be effectively configured through appropriately connecting the output voltages from the TIM filter in Figure 2, as shown in Figure 4. Thus, based on Figure 4a where g_mk = 1/R₃, the BS filter responses can be obtained in both CM form and TIM form as follows:

$$H_{IBS}\left(s\right)={\displaystyle \frac{i_{BS}}{i_{in}}}=-g_{mC}\left({\displaystyle \frac{v_{o1}}{i_{in}}}+{\displaystyle \frac{v_{o2}}{i_{in}}}\right)=H_{BS}(s),$$

(25)

and

$$H_{ZBS}\left(s\right)={\displaystyle \frac{v_{BS}}{i_{in}}}=-\left({\displaystyle \frac{\beta }{g_{mC}}}\right)\left({\displaystyle \frac{v_{o1}}{i_{in}}}+{\displaystyle \frac{v_{o2}}{i_{in}}}\right)=\left({\displaystyle \frac{\beta }{g_{mC}}}\right)H_{BS}(s).$$

(26)

Similarly, the circuit in Figure 4b provides the following AP filter responses for both CM and TIM simultaneously:

$$H_{IAP}\left(s\right)={\displaystyle \frac{i_{AP}}{i_{in}}}=g_{mC}\left({\displaystyle \frac{v_{BP}}{i_{in}}}-{\displaystyle \frac{v_{HP}}{i_{in}}}-{\displaystyle \frac{v_{LP}}{i_{in}}}\right)=\left({\displaystyle \frac{g_{mC}}{g_{mB}}}\right)H_{AP}(s),$$

(27)

and

$$H_{ZAP}\left(s\right)={\displaystyle \frac{v_{AP}}{i_{in}}}=\left({\displaystyle \frac{\beta }{g_{mB}}}\right)\left({\displaystyle \frac{v_{BP}}{i_{in}}}-{\displaystyle \frac{v_{HP}}{i_{in}}}-{\displaystyle \frac{v_{LP}}{i_{in}}}\right)=\left({\displaystyle \frac{\beta }{g_{mB}}}\right)H_{AP}(s).$$

(28)

3.5. Pole Frequency and Quality Factor of the Proposed Mixed-Mode MBF

The pole frequency (ω_p) and the quality factor (Q) of the proposed mixed-mode MBF in Figure 2 are obtained using Equation (10) as follows:

$${\omega }_p=2\pi f_p=\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}}{C_1{C}_2}}},$$

(29)

and

$$Q=\left({\displaystyle \frac{1}{g_{mB}}}\right)\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}{C}_2}{C_1}}}.$$

(30)

Equation (29) explicitly indicates that the ω_p can be electronically controlled via the transconductances g_mA and g_mC. Additionally, from Equation (30), the desired Q factor can also be adjusted using the transconductance g_mB, which allows for independent electronic tuning.

4. Proposed Dual-Mode QO

The proposed dual-mode QO, which is depicted in Figure 5, provides two voltage outputs (v_osc1 and v_osc2) and two current outputs (i_osc1 and i_osc2) simultaneously. It is composed of the proposed mixed-mode MBF depicted in Figure 2 without applying any input signals. The circuit analysis results in the characteristic equation as follows:

$$s^2+\left({\displaystyle \frac{g_{mB}-g_{mA}\beta }{C_2}}\right)s+\left({\displaystyle \frac{g_{mA}{g}_{mC}}{C_1{C}_2}}\right)=0.$$

(31)

The oscillation condition (OC) and the oscillation frequency (OF) derived from the oscillator are determined as:

$$\mathrm{OC}:g_{mA}{g}_{mC}=g_{mB}{g}_{mD},$$

(32)

and

$$\mathrm{OF}:{\omega }_{osc}=2\pi f_{osc}=\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}}{C_1{C}_2}}}.$$

(33)

It is observed from Equations (32) and (33) that both orthogonal and electronic controllability of the characteristics OC and OF are achieved. At the OF, the relationship between v_osc1 and v_osc2 is described as:

$$v_{osc2}=K_V{e}^{j{90}^{\circ }}{v}_{osc1},$$

(34)

where $K_V=\left({\displaystyle \frac{1}{g_{mD}}}\right)\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}{C}_1}{C_2}}}$. The above relation confirms that the output voltages v_osc1 and v_osc2 exhibit the quadrature property. For the two output currents, i_osc1 and i_osc2, it also holds that:

$$i_{osc2}=K_C{e}^{j{90}^{\circ }}{i}_{osc1},$$

(35)

with $K_C=\sqrt{{\displaystyle \frac{g_{mA}{C}_2}{g_{mC}{C}_1}}}$. The currents are shifted in phase by 90°, which validates the quadrature current characteristic.

5. Non-Ideal Performance Analysis

In this section, we examine the non-ideal performance analyses of the proposed circuits. The observed effects mainly stem from the non-idealities associated with the DDGA, which are related to two primary factors. The finite tracking errors produce the first set of effects, while the presence of the DDGA parasitic impedances leads to the subsequent effects.

5.1. Transfer Error Analysis

The non-ideal performance of the DDGA, taking its transfer errors into account, can be characterized by the following terminal voltage and current relationships:

$$\begin{array}{c}\end{array}\left[\begin{array}{c}{i}_{z+}\\ i_{z-}\\ i_o\\ v_w\end{array}\right]=\left[\begin{array}{ccccc}{\alpha }_A{g}_{mA}& -{\alpha }_A{g}_{mA}& -{\alpha }_B{g}_{mB}& {\alpha }_B{g}_{mB}& 0\\ -{\alpha }_A{g}_{mA}& {\alpha }_A{g}_{mA}& {\alpha }_B{g}_{mB}& -{\alpha }_B{g}_{mB}& 0\\ 0& 0& 0& 0& {\alpha }_C{g}_{mC}\\ 0& 0& 0& 0& \delta \beta \end{array}\right]\left[\begin{array}{c}{v}_{p1}\\ v_{n1}\\ v_{p2}\\ v_{n2}\\ v_{z+}\end{array}\right]\begin{array}{c}\end{array}.$$

(36)

In this context, α_k and δ denote the inaccuracy factor of the transconductance gain and the parasitic voltage gain of the DDGA, respectively. Upon re-evaluating the proposed circuits in Figure 2 and Figure 5 with the non-ideal aspects of the DDGA mentioned above, the non-ideal parameters for each mode are summarized in

Table 1. Non-ideal transfer functions of the proposed mixed-mode MBF in Figure 2.

Operation Mode	Filter Type	Transfer Function	Passband Gain
VM	HVBP(s)	${\displaystyle \frac{\left(\frac{\delta g_{mC}}{g_{mD}}\right)\left(\frac{{\alpha }_B{g}_{mB}}{C_2}\right)s}{D_n(s)}}$	${\displaystyle \frac{\delta g_{mC}}{g_{mD}}}$
	HVHP(s)	${\displaystyle \frac{-\left({\alpha }_B{g}_{mB}{R}_2\right)s^2}{D_n(s)}}$	αBgmBR2
	HVLP(s)	${\displaystyle \frac{\left(\frac{{\alpha }_B{\alpha }_C{g}_{mB}{g}_{mC}}{C_1{C}_2}\right)}{D_n(s)}}$	${\displaystyle \frac{{\alpha }_B{g}_{mB}}{{\alpha }_A{g}_{mA}}}$
TIM	HZBP(s)	${\displaystyle \frac{\left(\frac{\delta \beta }{C_2}\right)s}{D_n(s)}}$	${\displaystyle \frac{\delta \beta }{{\alpha }_B{g}_{mB}}}$
	HZHP(s)	${\displaystyle \frac{-\left({\alpha }_A{g}_{mA}{R}_1{R}_2\right)s^2}{D_n(s)}}$	αAgmAR1R2
	HZLP(s)	${\displaystyle \frac{-\left(\frac{{\alpha }_A\delta g_{mA}{g}_{mC}}{g_{mD}{C}_1{C}_2}\right)}{D_n(s)}}$	${\displaystyle \frac{\delta }{{\alpha }_C{g}_{mD}}}$
CM	HIBP(s)	${\displaystyle \frac{\left(\frac{{\alpha }_A{\alpha }_C{g}_{mA}{g}_{mC}{R}_1}{C_2}\right)s}{D_n(s)}}$	${\displaystyle \frac{{\alpha }_A{\alpha }_C{g}_{mA}{g}_{mC}{R}_1}{{\alpha }_B{g}_{mB}}}$
	HIHP(s)	${\displaystyle \frac{\left({\alpha }_A{g}_{mA}{R}_1\right)s^2}{D_n(s)}}$	αAgmAR1
	HILP(s)	${\displaystyle \frac{\left(\frac{{\alpha }_A{\alpha }_C{g}_{mA}{g}_{mC}}{C_1{C}_2}\right)}{D_n(s)}}$	1
TAM	HYBP(s)	${\displaystyle \frac{\left(\frac{{\alpha }_B{\alpha }_C{g}_{mB}{g}_{mC}}{C_2}\right)s}{D_n(s)}}$	αCgmC
	HYHP(s)	${\displaystyle \frac{\left({\alpha }_B{g}_{mB}\right)s^2}{D_n(s)}}$	αBgmB

Note: $D\left(s\right)=s^2+\left({\displaystyle \frac{{\alpha }_B{g}_{mB}}{C_2}}\right)s+\left({\displaystyle \frac{{\alpha }_A{\alpha }_C{g}_{mA}{g}_{mC}}{C_1{C}_2}}\right)$.

and

Table 2. Non-ideal OC and OF of the proposed dual-mode QO in Figure 5.

Operation Mode	OC	OF	Quadrature Output
VM	$g_{mA}{g}_{mC}=\left({\displaystyle \frac{{\alpha }_B}{{\alpha }_A\delta }}\right)\left(g_{mB}{g}_{mD}\right)$	${\omega }_{osc}=\sqrt{{\displaystyle \frac{{\alpha }_A{\alpha }_C{g}_{mA}{g}_{mC}}{C_1{C}_2}}}$	$v_{osc2}=K_{Vn}{e}^{j{90}^{\circ }}{v}_{osc1}$, where $K_{Vn}=\left({\displaystyle \frac{\delta }{{\alpha }_C{g}_{mD}}}\right)\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}{C}_1}{C_2}}}$
CM			$i_{osc2}=K_{Cn}{e}^{j{90}^{\circ }}{i}_{osc1}$, where $K_{Cn}=\left({\displaystyle \frac{1}{{\alpha }_C}}\right)\sqrt{{\displaystyle \frac{g_{mA}{C}_2}{g_{mC}{C}_1}}}$

, respectively.

In addition to Table 1 and Table 2, the sensitivity coefficients of the key filter and oscillator parameters with respect to the active and passive circuit components ($S_x^y$) are evaluated and tabulated in

Table 3. Sensitivity coefficients of the proposed MBF and dual-mode QO.

Configuration	Sensitivity	Circuit Components (x)
		gmA	gmB	gmC	C1	C2	αA	αB	αC
MBF	$S_x^{{\omega }_p}$	0.5	0	0.5	−0.5	−0.5	0.5	0	0.5
	$S_x^Q$	0.5	−1	0.5	−0.5	0.5	0.5	−1	0.5
Dual-mode QO	$S_x^{{\omega }_{osc}}$	0.5	0	0.5	−0.5	−0.5	0.5	0	0.5

, where $y\in \left\{{\omega }_p,Q,{\omega }_{osc}\right\}$ and $x\in \left\{g_{mA},g_{mB},g_{mC},C_1,C_2,{\alpha }_A,{\alpha }_B,{\alpha }_C\right\}$. As indicated in Table 3, none of the sensitivity coefficients exceed unity in magnitude. Therefore, both the proposed circuits demonstrate satisfactory performance in terms of active and passive sensitivity.

5.2. Parasitic Element Effect Analysis

The parasitic element effects of the DDGA primarily consist of high-value stray resistance in parallel with the low-value stray capacitance at terminals p1, p2, n1, n2, z+, z−, and o. This can be denoted as (R_p1 // C_p1), (R_p2 // C_p2), (R_n1 // C_n1), (R_n2 // C_n2), (R_z+ // C_z+), (R_z− // C_z−), and (R_o // C_o), respectively. Additionally, there exists low-value stray serial resistance (R_w) at terminal w. Accordingly, the practical behavior model of the DDGA, including its terminal parasitic elements, is illustrated in Figure 6. It is important to note that both the proposed configurations depicted in Figure 2 and Figure 5 employ all grounded passive elements. As a result, they are capable of absorbing the effect of the DDGA parasites. We also notice that the circuit implementation using solely grounded capacitors is beneficial for further integration.

Accounting for the parasitic impedance effects of the DDGA in the proposed mixed-mode MBF shown in Figure 2, the modified ω_p and Q-factor are defined as follows:

$${\omega }_p=\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}}{\left(C_1+C_o+C_{n1}\right)\left(C_2+C_{p2}+C_{z+}\right)}}},$$

(37)

and

$$Q=\left[{\displaystyle \frac{1}{g_{mB}+\left(\frac{1}{R_{p2}//R_{z+}}\right)}}\right]\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}\left(C_2+C_{p2}+C_{z+}\right)}{\left(C_1+C_o+C_{n1}\right)}}}.$$

(38)

The expressions above suggest that the impact of the DDGA parasitic elements on the filter performance can be disregarded by satisfying the following conditions:

min (g_mB) >> parasitic resistances (R_p2, R_z+)

(39)

and

min (C₁, C₂) >> parasitic capacitances (C_p2, C_z+, C_o, C_n1).

(40)

These conditions are conveniently satisfied since the values of transconductance and external capacitors can easily be set significantly higher than those of the parasitic elements. Moreover, the undesirable parasitics also introduced four extra dominant poles, which restrict the operating frequency range of the proposed circuit. These can be expressed as follows:

$${\omega }_1={\displaystyle \frac{1}{\left(R_1//R_{p1}\right)C_{p1}}},$$

(41)

$${\omega }_2={\displaystyle \frac{1}{\left(R_{p2}//R_{z+}\right)\left(C_2+C_{p2}+C_{z+}\right)}},$$

(42)

$${\omega }_3={\displaystyle \frac{1}{\left(R_o//R_{n1}\right)\left(C_1+C_o+C_{n1}\right)}},$$

(43)

and

$${\omega }_4={\displaystyle \frac{1}{\left(R_2//R_{z-}\right)C_{z-}}}.$$

(44)

For optimal frequency operation, the filter circuit needs to operate at a frequency that is higher than ω₁ and ω₂, but lower than ω₃ and ω₄. Therefore, the effective operating frequency of the proposed mixed-mode filter in Figure 2 must satisfy the following condition:

10 × max {ω₁, ω₂} << ω << 0.1 × min {ω₃, ω₄}.

(45)

In a similar manner, when analyzing the parasitic impedances of the DDGA in the proposed dual-mode QO illustrated in Figure 5, its non-ideal characteristics of both OC and OF can be evaluated as:

$$\mathrm{OC}:g_{mA}{g}_{mC}=g_{mD}\left[g_{mB}+{\displaystyle \frac{1}{\left(R_{p2}//R_{z+}\right)}}+{\displaystyle \frac{\left(C_2+C_{p2}+C_{z+}\right)}{\left(R_o//R_{n1}\right)\left(C_1+C_o+C_{n1}\right)}}\right],$$

(46)

and

$$\mathrm{OF}:{\omega }_{osc}=\sqrt{{\displaystyle \frac{g_{mA}{g}_{mC}+\left[\frac{1}{\left(R_{p2}//R_{z+}\right)\left(R_o//R_{n1}\right)}\right]}{\left(C_1+C_o+C_{n1}\right)\left(C_2+C_{p2}+C_{z+}\right)}}}.$$

(47)

Therefore, according to Equations (46) and (47), to prevent the parasitic effects, the transconductance and the external capacitor values need to be larger than the stray resistances and capacitances.

6. Functionality Verification

The functionality of the proposed circuits shown in Figure 2 and Figure 5 has been verified through simulation results. The numerical simulations were conducted using PSPICE (personal simulation program for integrated circuits emphasis) program with 0.18-μm CMOS process parameters. A CMOS DDGA in Figure 1b was designed and simulated with the transistor dimensions listed in

Table 4. Transistor dimensions of the DDGA in Figure 1b.

Transistor	W (μm)	L (μm)
M1k, M2k	24	0.18
M3k, M4k	30	0.18
M5k–M7k	5	0.18
M8k, M9k	6	0.18

. The important design parameters and simulation setup parameters are summarized in

Table 5. Design and simulation setup parameters and sweep ranges.

Parameter	Specification/Value
Hardware	Windows 11, Intel® Core™ i7-1185G7 @ 3.00 GHz, 16 GB RAM
Software	PSpice OrCAD Capture CIS 16.5-p003 (v16-5-13C)
Model	TSMC 0.18 μm CMOS
Power Supply	±0.9 V
Passive elements	R1 = R2 = 1 kΩ, C1 = C2 = 100 pF
Transconductances	gmk = 1 mA/V with IBk = 80 µA
Analyses	AC: 1 kHz–1 GHz; Transient: 0 s–2.5 ms
Variations	Monte Carlo with n = 200 (±5% R/C, gmk); Temperature: −40 °C to 120 °C

.

Although PSPICE was employed for the CMOS-level simulation and verification due to its accuracy in transistor-level circuit analysis, other tools such as LTspice are indeed suitable for similar analog circuit simulations, especially for filter frequency responses and oscillator behavior. Furthermore, we have noted that MATLAB/Simulink can also be effectively used for system-level design, transfer function verification, and symbolic/numerical analysis of the proposed biquadratic filter and oscillator equations before proceeding to transistor-level implementation.

6.1. Performance of the Proposed Mixed-Mode MBF in Figure 2

In the design example of the proposed MBF in Figure 2, the DDGA transconductances are specified as g_mk = 1 mA/V, with I_Bk = 80 μA. This specification yields component-dependent filter characteristics with f_p = 1.59 MHz and Q = 1 in theory. Figure 7 shows the transient and frequency responses for the BP (v_o1), HP (v_o2), and LP (v_o3) filters in VM using the input signal v_in while setting i_in = 0. Figure 8 represents the transient and frequency responses for the BP (v_o1), HP (v_o2), and LP (v_o3) filters in TIM with the input signal i_in and v_in = 0. Furthermore, Figure 9 displays the CM frequency responses for BP, HP, and LP filters. From Figure 7, Figure 8 and Figure 9, the frequency responses of the VM, TIM, and CM for the biquadratic filters exhibit excellent alignment with the theoretical models, confirming the accuracy of the derived transfer functions. Notably, the BP, HP, and LP filters achieved expected behaviors, with predictable roll-offs and resonance features, supporting the idea of mixed-mode operation.

To illustrate the orthogonal tuning of the filter’s pole frequency (f_p), the transconductances (g_mk) of the DDGA are adjusted to values of 1.30 mA/V, 1.53 mA/V, and 1.90 mA/V. This adjustment results in theoretical f_p values of 2.00 MHz, 2.43 MHz, and 3.00 MHz, respectively. Figure 10 displays the results of the BP response in VM, with the simulated f_p values recorded at 1.90 MHz, 2.40 MHz, and 3.10 MHz. Conversely, the independent adjustment of the Q-factor without changing the f_p value is shown in Figure 11. The results were derived by modifying g_mB to 2 mA/V, 1 mA/V, and 0.2 mA/V, and remaining g_mA = g_mC = g_mD = 1 mA/V, achieving Q values of 0.5, 1, and 2, respectively. It is clear from Figure 10 and Figure 11 that the orthogonal tunability of the f_p and Q-factor was successfully demonstrated with high precision. This feature offers independent controllability, which is an essential advantage for adaptive filtering applications.

In addition to examining the effects of temperature variations, the proposed filter has been simulated under a temperature range of −40 °C to 120 °C. Figure 12 demonstrates the BP, HP, and LP frequency responses in VM for these different temperatures. As can be observed, this variation has relatively little effect on the frequency and phase responses of the proposed filter.

Furthermore, Monte Carlo analysis that takes into account both transconductances (g_mki) and capacitance values (C₁ and C₂) with a 5% Gaussian deviation was performed to evaluate the sensitivity performance for over 200 simulation runs. Figure 13 illustrates the resultant relative histograms of f_p. A standard deviation of only ~31.82 kHz against a nominal 1.59 MHz center frequency suggests a low sensitivity to random variations in component values. This supports the reliability of the design under manufacturing imperfections.

6.2. Performance of the Proposed Dual-Mode QO in Figure 5

To validate the theoretical prediction of the proposed dual-mode QO shown in Figure 5, it was constructed with g_mk = 1 mA/V, R₁ = R₂ = 1 kΩ, and C₁ = C₂ = 100 pF. This configuration aims to produce the quadrature voltage and current outputs at an oscillation frequency of f_osc = 1.59 MHz. Figure 14a shows the simulated quadrature waveforms for the output voltages v_osc1 and v_osc2 in a steady-state condition. The simulated voltages exhibit a phase shift of 84.24°, and the simulated f_osc value is 1.56 MHz. Figure 14b also shows the frequency spectra for v_osc1 and v_osc2, with the total harmonic distortions (THD) recorded at 2.82% and 6.69%, respectively. Figure 15a,b, respectively, represent the CM quadrature output waveforms and their corresponding frequency spectra for i_osc1 and i_osc2. The simulated values of φ and f_osc are 88.74° and 1.557 MHz, respectively. The THD analyses for i_osc1 and i_osc2 indicate values of 2.82% and 7.13%, respectively. The results presented in Figure 14 and Figure 15 substantiate the feasibility of the proposed oscillator configuration through phase-accurate voltage and current outputs, with near-ideal 90° phase shifts. We observed slight discrepancies from perfect quadrature, but these are acceptable for most practical applications. The low THD (<7.2%) also demonstrates acceptable spectral purity for communication and measurement systems.

7. Discussion and Comparison to Previous Similar Works

In the past decade, various MBF and QO implementations have been proposed using active devices such as OTAs, CCIIs, DVCCs, VDTAs, and VDGAs. For a fair comparison, we focus exclusively on mixed-mode MBF and dual-mode QO operations.

Table 6. Characteristic comparison between the proposed circuit configuration and the previous similar designs.

Ref.	Configuration	No. of Active Elements	No. of Passive Elements		MBF Operation Mode				Orthogonal Tuning of ωp and Q	Single Active Element	All-Grounded Passive Element	Inbuilt Tunability	QO Operation Mode	Orthogonal Tuning of OC and OF	Technology	Power Supply (V)	Power Dissipation (mW)
			R	C	VM	CM	TIM	TAM
[1]	MBF	CCCCTA = 3	--	2	all five	all five	all five	LP, BP, HP	yes	no	yes	yes	--	--	TSMC 0.18 μm	±0.9	1.99
[2]	MBF	MI-OTA = 3, MO-OTA = 3	--	2	all five	all five	all five	all five	no	no	yes	yes	--	--	TSMC 0.18 μm	±0.5	0.075
[3]	MBF	DVCC = 1, MO-CCII = 1	4	2	--	all five	all five	--	yes	no	no	no	--	--	TSMC 0.18 μm	±0.9, ±0.38	N/A
[4]	MBF	DO-OTA = 3, switch = 1	--	2	--	LP, BP, HP	--	LP, BP, HP	yes	no	yes	yes	--	--	TSMC 0.35 μm	N/A	1.3
[5]	MBF	DXCCDITA = 1	2	2	all five	all five	all five	BP, HP	no	yes	no	yes	--	--	TSMC 0.35 μm	±1.5, +0.55	N/A
[6]	MBF	FDCCII = 2	4	2	all five	all five	all five	all five	yes	no	no	no	--	--	TSMC 0.18 μm	±0.9	1.32
[7]	MBF	VCII = 3, I-CB = 1	3	3	all five	all five	all five	all five	no	no	no	no	--	--	TSMC 0.18 μm	±0.9	0.00147
[8]	MBF	VD-DXCC = 1	2	2	all five	all five	--	--	yes	yes	no	yes	--	--	PDK 0.18 μm	±1.25	2.237
[9]	MBF	OTA = 5	--	2	all five	all five	all five	all five	yes	no	yes	yes	--	--	ADE 0.18 μm	±0.9, −0.36	0.191
[10]	MBF	EXCCTA = 2, switch = 1	4	2	all five	all five	all five	all five	yes	no	no	yes	--	--	PDK 0.18 μm	±1.25	5.76
[11]	MBF	VD-EXCCII = 1	3	2	all five	all five	all five	all five	yes	yes	no	yes	--	--	PDK 0.18 μm	±1.25	5.76
[12]	MBF	EX-CCCII = 1	1	2	all five	all five	BP, HP	all five	no	yes	no	yes	--	--	TSMC 0.18 μm	±0.5	1.35
[13]	MBF	VDBA = 2	2	2	all five	all five	LP, BP	all five	yes	no	no	yes	--	--	TSMC 0.18 μm	±0.75	0.373
[14]	MBF	VDBA = 3	1	2	all five	all five	all five	all five	no	no	no	yes	--	--	PDK 0.18 μm	±1.25	1.618
[15]	MBF	DVCC = 3	4	2	LP, BP, HP	all five	BP, HP	LP, BP, HP	no	no	yes	no	--	--	TSMC 0.18 μm	±1.25, +0.55	8.47
[16]	QO	CCCTA = 1	--	2	--	--	--	--	--	yes	yes	yes	VM/CM	yes	BJT, TSMC 0.35 μm	±1	N/A
[17]	QO	VDCC = 2	2	2	--	--	--	--	--	no	yes	yes	VM/CM	yes	TSMC 0.18 μm	±0.9	N/A
[18]	QO	VDTA = 2	--	2	--	--	--	--	--	yes	yes	yes	VM/CM	yes	TSMC 0.25 μm	±1.5	2.09
[19]	QO	DXMOCCII = 2, Rmos = 1	2	2	--	--	--	--	--	no	yes	no	VM/CM	yes	TSMC 0.25 μm	±1.25, −0.3, +0.81	6.87
[20]	QO	VDGA = 1	1	2	--	--	--	--	--	yes	yes	yes	VM/CM	yes	TSMC 0.35 μm	±1.5	1.36
[21]	MBF/QO	VDDDA = 3	1	2	all five	--	--	--	yes	no	yes	yes	VM	yes	TSMC 0.18 μm	±0.9	0.343
[22]	MBF/QO	VDCC = 2, switch = 3	2	2	--	all five	--	--	yes	no	yes	yes	VM/CM	yes	TSMC 0.18 μm	±0.9	N/A
[23]	MBF/QO	CCFTA = 2	--	2	--	all five	--	--	yes	no	yes	yes	VM/CM	yes	TSMC 0.18 μm	±1	2
[24]	MBF/QO	CCII = 2	3	2	all five	--	--	--	yes	no	no	no	VM	yes	IBM 0.13 μm	±0.75, +0.23	5.03
[25]	MBF/QO	VDGA = 1	2	2	LP, BP, HP	LP, BP, HP	--	--	yes	yes	no	yes	VM/CM	yes	TSMC 0.25 μm	±1	1.49
[26]	MBF/QO	VDCC = 2, switch = 2	1	2	--	all five	--	--	no	no	yes	yes	VM/CM	yes	TSMC 0.18 μm	±0.9	N/A
[27]	MBF/QO	VDGA = 2	--	2	LP, BP, HP	all five	LP, BP, HP	BP, HP	yes	no	yes	yes	VM/CM	yes	TSMC 0.18 μm	±0.9	2.84
Proposed circuit	MBF/QO	DDGA = 1	2	2	LP, BP, HP *	LP, BP, HP *	LP, BP, HP *	BP, HP *	yes	yes	yes	yes	VM/CM	yes	TSMC 0.18 μm	±0.9	1.83

Note: N/A = not available or not measured, “--” = not provided, * = Additional 1 DDGA and 1 resistor to achieve BS and AP responses, The full names of all devices are provided in the Abbreviations section.

presents the comparison between the proposed circuits and the previous reported similar works [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27]. As highlighted previously and also shown in Table 6, prior studies on mixed-mode MBFs and dual-mode QOs generally:

(i)

support only a limited set of operation modes (e.g., VM and CM) instead of all four modes (VM, CM, TIM, and TAM) [3,4,8,21,22,23,24,25,26];

(ii)

produce quadrature signals in only one domain (either voltage or current) rather than in both [21,24];

(iii)

require multiple active components [1,2,3,4,6,7,9,10,13,14,15,17,19,21,22,23,24,26,27] and/or floating passive components [3,5,6,7,8,10,11,12,13,14,24,25], which restricts CMOS integration;

(iv)

lack orthogonal electronic tuning of critical parameters such as pole frequency, quality factor, oscillation condition, and oscillation frequency [2,3,5,6,7,12,15,19,20,24,25,26].

Our work overcomes all four limitations by introducing a single-active-element topology based on the DDGA with only all-grounded passive elements and full four-mode operation, while also delivering dual-mode quadrature outputs and independent, orthogonal electronic control of both filter and oscillator parameters. This combination of features has not been reported together in previous literature. Therefore, the proposed design demonstrates promising development prospects in the following areas:

(i)

full CMOS integration in mixed-signal system-on-chip designs;

(ii)

low-voltage, low-power operation suitable for portable and IoT applications;

(iii)

adaptive communication front-ends where multifunctional, tunable analog processing is required;

(iv)

biomedical instrumentation and sensor interfaces that can benefit from compact and reconfigurable analog blocks;

(v)

the potential for extension to higher-order multifunction filters and multi-phase oscillators to address advanced signal-processing needs.

However, certain limitations of the design should be acknowledged as follows:

(i)

The achievable tuning range is bounded by CMOS bias current and device parameter limits.

(ii)

While THD remains below 7.2% in the tested case, higher output amplitudes may increase distortion.

(iii)

Current results are based on PSPICE simulations; a physical IC prototype is needed to confirm performance under real fabrication and operating conditions.

8. Conclusions

This work has introduced a novel analog circuit configuration capable of simultaneously implementing a mixed-mode multifunction biquadratic filter and a dual-mode quadrature oscillator using a single differential differencing gain amplifier (DDGA) and all-grounded passive elements. The design achieves four operation modes—voltage, current, trans-impedance, and trans-admittance—without reconfiguration and offers orthogonal electronic control of key parameters. These features, combined with a low component count and integration-friendly structure, enable compact, cost-effective, and versatile solutions for modern analog signal-processing systems.

The novelty of this work lies in unifying multifunction mixed-mode filtering and dual-mode quadrature oscillation into a single, reconfigurable topology with full mode support, all-grounded passive elements, and orthogonal electronic tunability. These combined features have not been reported together in previous literature. The achieved performance, validated through PSPICE simulation in 0.18-μm CMOS technology, demonstrates low total harmonic distortion, minimal sensitivity to parameter variations, and stable operation over a wide temperature range.

Future work will focus on fabricating a CMOS prototype to experimentally validate performance, exploring ultra-low-voltage and low-power variants for portable and IoT applications, extending the architecture to higher-order and reconfigurable filter structures, and integrating the design into a mixed-signal system-on-chip. Potential application-specific developments include adaptive communication front-ends, biomedical instruments, and sensor interface circuits requiring compact, tunable, and multifunctional analog blocks.