Single-Stage LLC Resonant Converter for Induction Heating System with Improved Power Quality

Abstract

This paper proposes a single-stage direct AC to high-frequency (HF) AC resonant converter based on LLC configuration for induction heating (IH) systems or HF applications. Unlike conventional converters for IH systems, the proposed topology converts the utility frequency to HF AC in a single stage without using a DC link inductor and capacitors and takes the advantages of LLC configuration. Additionally, it improves the power factor to 0.9–1, lowers the THD (3.2% experimentally), and protects against the high-frequency components. An embedded control scheme was designed to keep the HF current oscillating at a resonant frequency, ensuring zero-voltage switching. The operating principle of the proposed topology was investigated using mathematical equations and equivalent circuits. Finally, it was verified using computer simulation, and an experimental prototype of 1.1 kW was developed to demonstrate the proposed topology’s uniqueness.

1. Introduction

Induction heating (IH) is an efficient technique to generate very high temperatures for a wide range of applications, such as industrial heating (brazing and melting of steel) and domestic cooking applications [1,2]. Every application has a unique operating frequency that is determined by the shape of the workpiece and the required skin depth [3,4]. Typically, a high-frequency (HF) current supply is needed for the IH technique in order to produce the HF eddy current in the workpiece that causes the heating effect [5,6]. The skin depth ($\delta$) can be stated as:

$$\delta =\sqrt{\frac{\rho }{\pi f_s\mu }}$$

(1)

where ρ is the electrical resistivity, f_s is the switching frequency of the resonant inverter, and μ is the magnetic permeability of the workpiece.

Generally, a series resonant inverter is employed to produce HF alternating current (AC) in IH technology [7,8]. A wide variety of inverter topologies have been developed for the same purpose. Voltage and current resonant inverters are among the most commonly used types [9,10]. Out of these, the voltage-fed resonant inverter is widely used because it has numerous control possibilities [11,12]. Typically, quasi, class D/E, and half-bridge resonant inverters are mostly employed for low-power applications [13,14]. In contrast, full-bridge series resonant topology (FB-SRI) is used for high-power applications [15,16]. Along with these converters, some popular output power control techniques have been developed, including (a) phase shifting (PS), (b) pulse frequency modulation (PFM), (c) asymmetrical voltage cancellation (AVC), (d) pulse density modulation (PDM), and (d) asymmetrical duty cycling (ADC) [17,18,19,20]. Each of the proposed converter topologies and power control techniques has its own merits and demerits, depending on the applications.

The merits and demerits of some conventional resonant converters, along with their control techniques, are given in

Table 1. Merits and demerits of conventional resonant converters with their control algorithms [1,3].

Converter Topology	Control Algorithm	Merits	Demerits
Two-output series resonant inverter with common capacitor	Pulse width modulation control	✓ Reduced the component counts, size, and cost ✓ Common capacitor is used to create resonating capacitor	✓ Can’t achieve independent power control ✓ High switching losses
Full bridge converter	Pulse density modulation, frequency modulation, phase shift modulation	✓ Higher input power factor (≈0.95) can be achieved	✓ More power losses across the switches
Single-stage boost full bridge resonant inverter	Phase shift PWM technique	✓ High efficiency has been achieved ✓ Less switching loss	✓ Higher harmonic injection
Multi-modulated converters using full bridge topology	Deadband current control technique	✓ Phase-locked loop is used to vary the switching frequency	✓ More switches are used ✓ More switching losses ✓ Complex control technique is used
Multi-frequency resonant converter	Deadband current control technique	✓ Can achieve high eddy current ✓ Centre-tapped transformer is used	✓ Calculation of resonant frequency is difficult ✓ High switching loss at the load side

.

In the last few years, several configurations of IH converters have been developed, comprising rectification and inversion modes. The input power factor (PF) degradation and the generation of an HF component due to the high switching frequency operation in the inversion mode are the two main problems with the IH system. Recently, boost power factor circuits (BPFCs) have been used as front-end converters to mitigate these problems [21,22], although their extra switches and energy storage elements makes them costly and bulky. Additionally, multiple power conversion stages might lead to various severe issues including poor system reliability, efficiency deterioration, and increases in power loss and electro-magnetic interference (EMI) [23,24]. A direct AC–HF AC converter could be a great way to solve these issues because it not only uses fewer components but also enhances PF and blocks the HF component by adding a passive filter to the input side.

Additionally, it has been observed that the series resonant configuration of the IH load is used in the majority of IH applications. However, previous research works have shown that LLC configuration provides better performance as compared to series resonant configuration (RLC) in terms of short circuit immunity and low current stress in the switches (that are used in the inverter) [25,26,27]. Additionally, with only a small series inductance, the LLC resonant configuration enables exceptional performance with a high quality factor (Q) [28,29,30]. Owing to this, the requirement of an output transformer can be eliminated.

A direct AC to HF AC LLC resonant converter has been proposed in light of the aforementioned power factor issues, high-frequency component generation, multiple power conversion stages, and the desire to benefit from an LLC load resonant configuration. In addition to enhancing the PF at the input side, this converter will enable us to convert grid frequency AC mains to HF AC in a single conversion stage. Additionally, a passive filter comprising an input inductor and a capacitor has been used to prevent the flow of HF components from the load side to the source side.

This paper is classified as follows. In Section II, the proposed converter’s circuit design and operation are described. Circuit analysis, which includes calculation of frequency, output power, voltage, and current gain, is described in Section III. Section IV contains discussion of simulation and experimental findings. In Section V, the conclusion is offered.

2. Proposed Direct AC–HFAC LLC Resonant Converter

2.1. Circuit Description

The proposed topology for the IH system is shown in Figure 1. It consists of four bi-directional switches, and each bi-directional switch comprises two insulated gate bipolar transistors (IGBTs) and two diodes. A bi-directional switch simultaneously conducts the current and blocks the voltage of both polarities based on the control signal.

A series inductor (L_S) is connected to a parallel combination of a resonating capacitor (C_P) and an IH load in order to create the LLC configuration. A typical induction heating load consists of a workpiece (that is to be heated) and a heating coil or a litz wire-based coil in the case of a domestic IH system. Typically, the IH coil and workpiece (IH load) are considered the transformer’s primary and secondary. Thus, the IH load is referred to as the transformer’s primary, and the obtained equivalent impedance after transferring is represented as a series R–L circuit.

Consequently, to know the electrical behaviour of the proposed topology, the IH coil and its workpiece are modelled as series R_L and L_P, where R_L and L_P are the referred equivalent resistance and inductance of the heating coil, respectively.

Thereafter, an LC circuit or passive filter is designed which ensures the elimination of the HF component at the input side, as shown in Figure 2. HF components cannot flow back to the input side because the designed passive filter has a high input equivalent impedance (Z_eq(in)) at a frequency above 4 kHz. Consequently, power quality at the grid side improves. In Figure 1 and Figure 2, V_s, I_in, V_out, V_o, and I_o represent the input voltage, input current, output voltage of the converter, output voltage across the IH load, and output current flowing through the load, respectively.

2.2. Modes of Operation

In accordance with the polarity of the input voltage, the proposed direct AC–HF AC LLC resonant converter has four distinct operating modes. For the positive input half cycle, modes 1 and 2 are defined, and for the negative input half cycle, modes 2 and 3 are defined. The four modes of operation are explained with the assumption of a resistive load because the proposed converter has been made to operate as a resonant converter. Also, the dead time between the pulses and the effect of the input filter is neglected. However, in the prototype implementation, a very small dead time has been considered between the gate signals. Figure 3 shows the circuit topology for each mode of operation and corresponding waveforms.

• Positive input half cycle, V_s > 0

Mode 1 (t₀–t₁): In the positive input half cycle, the upper IGBTs (S_AU, S_BU, S_CU, and S_DU) and lower diodes (D_AL, D_BL, D_CL, and D_DL) of bi-directional switches are forward-biased (FB), respectively. Among these FB IGBTs, S_AU and S_BU receive the gate signal at t₀ to t₁, as shown in Figure 4. Therefore, the direction of the current at t₀ to t₁ will be: S_AU → D_AL → load → S_BU → D_BL.

Mode 2 (t₁–t₂): This mode is also for the positive input half cycle. In this mode, S_AU and S_BU are turned off, as these IGBTs do not receive the gate signal between t₁ and t₂, as shown in Figure 4. S_CU and S_DU do receive the gate signal between t₁ to t₂. Therefore, the direction of the load current reverses in the positive input half cycle: S_CU → D_CL → load → S_DU → D_DL.

• Negative input half cycle, V_s < 0

Mode 3 (t₂–t₃): In the negative input half cycle, the lower IGBTs (S_AL, S_BL, S_CL, and S_DL) and upper diodes (D_AU, D_BU, D_CU, and D_DU) of bi-directional switches are FB, respectively. Among these FB IGBTs, S_DL and S_CL receive the gate signal at t₂ to t₃, as shown in Figure 4. Therefore, the direction of the current at t₂ to t₃ is: S_DL → D_DU → load → S_CL → D_CU.

Mode 4 (t₃–t₄): This mode is also for the negative input half cycle. In this mode, S_DL and S_CL turn off, as these IGBTs do not receive the gate signal between t₃ and t₄, as shown in Figure 4. S_BL and S_AL do receive the gate signal between t₃ and t₄. Therefore, the direction of the load current reverses in the negative input half cycle: S_BL → D_BU → load → S_AL → D_AU.

The above modes of operation are explained for 100 Hz-output voltage synthetization, and it can be concluded that the direction of the load current in each input half cycle could be changed by allowing the time period of the conducting IGBTs to be changed in a single stage, as shown in Figure 4a. Consequently, this frequency changer operation of this topology could be deployed in IH technology that requires an HF AC as shown in Figure 4b. The detailed possible switching strategies are given in

Table 2. Switching Strategies.

Input Voltage (Vs)	Forward-Biased Switches	Modes	IGBTs/Diodes Status	Time Interval	Output Voltage (Vout)
Vs > 0	(SAU, SBU, SCU, SDU) and (DAL, DBL, DCL, DDL)	Mode 1	(SAU/DAL/SBU/DBL) ON (SCU/DCL/SDU/DDL) OFF	t0–t1	Vout > 0
		Mode 2	(SAU/DAL/SBU/DBL) OFF (SCU/DCL/SDU/DDL) ON	t1–t2	Vout < 0
Vs < 0	(SAL, SBL, SCL, SDL) and (DAU, DBU, DCU, DDU)	Mode 3	(SDL/DDU/SCL/DCU) ON (SBL/DBU/SAL/DAU) OFF	t2–t3	Vout > 0
		Mode 4	(SDL/DDU/SCL/DCU) OFF (SBL/DBU/SAL/DAU) ON	t3–t4	Vout < 0

.

3. Mathematical Analysis of Proposed Topology

The mathematical analysis of the proposed direct AC–HF AC LLC resonant converter is based on the following assumptions:

(a)

All components in the circuit are ideal.

(b)

The AC input voltage (V_s) is purely sinusoidal.

(c)

The effects of parasitic capacitance are neglected.

(d)

The load current is purely HF sinusoidal.

3.1. Calculation of Switching Frequency

The equivalent circuit of the proposed topology based on the LLC tank is shown in Figure 5. In the figure, V_out is the HF output voltage, L_s is the series inductance, and C_P is the resonating capacitor connected parallel to the IH load comprised of L_P and R_L. The proposed direct AC–HF AC LLC resonant converter is made to work at resonant frequency. Thus, in order to obtain resonant frequency, first the equivalent impedance of the LLC resonant tank is determined.

The equivalent impedance of the LLC resonant tank can be determined as:

$$Z\left(j\omega \right)=j\omega L_S+\frac{\left(\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$j\omega C_P$}\right.\right)\times \left(R_L+j\omega L_P\right)}{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$j\omega C_P$}\right.+\left(R_L+j\omega L_P\right)}$$

(2)

On solving Equation (2):

$$Z_{eq}\left(j\omega \right)=j\omega L_S+\frac{\left(R_L+j\omega L_P\right)}{1+j\omega C_P\left(R_L+j\omega L_P\right)}$$

(3)

On complete rationalization of Equation (3):

$$Z_{eq}=\frac{R_L\left(1-{\omega }^2{L}_P{C}_P\right)+{\omega }^2{R}_L{C}_P{L}_P}{K}+\frac{j\omega \left[L_S+L_P\left(1-{\omega }^2{L}_P{C}_P\right)-R_L^2{C}_P\right]}{K}$$

(4)

where $K={\left(1-{\omega }^2{L}_P{C}_P\right)}^2+{\left(R_L\omega C_P\right)}^2$.

To have the active power, the imaginary part of Equation (4) should be equal to zero. Also, R_L << L_P ~0.

Therefore,

$$L_S+\frac{L_P\left(1-{\omega }^2{L}_P{C}_P\right)}{{\left(1-{\omega }^2{L}_P{C}_P\right)}^2}=0$$

(5)

$$\begin{array}{l}{L}_S+\frac{L_P}{\left(1-{\omega }^2{L}_P{C}_P\right)}=0\\ \omega =\sqrt{\frac{L_P+L_S}{L_S{L}_P{C}_P}}\end{array}$$

(6)

where ω is the angular resonant frequency.

$$f=\frac{1}{2\pi }\sqrt{\frac{L_P+L_S}{L_S{L}_P{C}_P}}$$

(7)

In Equation (7), f is the resonant frequency of the LLC tank, and at this frequency, the maximum power is transferred to the IH load. However, to enable the zero-voltage switching (ZVS), the switching frequency (f_s) is selected higher than the calculated resonant frequency (f), ensuring less switching and fewer power losses.

3.2. Quality Factor

At a higher quality factor, (Q), the resonant inverter normally operates close to the resonant frequency (ω_o). In contrast to the induction coil current (I_o), as shown in Figure 6, the Q factor has a negligible effect on the resonant frequency, i.e., the peak value of I_o occurs at the same frequency, regardless of the Q factor. The peak value of I_o is related to the RLC parallel end, as shown in Figure 5, where L_S does not play a role in the frequency response of I_o. The quality factor (Q) for the second order system can be defined as:

$$Q=\frac{{\omega }_o}{2\alpha }$$

(8)

where ω_o and α are the resonant frequency and damping coefficient of the second order system, respectively.

Let $\lambda =-\alpha \pm j\sqrt{{\omega }_o^2-{\alpha }^2}$ be the solution of the characteristic polynomial of the system. Now, based on Figure 5, the parallel circuit impedance is:

$$Z_P(S)=\frac{L_{P}S+R_L}{C_P{L}_P{S}^2+R_L{C}_{P}S+1}$$

(9)

The characteristic polynomial of the above equation is given as:

$$C_P{L}_P{\lambda }^2+R_L{C}_P\lambda +1=0$$

(10)

Taking $\lambda$ into account, the damping coefficient is:

$${\alpha }_P=\frac{R_L}{2L_P}$$

(11)

The resonant frequency is:

$${\omega }_{oP}=\frac{1}{\sqrt{L_P{C}_P}}$$

(12)

Therefore, using Equation (8), the quality factor of the parallel circuit is:

$$Q_P=\frac{1}{R_L}\sqrt{\frac{L_P}{C_P}}$$

(13)

In this work, the values of L_P and R_L for the IH coil were measured through an LCR meter and the switching frequency was kept constant and was usually higher than the resonant frequency (f) to create zero-voltage switching. Thereafter, the values of L_S and C_P were calculated using Equations (7) and (13).

3.3. Current Gain

As shown in Figure 5, I_s is the current that flows through the IGBTs/switches, and it must be the lowest magnitude possible to obtain low current stress in the switches. Alongside it, I_o is the IH load current and must be very intense. Thanks to the LLC circuit, it is possible to have low current stress in the switches and to provide great power dissipation in the IH load. This merit of the LLC tank makes it preferable to the SRI (where all the current flows to the IH load through the switches) for IH applications. Therefore, the maximum ratio of I_o and I_s defined as current gain is very much needed and occurs at resonant frequency (f), as calculated in Equation (7).

Current gain is calculated as:

$$G_I\left(\omega \right)=\frac{I_o\left(\omega \right)}{I_s\left(\omega \right)}$$

(14)

$$G_I\left(\omega \right)=\frac{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$j\omega C_P$}\right.}{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$j\omega C_P$}\right.+j\omega L_P+R_L}=\frac{1}{1-L_P{C}_P{\omega }^2+j\omega R_L{C}_P}$$

(15)

Thus, modules of G_I become:

$${\left|G_I\left(\omega \right)\right|}^2=\frac{1}{{\left(1-L_P{C}_P{\omega }^2\right)}^2+{\left(R_L{C}_P\omega \right)}^2}$$

(16)

The current gain at resonant frequency, (${\omega }_o=\sqrt{{(L}_P+L_S)/(L_P{L}_S{C}_P}$)), is given as:

$$\left|G_I\left({\omega }_o\right)\right|=\frac{L_S}{L_P}\times \frac{1}{\sqrt{\frac{C_P{L}_S{R}^2\left(L_S+L_P\right)}{L_P^3}+1}}$$

(17)

A high current gain allows us to obtain a high heating effect with small I_s.

3.4. Voltage Gain

Voltage gain can be defined as the ratio of voltage of the parallel resonant capacitor (C_P) to the first harmonic amplitude of the output voltage of the converter, V₁. This ratio allows us to evaluate the voltage stress in the parallel resonating capacitor (C_P). The voltage gain (G_v) is given as:

$$G_v\left(\omega \right)=\frac{V_{C_P}\left(\omega \right)}{V_1}$$

(18)

Using the voltage division rule in Figure 5:

$$\frac{V_{C_P}\left(\omega \right)}{V_1}=\frac{1/j\omega C_P//\left(R_L+j\omega L_P\right)}{j\omega L_S+\left(1/j\omega C_P//\left(R_L+j\omega L_P\right)\right)}$$

(19)

At resonant frequency (ω_o), capacitor voltage (V_CP) is given as:

$$\frac{V_{C_P}\left({\omega }_o\right)}{V_1}=\left(-\frac{L_P}{L_S}-j\frac{L_P^2}{R_L{L}_S}\sqrt{\frac{L_P+L_S}{L_P{L}_S{C}_P}}\right)$$

(20)

The magnitude of voltage gain (G_V(ω)) can be calculated as:

$$\left|G_V\left({\omega }_o\right)\right|=\left|\frac{V_{C_P}\left({\omega }_o\right)}{V_1}\right|=\sqrt{{\left(\frac{L_P}{L_S}\right)}^2+\frac{L_P^2}{R_L^2{L}_S^2}\left(\frac{L_P+L_S}{L_P{L}_S{C}_P}\right)}$$

(21)

On solving Equation (21), we obtain:

$$\left|G_V\left({\omega }_o\right)\right|=\frac{L_P}{L_S}\sqrt{1+Q^2\left(\frac{L_P}{L_S}+1\right)}, \mathrm{where} Q=\frac{1}{R_L}\sqrt{\frac{L_P}{C_P}}$$

(22)

3.5. Calculation of Output Power

Theoretically, the resonant frequency (f) to impart the maximum power to the load is given in Equation (7). Thus, at this frequency, the approximated Z_eq is equal to $R_L{\left(\raisebox{1ex}{$L_S$}\!\left/ \!\raisebox{-1ex}{$L_P$}\right.\right)}^2$. Therefore, the maximum average output power (P_o,ave(m)) transferred to R_L at the resonant frequency (f) can be determined as:

$$P_{o,ave(m)}=\frac{{\left(V_{O1}\right)}_{rms}^2}{R_L{\left(\raisebox{1ex}{$L_S$}\!\left/ \!\raisebox{-1ex}{$L_P$}\right.\right)}^2}$$

(23)

However, the proposed topology is designed in order to operate at switching frequency (f_s), which is kept higher than the resonant frequency (f) to enable ZVS operation.

V_o can be evaluated by using the Fourier series, which is as follows:

$$V_o(t)=\left\{\begin{array}{c}\sum _{n=1}^{\infty }\frac{4V_m\left(t\right)}{n\pi }\left(cos\left(\frac{n\pi (1-D)}{2}\right)-cos\left(\frac{n\pi }{2}\right)\right)\mathit{sin} \left(n{\omega }_{o}t\right), \mathrm{for} \mathrm{odd} \mathrm{n}\\ \hfill 0, \mathrm{for} \mathrm{even} \mathrm{n}\end{array}\right.$$

(24)

The fundamental output voltage (V_o1) can be determined as:

$$V_{o1}\cong 4\frac{V_m\left(t\right)}{\pi }\left(\cos \left(\frac{\pi \left(1-D\right)}{2}\right)\right)\sin \left({\omega }_{o}t\right)$$

(25)

Therefore, the rms value of V_o1 can be written as:

$$V_{o1}\cong 4\frac{\raisebox{1ex}{$V_m$}\!\left/ \!\raisebox{-1ex}{$\sqrt{2}$}\right.}{\pi }\left(\cos \left(\frac{\pi \left(1-D\right)}{2}\right)\right)=\frac{2\sqrt{2}}{\pi }{V}_m\left(\cos \left(\frac{\pi \left(1-D\right)}{2}\right)\right)$$

(26)

On assuming maximum average output power (P_o,ave(m)) for the above equation, we obtain:

$$P_{o,ave(m)}=\frac{8V_m}{\pi }\left(\cos \frac{\left(\pi \left(1-D\right)\right)}{2}\right)\frac{1}{R_L{\left(\frac{L_S}{L_P}\right)}^2}$$

(27)

As can be seen from Equation (27), it is obvious that maximum average output power (P_o,ave(m)) can be controlled by the duty cycle (D) or switching frequency (f_s).

4. Results

Based on the above theoretical analysis, a computer simulation using MATLAB 2015a was performed, and then an experimental prototype with 1100 W was built and tested, validating the feasibility of the proposed topology. The circuit parameters and obtained operational parameters for the developed simulation model and experimental prototype are given in

Table 3. Circuit and operational parameters.

Circuit Parameters		Operational Parameters
Parameters	Value	Parameters	Value
Input voltage (Vs)	110 Vr.m.s	Output voltage (Vout)	88 Vp
Series inductance (LS)	56 μH	Output current (Iout)	28 Vp
Induction coil (LP)	52.7 μH	Average output power (Pout)	1100 W
Workpiece resistance (RL)	1 Ω	Switching frequency (fs)	30 kHz
Resonant frequency (f)	24 kHz	Input power factor	0.92

.

Figure 7 depicts a block diagram of a prototype implementation for the suggested topology. In this block diagram, the proposed converter receives 1-∅, 230 V utility frequency AC (UFAC) and creates HF AC directly without intermediate stages. The HF AC then flows to the IH load via the series inductance L_S, reducing switch current stress (I_s). An embedded controller has been designed to generate gate signals for the switches, consisting mostly of a zero-crossing detector (ZCD), an Arduino (Atmega 2560), and a driving circuit.

To ensure zero-crossings of input mains, a step-down transformer is used to lower 1-∅, 230 V to 12 V. Then, 12 V AC is delivered to the ZCD, as illustrated in Figure 7. Following that, a diode is employed to remove the negative half of the rectangular pulse. The resulting pulse is perfectly synchronized with the input mains. Subsequently, a synchronized pulse is sent to the Arduino’s interrupt pins (INT0 and INT1). Furthermore, interrupt pins INT0 and INT1 detect the rising and falling edges of the synchronized pulse and create pulses (V_g1 and V_g2) at the required frequencies according to the programming.

Finally, V_g1 and V_g2 are given to the IGBT switches S_AU, S_BU, S_DL, S_CL and S_CU, S_DU, S_BL, S_AL of the proposed converter via driver circuits, respectively. The prototype implementation of the proposed IH power supply system is depicted in Figure 8. Each bidirectional switch in this setup is made up of two diodes and two IGBTs. The different voltage and current waveforms are recorded using a digital storage oscilloscope (DSO) and a current sensor probe. Figure 9 presents the modelling and experimental findings concerning the input voltage and current, implying that the input current is devoid of the HF component created during high-switching frequency operation. Furthermore, the obtained input PF (experiment) is 0.92. Thus, it enhances the power quality of the input mains while also protecting against HF components, owing to the passive filter shown in Figure 2.

A digital oscilloscope and current sensor captured the voltage and current waveforms. Figure 9 showcases the simulation and experimental results, demonstrating the input current’s absence of high-frequency (HF) components typically generated by high switching frequencies. This translates to a measured power factor (PF) of 0.92, indicating efficient power utilization and reduced harmonic distortion. This improvement in power quality and HF component protection stems from the passive filter depicted in Figure 2.

Further analysis using a fast Fourier transform (FFT) on the input current (Figure 10) reveals a total harmonic distortion (THD) of 2.03% in simulations and 3.2% experimentally. Both values fall within acceptable ranges for IH applications. Additionally, the recorded root mean square (RMS) values for the input voltage and current are 110 V and 15.87 A, respectively.

The switching frequency of the gate signals, generated from the controller, is kept at 30 kHz, which is greater than the calculated resonant frequency using Equation (7), i.e., 24 kHz, to ensure ZVS condition. ZVS condition not only reduces the switching and power losses but increases the overall efficiency of the converter. The simulation and experimental results of synchronizing gate signals with the input mains through ZCD are shown in Figure 11.

In this work, the IH coil and its load is modelled as L_P ($\approx$52.7 μH) and R_L ($\approx$1 Ω) to study the electrical behaviour of the proposed converter. As is well known, when the converter functions as a resonant inverter, the voltage and current are always in the same phase. Consequently, it can be inferred from Figure 12 that the output voltage and current waveforms are in the same phase, both experimentally and through simulation. Figure 12 shows the simulation and experimental results of the output voltage and current across the IH load, having R.M.S values of 62.22 V and 19.79 A, respectively. The experimentally obtained PF between the output voltage and current was found to be 0.97 (almost unity), which shows the resonant property of the proposed converter. Therefore, the experimental average output power (P_o,(ave)) can be calculated as P = VIcosø = 62.22 × 19.79 × 0.97 = 1194 W (approximately). The average output power (P_o,(ave)) is shown in Figure 13a.

Furthermore, an extensive efficiency analysis was carried out. As previously indicated, the inductance and resistance of the coil and its load (pot, vessel, etc.) are represented by L_P and R_L in a series connection, which represents the IH coil and its load. In order to perform an efficiency analysis, load resistance (R_L) is varied between 0.1 and 1 Ω, while L_P is maintained at a constant value. The power and efficiency of the input/output are calculated for each value of load resistance. Figure 13b displays the resulting output power and efficiency graph at a variable load. On average, 93% efficiency is attained.

As can be seen from the obtained simulation and experimental results, a comparison has been made between the proposed topology and the conventional topology for the IH system in terms of PF, THD, input filter design, controller complexity, and design costs and is shown in

Table 4. Comparison table.

Comparison Criteria	Conventional Topologies for IH Systems [1,21,31]	Proposed Topology for IH Systems
Input PF	Low ~(0.7–0.8)	High ~(0.9–1)
THD	High	Low
Input filter design	Complex	Moderate
Switch stress	High	Low
Control complexity	Moderate	Easy
Design cost	High	Moderate

. As can be observed from this table, the proposed topology also improves the power quality in terms of THD and PF. Consequently, the proposed single-stage direct AC to HF AC LLC resonant converter can be effectively deployed in IH systems. This proposed converter’s single drawback is its high switch count, which increases switching losses.

5. Conclusions

In this paper, an 1100 W single-stage direct AC–HF AC LLC resonant converter for IH systems has been proposed; it generates 30 kHz current directly from the utility 50 Hz power supply. An embedded control scheme (using Arduino 2560) is used to generate gate signals. The proposed converter is implemented with four bi-directional switches. The associated circuit operation and mathematical model has been explained to analyze the converter operation. Further, the potency of the proposed topology is validated through MATLAB simulation and experimental results. From the obtained results, the presented work has the following peculiar merits:

• The presented topology converts utility grid-frequency AC to HF AC in a single stage and also maintains the input power factor close to unity simultaneously.
• The implemented control scheme is based on an embedded system having a simple configuration and is easy to implement.
• As LLC configuration is used, it reduces the current stress across the switches and also enables an intense current magnitude across the IH load simultaneously.
• Finally, the proposed topology not only lowers the THD of the input current but also blocks the HF component that receives back flows towards the utility side. Thus, the power quality of the input mains improves.

Therefore, it can be concluded that the presented topology can be effectively applied in the IH application and can also be deployed where HF applications are required.