**1. Introduction**

Current Source Inverters (CSIs) have been used as alternatives to Voltage Source Inverters (VSIs) in applications such as: motor drives [1], STATCOMs [2], High Voltage Direct Current (HVDC) transmission stations [3], and renewable energy conversion systems [4]. Compared to VSIs, CSIs have several advantages and drawbacks. Their advantages include inherent fault tolerance and voltage boosting capabilities. Their main drawbacks are larger ohmic losses in their DC inductors and heavy inductor cores. Nevertheless, ongoing research in the field of High Temperature Superconductors (HTS) has yielded promising results [5–7]. In [6], utilizing HTS coils was shown to reduce a generator's losses and weight by half and one third, respectively. In the future, access to HTS inductors, with virtually zero ohmic and core losses will make CSIs more attractive to a broader range of applications.

In high power, medium voltage applications, several VSIs or CSIs are connected in parallel to divide the high DC current evenly between them. For these applications, CSIs are more attractive because parallel-connected CSIs can operate as a Multilevel Current Source Inverter (MCSI). MCSIs generate higher quality current waveforms that require smaller output capacitors and lower switching frequency.

Over the past few decades, several attempts have been made to conceive an e ffective MCSI topology. Relying on the duality principle [8], most topologies require the DC input to be a constant current source. In most cases, either a DC voltage source connected to a large smoothing inductor [9,10]

or a current-controlled buck converter [11–14] is used as a constant current source. The most common three-phase MCSI is shown in Figure 1. It was first introduced by Xiong et al. [9] and has been the subject of several papers over the past few years [10–14]. In addition to a current-controlled buck converter or a large smoothing inductor at the input, this topology consists of *M* modules, for a 2*M* + 1 level converter. Each module contains six controllable unidirectional switches, an upper inductor, and a lower inductor. The upper and lower inductors are referred to as sharing inductors and they are only rated for 1/*Mth* of the DC current, where the current-controlled buck converter or large smoothing inductor at the input must be rated for the full input current. A unidirectional controllable switch may be realized using a Gate Turn-Off Thyristor (GTO), an Integrated Gate-Controlled Thyristor (IGCT), a Reverse-Blocking Insulated-Gate Bipolar Transistor IGBT (RB-IGBT), or a regular IGBT connected, in series, to a diode, as shown in Figure 1.

**Figure 1.** The multilevel current source inverter (MCSI) topology [9–14].

For proper operation of the MCSI, the values of the sharing inductors in each module must be identical. The main challenge in this topology is ensuring the main DC current is divided between the modules evenly. In [9], since a six-level staircase modulation was used, an optimized fixed switching sequence was proposed. The sequence minimizes the switching losses while ensuring the volt-second area remains close to zero for each inductor under steady-state conditions. Unfortunately, this method becomes very complex and unreliable when Pulse Width Modulation (PWM) techniques are used for a higher number of levels. Moreover, the number of levels achieved was six for a three-module converter; the zero level was not achieved using the staircase modulation.

In [11], a prototype of the same topology was built and tested. The input of the inverter, in this case, was a current-controlled buck converter. The modulation technique used was the Phase-Shifted Carrier Sinusoidal PWM (PSC-SPWM) [13]. The PSC-SPWM allows individual modules to be modulated independently using the so-called "tri-logic" SPWM [15]. To synthesize multilevel waveforms using the PSC-PWM, the phase-shift between any two adjacent module's carrier signals is set to 2π/*M*. Although no current balancing technique was used, the average currents of the sharing inductors remained within a reasonable range of each other. Nonetheless, implementing such an inverter in a non-controlled environment, such as industrial applications, with no means to ensure a current-balanced operation is not safe. Disturbances and small differences in the electrical parameters between the modules can easily lead different inductors to have different average currents [11], and modules sustaining currents higher than their rated current could be damaged. The current imbalance problem is highlighted in [12]. Using the same modulation technique as that used in [11], the authors suggested two Proportional-Integral (PI) controllers-based solutions to ensure a current-balanced operation for the seven-level case. The first solution is to allow each module to use a small variation in the magnitude of carrier waveform as a control variable. The second solution is to allow the use of the phase-shift angle of the carrier waveform as a control variable. In both cases, to understand the input–output relationship, systems identification procedures were carried out. Both solutions were verified via simulation only, and both yielded satisfactory results. Another attempt to realize a current-balanced operation was presented in [14] where an improved version of the first solution proposed in [12] was implemented. The solution targets the seven-level case. It involved two dedicated PI controllers varying the magnitudes of the PSC-SPWM carrier waveforms. The e ffectiveness of the solution was verified via simulation and experimental results. However, there are several disadvantages to the proposed solutions [12,14]. By requiring multiple, dedicated, current-balancing, closed-loop control systems, the converter cost and complexity increases. Besides, the proposed alteration to the carrier waveforms has a negative impact on the Total Harmonic Distortion (THD).

This paper focuses on the voltage fed version of the MCSI. In the voltage fed MCSI, the modules are connected directly to the DC bus. Unlike the MCSI discussed in [9,10], a main smoothing inductor is not required here. This makes the MCSI modular and it reduces the number of required inductors. Also, unlike the MCSI considered in [11–14], the voltage fed MCSI does not need to be connected to the output of a current-controlled buck converter. Adding a buck converter to the input increases the cost, size, and complexity while reducing the boosting ratio of the MCSI. To compute the boosting ratio of the MCSI, the AC side power in Equation (1) is equated to the DC side power in Equation (2), assuming a lossless system. The resulting boosting ratio is given in Equation (3). In Equation (1), *m* is the modulation index of the MCSI, *V*ˆ *LN* is the peak value of the line-to-neutral voltage on the AC side of the MCSI, and cos(ϕ) is the power factor. In Equation (2), *d* is the duty cycle of the current-controlled buck converter. The impact of *d* on the boosting ratio is evident in Equation (3). If the buck converter is eliminated, the boosting ratio can be derived by assuming *d* = 1. Therefore, eliminating the buck converter maximizes the boosting ratio.

$$P\_{AC} = \frac{3}{2} \left( \frac{\sqrt{3}}{2} m I\_{dc} \hat{V}\_{LN} \cos(q) \right) \tag{1}$$

$$P\_{dc} = I\_{dc}dV\_{dc} \tag{2}$$

$$\frac{\hat{V}\_{LN}}{V\_{dc}} = \frac{4d}{3\sqrt{3}m\cos(\varphi)}\tag{3}$$

The main contribution of this paper is the introduction of a new Current Balancing Algorithm (CBA) to address the current imbalance issue in MCSIs. The CBA can be implemented in any MCSI regardless of the number of levels and it does not require any modification to the carrier's waveform, unlike the balancing methods in [12,14]. Moreover, the PWM technique used in this paper is a modified version of the Level-Shifted SPWM (LS-SPWM). It was first introduced to eliminate common-mode voltage in three-level Neutral-Point-Clamped (NPC) VSIs [16]. However, its implementation in MCSI has never been discussed or demonstrated in the literature. Compared to the widely used PSC-SPWM [13], the modified LS-SPWM produces lower THD and *di*/*dt*.

The rest of the paper is divided into four main sections. Section 2 presents the modified LS-SPWM. Section 3 explains how to solve the current-imbalance problem using the CBA. Section 4 presents experimental results verifying the CBA and modified LS-SPWM using a proof-of-concept prototype. The prototype has three modules. Therefore, it can operate as either a five-level MCSI, by only utilizing two modules, or a seven-level MCSI, by utilizing all three modules. Waveforms demonstrating the operation of the five-level and seven-level cases are presented. Finally, concluding remarks are presented in Section 5.

### **2. Modified LS-SPWM Suitable for MCSIs**

An individual CSI must have one upper switch and one lower switch switched ON at any given instance [15]; this ensures that *iLu* and *iLl* will always have a circulation path. Therefore, the CSI has nine possible switching states. These states can be divided into three zero states and six active states, as illustrated in Figure 2. Zero states produce zero in all phases at the AC side while active states produce a positive current in one phase and a negative current in a di fferent phase. It is important to

note that any set of three-phase currents synthesized by the CSI using any switching state shown in Figure 2 will always add up to zero. Hence, any multilevel PWM technique must produce a set of three-phase currents that always adds up to zero. It has been was shown [16] that the Level-Shifted SPWM (LS-SPWM) does not satisfy this requirement. A simple solution is described in [16] for the three-level case. The same solution can be extended to any number of levels as follows:


**Figure 2.** MCSI switching states: (**<sup>a</sup>**–**<sup>c</sup>**) Zero switching states, (**d**–**i**) Active switching states.

The obtained currents in Equations (7)–(9) have 2*M* + 1 levels. Their magnitude is -*M* √3 *m*/2. To extend the upper limit of *m* to 2/ √3, instead of 1, a third harmonic component with a magnitude of (−*<sup>m</sup>*)/6 can be added to Equations (4)–(6) [17].

$$\dot{r}\_1 = \frac{M}{2} \Big[ m \cos \left( \omega t - \frac{\pi}{6} \right) \Big] \tag{4}$$

$$i\_2 = \frac{M}{2} \left[ m \cos \left( \omega t - \frac{2\pi}{3} - \frac{\pi}{6} \right) \right] \tag{5}$$

$$i\_3 = \frac{M}{2} \left[ m \cos \left( \omega t + \frac{2\pi}{3} - \frac{\pi}{6} \right) \right] \tag{6}$$

$$i\_{am} = i\_{1m} - i\_{2m} \tag{7}$$

$$i\_{\rm hm} = i\_{2m} - i\_{3m} \tag{8}$$

$$i\_{\rm cm} = i\_{\rm 3m} - i\_{\rm 1m} \tag{9}$$

The process described above is shown in Figure 3 for a seven-level case, *M* = 3. The modulated signals of Equations (4)–(6) are shown in Figure 3a while Equations (7)–(9) are shown in Figure 3b. For comparison, a set of three-phase currents were produced using the PSC-SPWM [10–14], as shown in Figure 4. The modified LS-SPWM resulted in a lower THD, 24.12% compared to 33.62% for the PSC-SPWM. Also, unlike the PSC-SPWM, the modified LS-SPWM results in modulated waveforms where the transition from one level to the next happens consecutively, i.e., the modulated waveforms increase or decrease by one level at a time. This results in a lower *di*/*dt*, which produces less Electromagnetic Interference (EMI).

**Figure 3.** Modified LS-SPWM: (**a**)Three-phase currents obtained using the conventional LS-SPWM, *m* = 0.95 and *fs* = 1 kHz, (**b**) Modified LS-SPWM, calculated using Equations (7)–(9).

**Figure 4.** PSC-SPWM [13], *m* = 0.95 and *fs* = 1 kHz.

Another requirement that must be fulfilled by the modified LS-SPWM is the even and efficient distribution of the zero states among the phase legs of the modules. A CSI module has three zero switching states, see Figure 2a–c. The modified LS-SPWM should be able to determine which zero state should be selected every time a zero state is required. In a previous study [15], the zero states distribution of the CSI is determined based on the extreme values of the three-phase reference currents. The same mechanism can be used here. Based on which phase has a positive or negative peak, the fundamental cycle can be divided into six intervals, as shown in Figure 5. For example, during interval I, phase A has a positive peak. Therefore, depending on *m*, *Sau* must be switched ON in most modules. During interval IV, on the other hand, phase A has a negative peak. Hence, *Sal* must be switched ON in most modules. During intervals I and IV, shortening leg A is the most efficient way to realize a zero state. Thus, during interval I, *Sau* is switched ON in all modules while *Sal* is switched ON in *M* − *iam* modules. Similarly, during interval IV, *Sal* is switched ON in all modules while *Sau* is switched ON in *M* + *iam* modules. Here, *iam*, *ibm*, and *icm* are the instantaneous values of the modulated three-phase currents, their values are between −*M* and *M*. The same procedure can be repeated for the other four intervals where phases B and C have their positive and negative peaks. Table 1 summarizes the zero states distribution mechanism over one cycle. For each interval, the corresponding number of ON upper and lower switches of each phase of the MCSI is given.

**Figure 5.** Intervals highlighting the extreme values of a set of three-phase currents.

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**Table 1.** Zero state distribution in MCSI.
