A Novel High Step-Up DC-DC Converter with Coupled Inductor and Switched Clamp Capacitor Techniques for Photovoltaic Systems

Abstract

In this study, a novel high step-up DC-DC converter was successfully integrated using coupled inductor and switched capacitor techniques. High step-up DC-DC gain was achieved using a coupled inductor when capacitors charged and discharged energy, respectively. In addition, energy was recovered from the leakage inductance of the coupled inductor by using a passive clamp circuit. Therefore, the voltage stress of the main power switch was almost reduced to 1/7 V_o (output voltage). Moreover, the coupled inductor alleviated the reverse-recovery problem of the diode. The proposed circuit efficiency can be further improved and high voltage gain can be achieved. The operation principle and steady-state analysis of the proposed converter were discussed. Finally, a hardware prototype circuit with input voltage of 24 V, output voltage of up to 400 V, and maximum power of 150 W was constructed in a laboratory; the maximum efficiency was almost 96.2%.

1. Introduction

In recent years, air pollution and energy shortage have become major national concerns. When the global temperature increases by 1 °C, the sea level will increase by 2.3 m [1]. This phenomenon will considerably affect human life and safety. Therefore, previous studies have attempted to find a solution, hoping to solve the problems of air pollution, global warming, and energy shortage by using highly efficient renewable energy systems. The current more mature and widely used renewable energy sources include solar, wind, and tidal energy sources [2,3,4]. Often these renewable energy sources have low-voltage output and must pass through a set of high boost converter circuits to increase the voltage, and then through a DC-AC inverter to convert AC voltage from the main supply in parallel. Therefore, a DC-DC high boost ratio circuit affects the overall efficiency of the system [5,6,7,8].

The conventional DC-DC boost circuit is not applied in high boost ratio applications. In an ideal scenario, when the duty cycle in a conventional boost circuit increases to 1 (unity), the boost conversion ratio reaches infinity. However, high step-up gain is limited by the capacitor, inductor main power switch, and resistance, because electromagnetic interference and reverse-recovery issues are encountered at extreme duty cycles. Moreover, the leakage inductance of the transformer will cause high power dissipation and high voltage spikes on the main power switch. Therefore, a main power switch with high stress voltage must be selected because of excessive cost and space issues. Therefore, many studies have developed a new architecture to overcome the shortcomings of a conventional boost circuit. In particular, switch capacitor [9,10,11,12,13], coupled inductor [14,15,16,17,18,19,20,21], and voltage lift [22,23] techniques have been proposed. A coupled inductor step-up circuit with a simple inductive winding structure was used to achieve low voltage stress of the main switch and a high voltage conversion ratio. Therefore, this architecture is commonly used. However, the main drawback of this architecture is that the coupled inductor has a considerable leakage inductance; this leakage inductance and parasitic capacitance on the switch will resonate and cause voltage spikes. To solve the problems caused by leakage inductance, capacitors, resistors, and diodes comprising a snubber circuit can be used; however, the energy is consumed in the resistance, thus reducing circuit efficiency. Switched capacitor and voltage lift technology can achieve a high boost ratio function but the main switch suffers a high transient current, and the conduction loss is increased. A switched-clamp capacitor can store energy when the switch is turned on. When the power is switched off afterwards, the energy in the capacitor is delivered to the output loading. However, the electric system prevents current flow and no direct conduction path is permitted. The voltage lift technique is similar the Cuk converter or the single-ended primary inductor converter (SEPIC) converter, the energy transfer from one inductor via the intermediate capacitor and then to the other inductor. Therefore, the transferred energy is mainly determined by the capacitance, thus causing the current stress on the capacitor to be serious. The coupled-inductor technique can achieve high step-up gain by adjusting the turn ratio. However, the inductor leakage issue relates to the voltage spike on the power switch. Therefore, this study used a coupled inductor step-up circuit with a clamp circuit, which absorbed energy from the leakage inductor of the coupled inductor and supply the energy back to the output terminal of the capacitor during the next period [24,25]. Using a clamp circuit prevents spikes on the switch, and the main switch voltage stress is clamped at a voltage of 1/7 V_o. Moreover, the booster-circuit integrates a boost-flyback converter with switched capacitor architecture to achieve a high step-up ratio. This circuit has boost and flyback type features. When the switch is turned on, the first boost stage is similar to a boost converter combined with a switched capacitor converter. Conversely, when the switch is turned off, the second boost stage is similar to the flyback and switched capacitor converters [26,27,28,29,30,31,32,33,34]. The new proposed converter architecture can achieve a high step-up ratio by adjusting the duty cycle; a clamp circuit is used for energy recovery by the leakage inductor of the coupled inductor to achieve high efficiency and step-up ratio.

2. Operation Principle of the Proposed Converter

Figure 1 illustrates the proposed converter circuit topology, where the DC input voltage is V_in, main switch is S, and coupled inductors are N_p and N_s.

The clamp circuit has two diodes D₁ and D₂ and a capacitor C₁. The step-up circuit has two diodes D₃ and D₄ and two capacitors C₂ and C₃. The equivalent circuit of the coupled inductor comprises the leakage inductor L_k, magnetizing inductor L_m, and an ideal transformer with turn numbers N_p and N_s of the primary and secondary windings, respectively. To simplify the analysis of the circuit operation principles, the following conditions were assumed:

• Capacitors C₁–C₃ and C_o1–C_o2 are sufficiently large. Therefore, V_c1–V_c3 and V_co1–V_co2 are considered constant during an operation.
• Power devices are ideal components, and the parasitic capacitors of power devices are not neglected.
• The magnetizing inductance is L_m and leakage inductance is L_k; the coupling coefficient of the coupled inductor is k and is equal to L_m/(L_m+L_k).
• The turn ratio n is equal to N_s/N_p.
• The proposed converter operation can be divided into the continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The detail analysis is as follows:

2.1. CCM Operation

Figure 2 shows the main component current and voltage waveforms of the proposed converter during CCM operation.

This CCM operation can be divided into five operating modes as follows:

Mode I [t₀, t₁]: During this time interval, the power switch S is turned on, and D₂, D₄, D_in, and D_o are forward-biased. The equivalent circuit is shown in Figure 3a. The primary-side leakage magnetizing current i_Lk increases linearly, and the DC source V_in supplies energy to the magnetizing inductor L_m. The secondary-side leakage inductor current i_s supplies energy to the capacitor C₃, and V_c3 is approximately equal to nV_L1. The clamp capacitor C₁ supplies energy to the high voltage output capacitor C_o2. When i_s equals zero at t = t₁, this operation mode is terminated.

Mode II [t₁, t₂]: The switch S is still turned on, and D₃ is forward-biased. The equivalent circuit is shown in Figure 3b. The DC source V_in supplies energy to the magnetizing inductor L_m. The secondary-side capacitor C₂ is charged by the coupled inductor and capacitor C₃. V_c3 is approximately equal to V_c2 − nV_L1. The output capacitors C_o1 and C_o2 provide energy to the output load. This operating mode is terminated when the switch S is turned off at t = t₂.

Mode III [t₂, t₃]: At t = t₂, the switch S is turned off, and D₃ is forward-biased. The equivalent circuit is shown in Figure 4a. The parasitic capacitor C_ds of the main power switch S is charged rapidly by the leakage inductor L_k and magnetizing inductor L_m. The secondary-side capacitor C₂ is charged by the coupled inductor and capacitor C₃. The output capacitors C_o1 and C_o2 provide energy to the load.

Mode IV [t₃, t₄]: At t = t₃, the switch S is turned off, and D₁ and D₃ are forward-biased. The equivalent circuit is shown in Figure 4b. The passive clamp capacitor C₁ is charged by the leakage inductor L_k and magnetizing inductor L_m; the leakage inductor L_k is recovered and i_Lk decreases rapidly. The capacitor C₂ is charged continuously by the coupled inductor and capacitor C₃. This mode is terminated at t = t₄ until the secondary-side current i_s equals zero. Therefore, D₃ is turned off and D₄, D_in, and D_o are turned on.

Mode V [t₄, t₅]: At t = t₄, the switch S is turned off, and D₁, D₄, D_in, and D_o are forward-biased. The equivalent circuit is shown in Figure 4c. The coupled inductor, DC source V_in, and capacitor C₂ are connected to supply energy to the high-output voltage side capacitor C_o1 and load. This mode is terminated at t = t₅, and the power switch S is turned on again during the next mode.

2.2. DCM Operation

Figure 5 shows the major component current and voltage waveforms of the proposed converter during the DCM operation. To simplify the analysis, the leakage inductor L_k of the coupled inductor is neglected during the DCM operation.

Figure 6 shows the modes I–III operating stages. The operating modes are explained as follows:

Mode I [t₀, t₁]: During this time interval, the power switch S is turned on, and D₂ and D₃ are forward-biased. The equivalent circuit is shown in Figure 6a. The primary current i_Lm increases linearly, and the DC source V_in supplies energy to the magnetizing inductor L_m. The secondary-side coupled inductor in series with the capacitor C₃ supplies energy to the capacitor C₂. The output capacitors C_o1 and C_o2 provide energy to the output load. The main switch S is turned off at t = t₁, and this operation mode is terminated.

Mode II [t₁, t₂]: During this time interval, the main switch S is turned off, and D₁, D₄, D_in, and D_o are forward-biased. The equivalent circuit is shown in Figure 6b. The magnetizing inductor L_m, DC source V_in, and capacitor C₂ are charged by D_in and D_o and supply energy to the output capacitor C_o1. The magnetizing energy of L_m is transferred to capacitor C₃ by coupled inductor. This operating mode is terminated when the energy stored in L_m is depleted at t = t₂.

Mode III [t₂, t₃]: During this time interval, the main switch S is turned off. The equivalent circuit is shown in Figure 6c. The output capacitors C_o1 and C_o2 provide energy to the output load. This mode is terminated at t = t₃, and the main switch S is turned on again during the next mode.

3. Steady-State Analysis of the Proposed Converter

3.1. CCM Operation

The turn ratio is defined as:

$$n=\frac{N_s}{N_p}$$

(1)

The coupling coefficient k of the coupled inductor is defined as:

$$k=\frac{L_m}{L_m+L_k}$$

(2)

Modes I, III, and IV, which have considerably short time durations, are ignored to simplify the steady state analysis; only modes II and V of the CCM operation are considered.

The voltage stresses of V_Lk, V_L1, and V_L2 at mode II can be derived on the basis of Figure 3b.

$$V_{Lk}^{II}=\frac{L_{k1}}{L_m+L_{k1}}{V}_{in}=\left(1-k\right)V_{in}$$

(3)

$$V_{L1}^{II}=\frac{L_m}{L_m+L_{k1}}{V}_{in}=k{V}_{in}$$

(4)

$$V_{L2}^{II}=n{V}_{L1}^{II}=nk{V}_{in}$$

(5)

According to the volt–second balance principle and L_k, N_p, and N_s, the following equations are obtained:

$${\int }_0^{D{T}_s}{V}_{Lk}^{II}\mathrm{d}t+{\int }_{D{T}_s}^{T_s}{V}_{Lk}^V\mathrm{d}t=0$$

(6)

$${\int }_0^{D{T}_s}{V}_{L1}^{II}\mathrm{d}t+{\int }_{D{T}_s}^{T_s}{V}_{L1}^V\mathrm{d}t=0$$

(7)

$${\int }_0^{D{T}_s}{V}_{L2}^{II}\mathrm{d}t+{\int }_{D{T}_s}^{T_s}{V}_{L2}^V\mathrm{d}t=0$$

(8)

By substituting (3)–(5) into (6)–(8), the voltage stresses of V_Lk, V_L1, V_L2, and V_o at mode V can be expressed as:

$$V_{Lk}^V=\frac{-D\left(1-k\right)}{\left(1-D\right)}{V}_{in}$$

(9)

$$V_{L1}^V=-\frac{Dk}{1-D}{V}_{in}$$

(10)

$$V_{L2}^V=-\frac{nDk}{1-D}{V}_{in}$$

(11)

$$V_o=2V_{c1}+V_{c2}-V_{L2}^V$$

(12)

The capacitor C₂ is charged in mode II, and the capacitors C₁ and C₃ are charged in mode V. The voltage stress across capacitors C₁, C₂, and C₃ can be represented on the basis of Figure 3b and Figure 4c.

$$V_{c3}=-V_{L2}^V=\frac{nDk}{1-D}{V}_{in}$$

(13)

$$V_{c2}=V_{L2}^{II}+V_{c3}$$

(14)

By substituting (5) and (13) into (14), the voltage stresses of the capacitors C₁ and C₂ are expressed as:

$$V_{c2}=\frac{nk}{1-D}{V}_{in}$$

(15)

$$\begin{gathered} V_{c1}=V_{in}-V_{Lk}^V-V_{L1}^V \\ =(1+\frac{Dk}{\left(1-D\right)}+\frac{D\left(1-k\right)}{\left(1-D\right)})V_{in} \end{gathered}$$

(16)

By substituting (11), (15), and (16) into (12), the voltage gain is developed as:

$$M_{CCM}=\frac{V_o}{V_{in}}=\frac{2+nk+nDk}{1-D}$$

(17)

Assume k is equal to 1 and neglect the leakage inductor of the coupled inductor. At k = 1, the ideal voltage gain can be derived as:

$$M_{\mathrm{CCM}}=\frac{2+n+nD}{1-D}$$

(18)

Table 1. Comparison of the proposed converter compared with some of the previous converters. NA: Not showing efficiency in reference paper.

Converters	No. of Components	Efficiency	Vin/Vout	Voltage Gain (${\mathit{M}}_{\mathbf{CCM}}=$ Vo/Vin)
proposed converter	6 diodes,	96.20%	Vin = 24 V,	$M_{\mathrm{CCM}}=\frac{2+n+nD}{1-D}$
	5 capacitors		Vo = 400 V
[6]	3 diodes,	NA	Vin = 48 V,	$M_{\mathrm{CCM}}=\frac{1+n}{1-D}$
	3 capacitors		Vo = 380 V
[8]	4 diodes,	95.88%	Vin = 24 V,	$M_{\mathrm{CCM}}=\frac{1+n+nD}{1-D}$
	4 capacitors		Vo = 400 V
[9]	4 diodes,	96.70%	Vin = 24 V,	$M_{\mathrm{CCM}}=\frac{2+n}{1-D}+n$
	4 capacitors		Vo = 400 V
[19]	5 diodes,	95.70%	Vin = 24 V,	$M_{\mathrm{CCM}}=n\frac{1+D}{1-D}$
	4 capacitors		Vo = 200 V
[22]	5 diodes,	96.20%	Vin = 24 V,	$M_{\mathrm{CCM}}=\frac{n\left(2-D\right)}{1-D}$
	3 capacitors		Vo = 200 V
[29]	5 diodes,	96.50%	Vin = 27–37.5 V,	$M_{\mathrm{CCM}}=\frac{2+n}{2\left(1-D\right)}$
	3 capacitors		Vo = 200 V
[31]	3 diodes,	95.20%	Vin = 27–36.5 V,	$M_{\mathrm{CCM}}=\left(1+n\right)+\frac{1}{1-D}+\frac{D}{1-D}n$
	3 capacitors		Vo = 200 V

and Figure 7 are shows the voltage gain of the proposed converter and those of previous converters during the CCM operation under coupling coefficient equal to 1. According to this Figure 7, the voltage gain of the proposed converter is higher than those of the previous converters with the same duty cycle. Proposed converter has achieved high step–up ratio and the efficiency of proposed converter is higher than those of the previous converter, except that the converters [9,29]. The converter [9] has high efficiency but voltage stress of the switch is high, the peak voltage of V_ds is appropriately 71V during the switch-off period and large coupled inductor size is ETD-59. The low efficiency in converter [29] under 150w and maximum output voltage is 200 V lesser than proposed converter.

3.2. DCM Operation

The DCM operation can be divided into three modes. Figure 5 shows the main component current and voltage waveforms. Figure 6 shows the proposed converter during different modes of the DCM operation. The mode I operation is shown in Figure 6a; the main power switch S is turned on. Therefore, the voltage stresses V_L1 and V_L2 can be expressed as:

$$V_{L1}^I=V_{in}$$

(19)

$$V_{L2}^I=n{V}_{in}$$

(20)

The magnetizing inductor peak current can be expressed as:

$$I_{Lmp}=\frac{V_{in}}{Lm}D{T}_s$$

(21)

Therefore, the voltage stresses of the capacitors C₂, C_o1, and C_o2 can be expressed as:

$$V_{c2}=V_{L2}^I+V_{c3}$$

(22)

$$V_{co2}=V_{c1}$$

(23)

$$V_{co1}=V_o-V_{c1}$$

(24)

Figure 6b illustrates the mode II operation; the main power switch S is turned off. Therefore, the voltage stresses during mode II can be expressed as:

$$V_{L1}^{II}=V_{in-}{V}_{c1}$$

(25)

$$V_{L2}^{II}=2V_{c1}+V_{c2}-V_o$$

(26)

$$V_{L2}^{II}=-V_{c3}$$

(27)

Figure 6c illustrates the mode III operation; the main power switch S is turned off. The capacitors C_o1 and C_o2 supply energy to the load, and the voltage stresses of V_L1 and V_L2 are expressed as:

$$V_{L1}^{III}=V_{L2}^{III}=0$$

(28)

By applying the volt–second balance principle to the coupled inductor, the following equations can be obtained:

$${\int }_0^{D{T}_s}{V}_{L1}^I\mathrm{d}t+{\int }_{D{T}_s}^{(D+D_L)T_s}{V}_{L1}^{II}\mathrm{d}t+{\int }_{(D+D_L)T_s}^{T_s}{V}_{L1}^{III}\mathrm{d}t=0$$

(29)

$${\int }_0^{D{T}_s}{V}_{L2}^I\mathrm{d}t+{\int }_{D{T}_s}^{(D+D_L)T_s}{V}_{L2}^{II}\mathrm{d}t+{\int }_{(D+D_L)T_s}^{T_s}{V}_{L2}^{III}\mathrm{d}t=0$$

(30)

By substituting (20), (27), and (28) into (30), the voltage across capacitor C₃ can be expressed as:

$$V_{c3}=\frac{nD}{D_L}{V}_{in}$$

(31)

Similarly, by substituting (19), (25), and (28) into (29) and (22), (27), and (28) into (30), the stress voltages of capacitors C₁ and C₂ can be expressed as:

$$V_{c1}=\frac{D+D_L}{D_L}{V}_{in}$$

(32)

$$V_{c2}=(n+\frac{nD}{D_L})V_{in}$$

(33)

By substituting (20), (26), (28), (32), and (33) into (30), the voltage gain of the proposed converter during the DCM can be expressed as:

$$V_o=[\frac{2D}{D_L}\left(1+n\right)+\left(n+2\right)]V_{in}$$

(34)

$$D_L=\frac{2D\left(1+n\right)V_{in}}{V_o-\left(2+n\right)V_{in}}$$

(35)

On the basis of Figure 5, the average current value i_co1, can be expressed as:

$$i_{co1}=\frac{1}{2}{D}_L\frac{I_{Lmp}}{2+2n}-I_o$$

(36)

In the steady state, $i_{co1}$ is equal to zero and (21), (35), and $i_{co1}=0$ can be substituted into (36). Therefore, (37) can be obtained as:

$$\frac{D^2\left(n+1\right){V_{in}}^2{T}_s}{\left[V_o-\left(n+2\right)V_{in}\right]·\left(2n+2\right)·Lm}=\frac{V_o}{R}$$

(37)

The time constant of the magnetizing inductance is defined as:

$${\mathsf{\tau }}_{Lm}\stackrel{\mathrm{def}}{=}\frac{Lm}{R{T}_s}$$

(38)

By substituting (38) into (37), the voltage gain can be obtained as follows:

$$M_{\mathrm{DCM}}=\frac{V_o}{V_{in}}=\frac{2n+2}{2}+\sqrt{\frac{{\left(2n+2\right)}^2}{4}+\frac{D^2\left(n+1\right)}{\left(2n+2\right)·{\mathsf{\tau }}_{Lm}}}$$

(39)

3.3. Boundary Operating Condition between the CCM and the DCM

While operating the proposed converter in boundary-condition mode the voltage gain is equal for CCM and DCM operations. Based on (18) and (39), the time constant ${\mathsf{\tau }}_{LmB}$ of the boundary normalized magnetizing inductor can be expressed as:

$${\mathsf{\tau }}_{LmB}=\frac{\frac{D^2\left(n+1\right)}{2n+2}}{{[\left(\frac{2+n+nD}{1-D}\right)-\frac{2n+2}{2}]}^2-\frac{{\left(2n+2\right)}^2}{4}}$$

(40)

Figure 8 shows the curve of $\mathsf{\tau }$. The proposed converter is operated in the CCM when $\mathsf{\tau }$ is higher than $i_{LmB}$. Otherwise, the proposed converter is operated in the DCM.

4. Design and Experiment of the Proposed Converter

To test and measure the proposed converter performance, a prototype circuit of the proposed converter at 150 W was constructed in the laboratory. The main specifications are as follows:

• Input DC voltage $V_{in}$: 24 V.
• Output DC voltage $V_o:400\mathrm{V}$.
• Maximum output power: 150 W.
• Switch frequency: 50 kHz.
• Switch: IXTH130N10T.
• Diodes: D₁–D₃, D_o: DSEI 30-10A; D_in and D₄: 25JPE40.
• Capacitors: C₁ and C_co2: 100 $\mathsf{\mu }$/100 V, C₂: 100 $\mathsf{\mu }$/250 V, C₃: 100 $\mathsf{\mu }$/100 V, and C_o1: 220 $\mathsf{\mu }$/400 V aluminium capacitors.
• Transformer: ETD-49 core PC-32, N_p:Ns = 1:3, L_m = 32 μH and L_k = 0.22 μH; $k=0.993$.

Figure 9a illustrates the secondary current i_s, primary-side leakage magnetizing current i_Lk, and drain to source voltage of the main power switch at full load P_o = 150 W and $V_{in}$ = 24 V. The waveform of the secondary current i_s of the coupled inductor shows that the proposed circuit does not have zero current when the switch is turned on in the CCM. Figure 9b shows the waveforms of i_d1 and i_d2.

The current of the capacitor C₁ flows to D₂ and energy is transferred to the capacitor C_o2 when the switch is turned on. The capacitor C₁ absorbs energy from $V_{in}$ and parasitic capacitor on the switch when the switch is turned off. Figure 9c shows the waveforms of i_d3 and i_d4; C₂ and C₃ are charged by the DC source $V_{in}$ and secondary-side coupled inductor. Figure 9d shows the waveforms of i_din and i_do. The energy of $V_{in}$ though C_in transfers to the step up circuit and current flow to D_o and is released to output capacitors.

Figure 10a shows that V_c1, V_c2, and V_c3 satisfy (14), (15), and (17). Figure 10b shows the input and output voltages of capacitors C_o1 and C_o2. Figure 11 illustrates the efficiency of the proposed converter at 20–150 W loads, and the maximum efficiency is 96.2% at 60 W.

5. Conclusions

This study successfully integrated the proposed converter by using the coupled inductor and high step-up circuit. High voltage gain was achieved using the coupled inductor when the capacitor charged and discharged energy. For this paper is integrated coupled inductor and switch capacitor to achieve a high step-up voltage gain without extreme duty cycle. In addition, energy was recovered from the leakage inductor of the coupled inductor by using a passive clamp circuit. The primary-leakage inductor recovered the energy function, and the switch clamp capacitor reduced the voltage spike of the switch. Therefore, when low conducting resistance R_ds(on) and low voltage stresses component were selected, the main power switch loss was reduced. Finally, a prototype circuit of the proposed converter with an input voltage of 24 V converted to an output voltage of 400 V and maximum power 150 W was constructed in the laboratory. The experimental results proved the high efficiency and voltage gain of the proposed converter. Moreover, it was proved that the main switch stress voltage is clamped by the capacitor C₁.